JPH0582631A - Vacuum chuck for semiconductor wafer - Google Patents

Vacuum chuck for semiconductor wafer

Info

Publication number
JPH0582631A
JPH0582631A JP26885691A JP26885691A JPH0582631A JP H0582631 A JPH0582631 A JP H0582631A JP 26885691 A JP26885691 A JP 26885691A JP 26885691 A JP26885691 A JP 26885691A JP H0582631 A JPH0582631 A JP H0582631A
Authority
JP
Japan
Prior art keywords
suction
groove
semiconductor wafer
pressure
grooves
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP26885691A
Other languages
Japanese (ja)
Inventor
Fumihiro Takemura
文宏 竹村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Coorstek KK
Original Assignee
Toshiba Ceramics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Ceramics Co Ltd filed Critical Toshiba Ceramics Co Ltd
Priority to JP26885691A priority Critical patent/JPH0582631A/en
Publication of JPH0582631A publication Critical patent/JPH0582631A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To chuck a semiconductor wafer with high accuracy by eliminating the influence by dust and by preventing the deformation of the semiconductor wafer. CONSTITUTION:The plurality of suction grooves 4, each having a suction hole 6 on its bottom, are formed concentrically on a suction face 2 and dust adhesion preventing grooves 5 having a width larger than that of the suction groove 4 are concentrically formed on the suction face 2 which are located between the adjacent suction grooves 4 and a vacuum pump 9 is installed for setting the pressure in the suction grooves 4 at a required vacuum pressure through each suction hole 6. By installing a pressure adjustor 12 which adjusts the pressure of the inside of each dust adhesion preventing groove 5 to the required pressure through an air hole made on the bottom of each groove 5, the pressure of the inside of the dust adhesion preventing grooves is made to have such a value that it may not have any influence by suction from the suction grooves or by the width of the dust adhesion preventing grooves.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、シリコンウェーハ等の
半導体ウェーハをその平坦度測定、ラッピング又は研削
加工等のために真空吸着する半導体ウェーハ用真空チャ
ックに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor wafer vacuum chuck for vacuum-sucking a semiconductor wafer such as a silicon wafer for flatness measurement, lapping or grinding.

【0002】[0002]

【従来の技術】従来、この種の半導体ウェーハ用真空チ
ャックは、被吸着物である半導体ウェーハと吸着面との
間にダストが介在することによる密着不良を防止するた
め、例えば図4に示すように、底部に吸引孔21を開設
した複数の吸着溝22を、チャック本体23の吸着面2
4に同心状に設けると共に、隣り合う吸着溝22間の吸
着面24に吸着溝22より広幅のダスト付着防止溝25
を同心状に設け、かつ上記各吸着溝22内をそれぞれの
吸引孔21を介して所要の真空圧力とする真空ポンプ
(図示せず)を設けて構成したり(実開昭60−192
445号公報参照)、あるいは図5に示すように、上記
構成のものにおいて、ダスト付着防止溝25の底部に大
気と連通するリーク孔26を設けて構成したりしている
(実開昭62−23447号公報参照)。
2. Description of the Related Art Conventionally, a vacuum chuck for semiconductor wafers of this type is shown in FIG. 4, for example, in order to prevent defective adhesion due to the presence of dust between a semiconductor wafer, which is an object to be adsorbed, and an adsorption surface. In addition, a plurality of suction grooves 22 each having a suction hole 21 at the bottom are formed on the suction surface 2 of the chuck body 23.
4 is provided concentrically with each other, and a dust adhesion preventing groove 25 wider than the suction groove 22 is provided on the suction surface 24 between the adjacent suction grooves 22.
And a vacuum pump (not shown) which makes each suction groove 22 have a required vacuum pressure through each suction hole 21.
No. 445), or as shown in FIG. 5, the dust adhesion prevention groove 25 is provided with a leak hole 26 communicating with the atmosphere in the bottom portion of the dust adhesion prevention groove 25 (actual opening 62-). No. 23447).

【0003】[0003]

【発明が解決しようとする課題】しかしながら、上記従
来の半導体ウェーハ用真空チャックにおいては、ダスト
付着防止溝25を設けることにより、半導体ウェーハW
と接触する吸着面積が低減され、かつダスト付着防止溝
25内にダストが捕捉されるので、ダストによる影響は
排除し得るものの、図4に示すものの場合は、半導体ウ
ェーハWの被吸着面の凹凸あるいは粗さにより、ダスト
付着防止溝25内も吸着溝22を介して真空吸引される
ため、同図に示すように、半導体ウェーハWがダスト付
着防止溝25内に突出するように湾曲して変形する問題
があり、又、図5に示すものの場合は、ダスト付着防止
溝25内がリーク孔26を介して大気と連通して吸着溝
22内よりはかるに大きな圧力となるため、同図に示す
ように、半導体ウェーハWのダスト付着防止溝25と対
応する部分が外方へ突出するように湾曲して変形する問
題がある。そこで、本発明は、ダストの影響を排除しつ
つ、半導体ウェーハの変形を防止し、半導体ウェーハを
高精度でチャッキングし得る半導体ウェーハ用真空チャ
ックの提供を目的とする。
However, in the above-mentioned conventional vacuum chuck for semiconductor wafer, the semiconductor wafer W is provided by providing the dust adhesion preventing groove 25.
Since the adsorption area in contact with the dust is reduced and the dust is trapped in the dust adhesion preventing groove 25, the influence of the dust can be eliminated, but in the case of the one shown in FIG. Alternatively, because of the roughness, the inside of the dust adhesion prevention groove 25 is also vacuum-sucked through the adsorption groove 22, so that the semiconductor wafer W is curved and deformed so as to protrude into the dust adhesion prevention groove 25 as shown in FIG. In the case of the one shown in FIG. 5, the inside of the dust adhesion preventing groove 25 communicates with the atmosphere through the leak hole 26 and becomes a pressure much larger than the inside of the adsorption groove 22. As described above, there is a problem that the portion of the semiconductor wafer W corresponding to the dust adhesion preventing groove 25 is curved and deformed so as to project outward. Therefore, an object of the present invention is to provide a semiconductor wafer vacuum chuck capable of preventing deformation of a semiconductor wafer and chucking the semiconductor wafer with high accuracy while eliminating the influence of dust.

【0004】[0004]

【課題を解決するための手段】前記課題を解決するた
め、本発明の半導体ウェーハ用真空チャックは、底部に
吸引孔を開設した複数の吸着溝を吸着面に同心状に設け
ると共に、隣り合う吸着溝間の吸着面に吸着溝より広幅
のダスト付着防止溝を同心状に設け、かつ上記各吸着溝
内をそれぞれの吸引孔を介して所要の真空圧力とする真
空ポンプを設けてなる半導体ウェーハ用真空チャックに
おいて、前記各ダスト付着防止溝内をそれぞれの底部に
開設した通気孔を介して所要圧力に調節する圧力調節手
段を設けたものである。
In order to solve the above-mentioned problems, a vacuum chuck for semiconductor wafers according to the present invention is provided with a plurality of suction grooves having suction holes at the bottom thereof, which are concentrically formed on the suction surface, and which are adjacent to each other. For semiconductor wafers, in which a dust adhesion prevention groove wider than the suction groove is concentrically provided on the suction surface between the grooves, and a vacuum pump is provided to bring each suction groove to a required vacuum pressure through each suction hole. The vacuum chuck is provided with a pressure adjusting means for adjusting the inside of each of the dust adhesion preventing grooves to a required pressure through a ventilation hole formed in each bottom.

【0005】[0005]

【作用】上記手段においては、半導体ウェーハと接触す
る吸着面積が小さくなると共に、ダスト付着防止溝内の
圧力が吸着溝からの吸引やダスト付着防止溝幅等の影響
を排除し得る値に保たれる。
In the above means, the suction area in contact with the semiconductor wafer is reduced, and the pressure in the dust adhesion prevention groove is kept at a value that can eliminate the influence of suction from the adsorption groove and the dust adhesion prevention groove width. Be done.

【0006】[0006]

【実施例】以下、本発明の実施例を図面を参照して説明
する。図1,図2は本発明の一実施例の半導体ウェーハ
用真空チャックの平面図、要部の断面図である。
Embodiments of the present invention will be described below with reference to the drawings. 1 and 2 are a plan view and a cross-sectional view of a main part of a semiconductor wafer vacuum chuck according to an embodiment of the present invention.

【0007】図中1は金属、セラミックス又はガラス等
からなる円板状のチャック本体で、その吸着面2には、
中心部の吸着孔3を中心として4条の吸着溝4が同心状
に設けられていると共に、吸着孔3の外周及び隣り合う
吸着溝4間の吸着面2には、吸着溝4より広幅のダスト
付着防止溝5が同心状に設けられている。各吸着溝4の
底部には、吸引孔6がチャック本体1の半径に沿って開
設されており、これらの吸引孔6及び中心部の吸着孔3
は、チャック本体1に穿設した連通孔7によって連通さ
れている。連通孔7は、チャック本体1の外周面に開口
され、かつ圧力調節器8を介在して各吸着溝4内を所要
の真空圧力とする真空ポンプ9と接続されている。一
方、各ダスト付着防止溝5の底部には、通気孔10が前
記吸引孔6列と約90°の角度をなしてチャック本体1
の半径に沿って開設されており、これらの通気孔10
は、チャック本体1に穿設した連通孔11によって連通
されている。連通孔11はチャック本体1の外周面に開
口され、かつ各ダスト付着防止溝5内を吸着溝4からの
吸引やダスト付着防止溝5の幅の影響を排除できる所要
圧力とすべく大気を供給する圧力調節手段としての圧力
調節器12と接続されている。
In the figure, reference numeral 1 denotes a disk-shaped chuck body made of metal, ceramics, glass or the like.
Four suction grooves 4 are concentrically provided with the suction hole 3 at the center as the center, and the suction surface 2 between the suction holes 3 and the adjacent suction grooves 4 is wider than the suction grooves 4. The dust adhesion preventing groove 5 is provided concentrically. Suction holes 6 are formed at the bottom of each suction groove 4 along the radius of the chuck body 1, and the suction holes 6 and the suction holes 3 at the center are formed.
Are communicated with each other through a communication hole 7 formed in the chuck body 1. The communication hole 7 is opened on the outer peripheral surface of the chuck body 1 and is connected to a vacuum pump 9 that interposes a pressure adjuster 8 to bring each suction groove 4 to a required vacuum pressure. On the other hand, at the bottom of each dust adhesion preventing groove 5, a ventilation hole 10 forms an angle of about 90 ° with the row of suction holes 6 and the chuck body 1 is formed.
These vent holes 10 are installed along the radius of
Are communicated with each other by a communication hole 11 formed in the chuck body 1. The communication hole 11 is opened on the outer peripheral surface of the chuck body 1, and the atmosphere is supplied so that each dust adhesion preventing groove 5 has a required pressure capable of eliminating the influence of the suction from the suction groove 4 and the width of the dust adhesion preventing groove 5. It is connected to a pressure adjuster 12 as a pressure adjusting means.

【0008】上記構成の半導体ウェーハ用真空チャック
においては、半導体ウェーハWのチャッキングに際し、
半導体ウェーハWと接触する吸着面積が小さくなり、か
つダストがダスト付着防止溝5に捕捉されるので、ダス
トの介在による半導体ウェーハWの変形等の悪影響を排
除できると共に、半導体ウェーハWの被吸着面の凹凸あ
るいは粗さにより、吸着溝22内の真空吸引に伴って低
下するダスト付着防止溝5内の圧力が、圧力調整器12
によって所要圧力に調節されるので、半導体ウェーハW
のダスト付着防止溝5と対応する部分の変形を低減で
き、ひいては半導体ウェーハを高精度でチャッキングす
ることができる。
In the semiconductor wafer vacuum chuck having the above structure, when chucking the semiconductor wafer W,
Since the adsorption area in contact with the semiconductor wafer W is reduced and the dust is captured by the dust adhesion preventing groove 5, adverse effects such as deformation of the semiconductor wafer W due to the inclusion of dust can be eliminated and the surface to be attracted of the semiconductor wafer W can be eliminated. The pressure in the dust adhesion preventing groove 5 which is reduced due to the vacuum suction in the suction groove 22 due to the unevenness or roughness of the
Is adjusted to the required pressure by the semiconductor wafer W
The deformation of the portion corresponding to the dust adhesion preventing groove 5 can be reduced, and the semiconductor wafer can be chucked with high accuracy.

【0009】ここで、吸着溝の幅を0.5mm、吸着溝
間の間隔を10mm、ダスト付着防止溝の幅を8mmと
した真空チャックを用いて厚さ0.6mmのシリコンウ
ェーハを吸着溝内圧力−500mmHgでチャッキング
する場合、ダスト付着防止溝内がシリコンウェーハ裏面
の粗さや凹凸によるリークによって−100mmHgと
なると、シリコンウェーハ表面が最大0.2μm変形す
ると算出されるが、ダスト付着防止溝内の圧力を圧力調
節器によって0mmHg、−1mmHg及び−2mmH
gとすると、図3において曲線A,B及びCに示すよう
に、シリコンウェーハ表面の変形量は、0.003μ
m、0.0005μm及び0.001μmと算出され
る。
A vacuum chuck having a suction groove width of 0.5 mm, a distance between the suction grooves of 10 mm, and a dust adhesion prevention groove width of 8 mm is used to insert a silicon wafer having a thickness of 0.6 mm into the suction groove. When chucking at a pressure of -500 mmHg, when the inside of the dust adhesion prevention groove becomes -100 mmHg due to leakage due to roughness or unevenness of the back surface of the silicon wafer, it is calculated that the surface of the silicon wafer is deformed by 0.2 μm at the maximum. Pressure of 0mmHg, -1mmHg and -2mmH by pressure regulator
g, the amount of deformation of the silicon wafer surface is 0.003 μm, as shown by curves A, B and C in FIG.
m, 0.0005 μm and 0.001 μm.

【0010】したがって、ダスト付着防止溝内圧力を−
1mmHgとすることによって、シリコンウェーハのダ
スト付着防止溝と対応する部分の変形量を吸着溝と対応
する部分の変形量以下とし得ることがわかる。なお、上
述した実施例においては、吸着面2の中央部に吸着孔3
を設ける場合について説明したが、これに限らず、一番
内側の吸着溝4の直径を小さくし、その内側にダスト付
着防止溝5だけを設けるようにしてもよい。
Therefore, the pressure inside the groove for preventing dust adhesion is
It can be understood that the deformation amount of the portion corresponding to the dust adhesion preventing groove of the silicon wafer can be set to be equal to or less than the deformation amount of the portion corresponding to the suction groove by setting it to 1 mmHg. In the embodiment described above, the suction hole 3 is formed in the center of the suction surface 2.
However, the diameter of the innermost suction groove 4 may be reduced and only the dust adhesion preventing groove 5 may be provided inside the suction groove 4.

【0011】[0011]

【発明の効果】以上説明したように本発明の半導体ウェ
ーハ用真空チャックによれば、半導体ウェーハと接触す
る吸着面積が小さくなり、かつダストがダスト付着防止
溝に捕捉されるので、ダストの介在による半導体ウェー
ハの変形等の悪影響を排除できると共に、ダスト付着防
止溝内の圧力が吸着溝からの吸引やダスト付着防止溝幅
等の影響を排除し得る所要圧力となるので、従来に比し
て半導体ウェーハのダスト付着防止溝と対応する部分の
変形を低減することができ、ひいては半導体ウェーハを
高精度でチャッキングすることができる。
As described above, according to the vacuum chuck for a semiconductor wafer of the present invention, the adsorption area in contact with the semiconductor wafer becomes small, and the dust is trapped in the dust adhesion preventing groove. In addition to eliminating the adverse effects of semiconductor wafer deformation, etc., the pressure inside the dust adhesion prevention groove becomes the required pressure that can eliminate the effects of suction from the adsorption groove and dust adhesion prevention groove width, etc. It is possible to reduce the deformation of the portion of the wafer corresponding to the dust adhesion preventing groove, and it is possible to chuck the semiconductor wafer with high accuracy.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例の半導体ウェーハ用真空チャ
ックの平面図である。
FIG. 1 is a plan view of a vacuum chuck for a semiconductor wafer according to an embodiment of the present invention.

【図2】本発明の一実施例の半導体ウェーハ用真空チャ
ックの要部の断面図である。
FIG. 2 is a sectional view of a main part of a semiconductor wafer vacuum chuck according to an embodiment of the present invention.

【図3】本発明の一実施例の半導体ウェーハ用真空チャ
ックによってチャッキングされた半導体ウェーハ表面の
変形量の説明図である。
FIG. 3 is an explanatory diagram of an amount of deformation of a surface of a semiconductor wafer chucked by a semiconductor wafer vacuum chuck according to an embodiment of the present invention.

【図4】従来の半導体ウェーハ用真空チャックの要部の
断面図である。
FIG. 4 is a sectional view of a main part of a conventional semiconductor wafer vacuum chuck.

【図5】従来の他の半導体ウェーハ用真空チャックの要
部の断面図である。
FIG. 5 is a sectional view of a main part of another conventional semiconductor wafer vacuum chuck.

【符号の説明】[Explanation of symbols]

2 吸着面 4 吸着溝 5 ダスト付着防止溝 6 吸引孔 9 真空ポンプ 10 通気孔 12 圧力調整器 2 Adsorption surface 4 Adsorption groove 5 Dust adhesion prevention groove 6 Suction hole 9 Vacuum pump 10 Vent hole 12 Pressure regulator

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 底部に吸引孔を開設した複数の吸着溝を
吸着面に同心状に設けると共に、隣り合う吸着溝間の吸
着面に吸着溝より広幅のダスト付着防止溝を同心状に設
け、かつ上記各吸着溝内をそれぞれの吸引孔を介して所
要の真空圧力とする真空ポンプを設けてなる半導体ウェ
ーハ用真空チャックにおいて、前記各ダスト付着防止溝
内をそれぞれの底部に開設した通気孔を介して所要圧力
に調節する圧力調節手段を設けたことを特徴とする半導
体ウェーハ用真空チャック。
1. A plurality of suction grooves having suction holes at the bottom are provided concentrically on the suction surface, and dust adhesion prevention grooves wider than the suction grooves are concentrically provided on the suction surface between adjacent suction grooves. And in the semiconductor wafer vacuum chuck provided with a vacuum pump that makes each suction groove a required vacuum pressure through each suction hole, a ventilation hole opened in each bottom of each dust adhesion prevention groove is provided. A vacuum chuck for a semiconductor wafer, which is provided with pressure adjusting means for adjusting the pressure to a required pressure via the vacuum chuck.
JP26885691A 1991-09-20 1991-09-20 Vacuum chuck for semiconductor wafer Pending JPH0582631A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26885691A JPH0582631A (en) 1991-09-20 1991-09-20 Vacuum chuck for semiconductor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26885691A JPH0582631A (en) 1991-09-20 1991-09-20 Vacuum chuck for semiconductor wafer

Publications (1)

Publication Number Publication Date
JPH0582631A true JPH0582631A (en) 1993-04-02

Family

ID=17464219

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26885691A Pending JPH0582631A (en) 1991-09-20 1991-09-20 Vacuum chuck for semiconductor wafer

Country Status (1)

Country Link
JP (1) JPH0582631A (en)

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997008741A1 (en) * 1995-08-22 1997-03-06 Siemens Aktiengesellschaft Suction plate for wafer
WO1997021243A1 (en) * 1995-12-04 1997-06-12 Hitachi, Ltd. Method for processing semiconductor wafer, method for manufacturing ic card, and carrier
EP0896859A2 (en) * 1997-08-11 1999-02-17 Tokyo Seimitsu Co.,Ltd. Wafer polishing apparatus
EP1137061A4 (en) * 1998-10-28 2003-07-02 Matsushita Electric Ind Co Ltd Operating method and device
JP2005243888A (en) * 2004-02-26 2005-09-08 Nitto Denko Corp Pressure sensitive adhesive sheet sticking method and equipment using the same
US6966560B2 (en) * 2002-08-02 2005-11-22 Suss Microtec Lithography Gmbh Device for fixing thin and flexible substrates
JP2009125900A (en) * 2007-11-27 2009-06-11 Disco Abrasive Syst Ltd Holding mechanism for workpiece in grinding device
JP2009135132A (en) * 2007-11-28 2009-06-18 Tokyo Seimitsu Co Ltd Wafer processing apparatus
US20100013169A1 (en) * 2008-07-17 2010-01-21 Bjorn Monteen Thin wafer chuck
KR101420091B1 (en) * 2013-01-23 2014-08-13 (주)뉴젠텍 Vacuum chuck having coating surface
JP2016062990A (en) * 2014-09-16 2016-04-25 株式会社デンソー Wafer prober device
WO2016092700A1 (en) * 2014-12-12 2016-06-16 キヤノン株式会社 Substrate holding apparatus, lithography apparatus, and article manufacturing method
US10267848B2 (en) 2008-11-21 2019-04-23 Formfactor Beaverton, Inc. Method of electrically contacting a bond pad of a device under test with a probe
WO2023224255A1 (en) * 2022-05-19 2023-11-23 뉴브이테크주식회사 Chuck for wafer and method for manufacturing same

Cited By (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997008741A1 (en) * 1995-08-22 1997-03-06 Siemens Aktiengesellschaft Suction plate for wafer
WO1997021243A1 (en) * 1995-12-04 1997-06-12 Hitachi, Ltd. Method for processing semiconductor wafer, method for manufacturing ic card, and carrier
AU729849B2 (en) * 1995-12-04 2001-02-08 Hitachi Limited Methods of processing semiconductor wafer and producing IC card, and carrier
US6342434B1 (en) 1995-12-04 2002-01-29 Hitachi, Ltd. Methods of processing semiconductor wafer, and producing IC card, and carrier
US6573158B2 (en) 1995-12-04 2003-06-03 Hitachi, Ltd. Methods of processing semiconductor wafer and producing IC card, and carrier
US6589855B2 (en) 1995-12-04 2003-07-08 Hitachi, Ltd. Methods of processing semiconductor wafer and producing IC card, and carrier
EP0896859A2 (en) * 1997-08-11 1999-02-17 Tokyo Seimitsu Co.,Ltd. Wafer polishing apparatus
EP0896859A3 (en) * 1997-08-11 2002-08-28 Tokyo Seimitsu Co.,Ltd. Wafer polishing apparatus
EP1137061A4 (en) * 1998-10-28 2003-07-02 Matsushita Electric Ind Co Ltd Operating method and device
US6966560B2 (en) * 2002-08-02 2005-11-22 Suss Microtec Lithography Gmbh Device for fixing thin and flexible substrates
JP2005243888A (en) * 2004-02-26 2005-09-08 Nitto Denko Corp Pressure sensitive adhesive sheet sticking method and equipment using the same
JP2009125900A (en) * 2007-11-27 2009-06-11 Disco Abrasive Syst Ltd Holding mechanism for workpiece in grinding device
JP2009135132A (en) * 2007-11-28 2009-06-18 Tokyo Seimitsu Co Ltd Wafer processing apparatus
US20100013169A1 (en) * 2008-07-17 2010-01-21 Bjorn Monteen Thin wafer chuck
US8336188B2 (en) * 2008-07-17 2012-12-25 Formfactor, Inc. Thin wafer chuck
US10267848B2 (en) 2008-11-21 2019-04-23 Formfactor Beaverton, Inc. Method of electrically contacting a bond pad of a device under test with a probe
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