JPH0582130B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION A. Field of Industrial Application The present invention relates to an overcurrent relay using a dual combination circuit of a summing integrator and a comparator.

B. Summary of the Invention The present invention provides an overcurrent relay in which a combination circuit of an summing integrator and a comparator is duplicated, in which a series circuit of two resistors is connected between the output terminals of a rectifier, and an operating value is set in parallel to one of the series circuits. By connecting a variable resistor for the series circuit and inputting both output terminals of the series circuit to each of the summing integrators, it is possible to easily set it up, eliminate the risk of malfunction, and also be preferable in terms of time coordination. It is designed so that the effect can be obtained.

C. Prior Art A conventional circuit of an overcurrent relay using a summing integrator and a comparator is shown in FIG. In the same figure, 1
is a rectifier, and the detection current that detects the alternating current
Full-wave rectification of I _N1 and I _N2 . The negative output of rectifier 1 is connected to ground, and the positive output is connected to resistor R ₁
connected to ground via. This resistance R ₁
The detected current from rectifier 1 is the voltage signal V ₁
is converted to IC ₁ is an operational amplifier whose positive input terminal is connected to ground, and whose negative input terminal is connected to the positive output terminal of rectifier 1 via a variable resistor VR for setting the operating value, and a resistor R ₅ . is connected to a reference power supply having a negative reference voltage V _r via the reference voltage Vr. Furthermore, since the voltage signal V ₁ is not a complete DC signal,
In order to integrate this, an integrating capacitor _C1 is connected between the negative input terminal and output terminal of the operational amplifier _IC1 . A summing integrator 2 is constituted by the resistor R ₅ , the variable resistor VR, the operational amplifier IC ₁ and the capacitor C ₁ . The output side of this summing integrator 2 includes an operational amplifier IC ₂ , a resistor R ₉ connected between its positive input terminal and output terminal, and a resistor R ₁₀ connected between the positive input terminal and ground. A hysteresis comparator 3 consisting of the following is connected. Here, the voltage signal V ₁ appearing at the output end of the rectifier 1 is inputted together with the reference voltage V _r to the summing integrator 2, where these signals are added and the added value is integrated.
The summing integrator 2 outputs a voltage signal V _O1 . This voltage signal V _O1 is expressed by equation (1) when the operational amplifier IC ₁ is in an imaginary position.

V _p1 =-1/C ₁ (V ₁ /r _VR +V _r /r ₅ )t (1) where r _VR and r ₅ are the resistance values of variable resistor VR and resistor R ₅ , respectively. That is, since the reference voltage _Vr is a negative voltage, the difference between the current flowing through the variable resistor VR and the current flowing through the resistor _R5 is integrated and appears at the output terminal of the operational amplifier _IC1 . The state of this integration is shown in FIG. 3. Assuming that no overcurrent is detected before time t ₀ , the output voltage V _O1 of the operational amplifier IC ₁ has a magnitude of a. When the alternating current to be detected at time t ₀ increases, the voltage V ₁ increases, and therefore the output voltage V _O1 decreases while including a ripple component. Note that V _CC and V _EE are the power supply voltages of the operational amplifier. The reason why the ripple component is included is because the voltage V ₁ is a full-wave rectified waveform. and output voltage
When V _O1 becomes smaller than the voltage V _C1 at the positive input terminal of operational amplifier IC ₂ (corresponding to time t ₁ in Fig. 3)
An H level signal appears on the output side of the comparator 3, and the relay is driven based on this signal.
Regarding the capacitor _C1 , in order to suppress the ripple, the capacitance of the capacitor _C1 can be increased, but this will slow down the rate of fall of the voltage V _O1 and thus delay the detection time.
Also, if the capacitance of capacitor C ₁ is reduced, the falling speed will increase, but the ripple will increase, and if this becomes larger than the change in voltage V _O1 due to hysteresis determined by resistors R ₉ and R ₁₀ , operational amplifier IC ₂ The output voltage V _O2 transiently repeats H and L levels, which is undesirable. Therefore, the capacitance of the capacitor _C1 should be made small enough to prevent the voltage V _O2 from repeating the H and L levels transiently.

In the circuit shown in Figure 2, the operating value can be adjusted by changing the resistance value of the variable resistor VR, but the setting value and the angle of the dial of the regulator (the resistance value of the variable resistor VR) are Resistance value _of R ₁
《If the resistance value of the variable resistor VR is _rVR , there is a linear proportional relationship, and therefore setting can be easily performed. Further, for each arbitrary setting value, when an input signal that is n times as large as that value is applied to the rectifier 1, the mutual operation time becomes constant. For example, if 2A flows when the setting value is 1A, and when 4A flows when the setting value is 2A.
This is clear from the fact that the current flowing through the variable resistor VR is the same as when the current flows. Although the circuit shown in FIG. 2 is excellent as described above, it has the following drawbacks.

That is, recent relays are often duplicated in order to improve reliability. In this case, summing integrator 2
Since the circuits up to the preceding stage are sufficiently reliable compared to operational amplifiers and the like, they are not duplicated, but the circuits subsequent to this, including the summing integrator 2, are generally duplicated. By the way, in the circuit shown in Figure 2,
Since the variable resistor VR for setting is included in the summing integrator 2, when duplicating the variable resistor VR
Since two are required, it is troublesome to set the operating values, which is the biggest drawback.

For this reason, it is advantageous to have a circuit that can commonly set the duplicated circuits using one variable resistor.
There is a circuit shown in the figure.

The circuit shown in Figure 4 uses fixed resistors (R ₃ , R ₆ ) instead of the variable resistor VR that constitutes the summing integrator 2 of the circuit in Figure 2, and doubles the circuit that combines the summing integrator and the comparator. and connect this to rectifier 1
It is connected to the output end of the and the second
In place of the resistor _R1 of the circuit shown in the figure, a variable resistor VR for setting is provided. In the figure, 4 and 5 are a summing integrator and a comparator, R ₃ , R ₆ , R ₈ , R ₁₁ and R ₁₂ are resistors, C ₂ is a capacitor for integration, IC ₃ and IC ₄ are operational amplifiers, V _O3 is the output voltage of summing integrator 4, V _O4 is the output voltage of comparator 5, V _C2 is the output voltage of comparator 5
is the reference voltage of In the circuit shown in Figure 4, the second
As in the case of the circuit shown in the figure, when the input current of rectifier 1 reaches the set value, from rectifier 1 to summing integrator 2
Since the variable resistor VR is adjusted so that the signal input to the circuit has a predetermined magnitude, for each arbitrary setting value (x ₁ , x ₂ . _. . , nx ₂ ...), each operation time becomes constant. Although the circuit shown in Figure 4 is good in this respect, the setting value and the angle of the dial (resistance value of the variable resistor VR) are not in a linear proportional relationship.
If it can be done with 1A to 10A, the angle of the dial between 9A and 10A is 1/4 of the angle of the dial between 1A and 2A.
5, which has the disadvantage that it is extremely difficult to stabilize at high settings. Furthermore, if the sliding piece of the variable resistor VR has poor contact, the resistance value of the variable resistor VR increases and the voltage signal _V1 increases, causing a shift to the low setting side and malfunction.

In the circuit shown in FIG. 5, the configuration of the summing integrator etc. is the same as that of the circuit shown in FIG. 4, except that a fixed resistor _R1 is connected between the positive output terminal of the rectifier 1 and the ground. The circuit differs from the circuit shown in FIG. 4 in that the voltage V _r of the reference power source is divided by a resistor R ₉ and a variable resistor VR, and the divided voltage is used as a reference voltage, and the variable resistor VR is used for settling. According to the circuit shown in Fig. 5, if the sliding piece of the variable resistor VR has a poor contact, the reference voltage will rise and shift to the high setting side.
There is no malfunction, and although the setting value and the dial angle are not linearly proportional, the linearity is relatively good, and setting can be easily performed in actual use. However, this circuit has the following drawbacks. That is, each output V _O2 of comparators 3 and 5
In order to prevent V _O4 from repeating transient H and L levels, the capacitances of capacitors C ₁ and C ₂ are determined according to the maximum setting value, for example, 10 A.
If the minimum setting value is set to, for example, 1A, the operating time will be ten times longer than if it is set to the maximum setting value. The reason for this is that the voltage is set by adjusting the reference voltage of the summing integrator 2, so it is possible to set it to an arbitrary setting value (x ₁ , x _{2 . .} . ), and then draw a current n times the setting value in each state. When detected,
This is because the currents flowing through the capacitors C ₁ and C ₂ are different when each current (nx ₁ , nx _{2 .} . . ) is detected. For this reason, between the minimum setting value and the maximum setting value, the difference in operating time when an input twice the setting value is detected is more than 100ms, which may cause problems in time-limited coordination with other protective relays. Very undesirable.

D Problems to be Solved by the Invention The present invention was made under these circumstances, and although it is a duplicated circuit, it can be set with one variable resistor, and the setting is easy. It is an object of the present invention to provide an overcurrent relay that is free from the risk of malfunction and is also preferable in terms of time coordination with other protective relays.

E Means for Solving Problems The present invention connects a series circuit of a first resistor and a second resistor between the output terminals of a rectifier, connects the connection point between the resistors to a reference power source, and connects the first resistor to the reference power source. A variable resistor for setting an operating value is connected in parallel to one of the resistor and the second resistor, and both ends of the series circuit are connected to the respective input sides of the summing integrator.

In such a configuration, as will be clear from the explanation below, the difference in the resistance value of the variable resistor between the settling current ni ₀ and (n-1)i ₀ is constant, and the resistance value of the variable resistor and the settling current are It is a linear proportional relationship. In addition, setting is not done by adjusting the reference power supply voltage on the input side of the summing integrator, but by using a variable resistor between the output terminals of the rectifier, so it can be set to any desired setting value.
When a current of n times the set value is detected in each state, the current flowing through the integrating capacitor of the summing integrator has the same magnitude between each detection time. Furthermore, if the sliding piece of the variable resistance has poor contact, it will shift to the high setting side.

F Example Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit diagram showing an embodiment of the present invention,
This circuit differs from the conventional circuit shown in FIGS. 4 and 5 in the following points. That is, a series circuit consisting of a first resistor, such as a resistor R ₁ , and a second resistor, such as a resistor R ₂ , is connected between the output terminals of the rectifier 1, and the connection point between the resistors R ₁ and R ₂ is connected to a reference power source, such as the ground. At the same time, a variable resistor VR for setting the operating value is connected in parallel to the resistor _R2 . Furthermore, both ends of the series circuit of resistors R ₁ and R ₂ are connected to the input sides of each of the summing integrators 2 and 4. Therefore, the end of the resistor R ₂ opposite to the ground side is connected to the negative input terminal of the operational amplifier IC ₁ and the negative input terminal of the operational amplifier IC ₃ via the resistors R ₄ and R ₇ , respectively. There is.

In such a configuration, the detection current IN ₁ ,
Corresponding to IN ₂ , a positive voltage V ₁ and a negative voltage V ₂ appear across the series circuit of resistors R ₁ and R ₂ as shown. These voltages V ₁ and V ₂ and the reference voltage V _r are added and the added value is integrated. The fact that the reference voltage V _r is negative is similar to the circuit shown in FIG. 4, and the condition for the output V _O2 of the comparator 3 to be at the H level is expressed by equation (2).

V ₁ /r ₃ +V ₂ /r ₄ +V _r /r ₅ >0 (2) where r ₃ to _{r 5} are the resistance values of the resistors R ₃ to R ₅ , respectively.

Now, to simplify the explanation, if we set r ₃ = r ₄ , equation (2) becomes
It is expressed as equation (3), and since V ₂ and V _r are negative voltages, equation (3) becomes equation (4).

V ₁ +V ₂ /r ₃ +V _r /r ₅ >0 ...(3) V ₁ − |V ₂ |>r ₃ /r ₅・|V _r | ...(4) In equation (4), V ₁ − |V ₂ | is the differential voltage V _D ,
If r ₃ /r ₅ ·|V _r | is the basic voltage V _K , the conditions for V _O2 to be at the H level, that is, the operating conditions, are as shown in equation (5).

V _D > V _K ...(5) Now r ₁ = r ₂ >> r ₃ = r ₄ , the detection current corresponding to the minimum settling current i ₀ is I ₀ , and the settling current is n times the minimum settling current i ₀ . Set the resistance value of the variable resistor VR to operate at ni ₀ .
If r _VR , then equation (6) holds true.

V ₁ − | V ₂ | = n・I ₀・(r ₁ −1/1/r ₁ +1/r _VR )
=V _K ...(6) Rearranging this equation (6) results in equation (7).

r _VR = n・I ₀・r ₁ ² /V _K −r ₁ ...(7) Therefore, since it operates with a settling current (n-1) i ₀ that is (n-1) times the minimum settling current i ₀ The resistance value r _VR of the variable resistor VR is expressed by equation (8).

r _VR = (n-1)・I ₀・r ₁ ² /V _K −r ₁ ...(8) Resistance value difference Δr _VR of variable resistor VR when the settling current is ni ₀ and (n-1)i ₀ By taking the difference between equations (7) and (8), it becomes equation (9), which has a constant size.

Δr _VR = I ₀ · r ₁ ² /V _K ...(9) From this equation (9), it is understood that there is a linear proportional relationship between the setting value and the angle of the dial (the resistance value of the variable resistor VR). Ru.

Furthermore, if the slider of the variable resistor VR has poor contact, the absolute value of the voltage V ₂ |V ₂ | increases, and the differential voltage V _D =V ₁ − |V ₂ | decreases, so the high setting side It will shift to

For example, let us assume that the variable resistor VR is adjusted so that it operates when the detected current is _I0 , and the sum of the currents flowing through the resistors _R3 and _R4 at this time is a and A.
In this case, when the detected current is nI ₀ , the added value is
na, A. Furthermore, if the variable resistor VR is adjusted so that it operates when the detected current is I ₀ ', the above-mentioned addition value at this time must also be a, A, so when the detection current is nI ₀ ', the above-mentioned addition value The value will be na,A. As a result, when I settles at ₀ ,
Since the current flowing through the capacitor C ₁ is the same in the case where nI ₀ flows and the case where nI ₀ ' flows when it is settled at I ₀ ', the operating time is the same length.

Although only one of the duplicated circuits has been described above, the same can be said for the other.

In addition, _the resistance values r ₁ to R ₄ , R ₆ , and R ₇
It was explained that r ₄ , r ₆ , r ₇ have the relationship of r ₁ = r ₂ , r ₃ = r ₄ , r ₆ = r ₇ , but if k ₁ to _{k 3} are constants, r ₁ = k ₁
Of course, the same effect can be obtained even if r ₂ , r ₃ =k ₂ r ₄ , r ₆ =k ₃ r ₇ .

In addition to variable resistors, variable resistors VR include:
A rotary switch may be used to switch the resistor group.

G. Effects of the Invention As described above, according to the present invention, as explained in the explanation of the embodiment, it is possible to perform setting with one variable resistor even though it has a duplicated circuit configuration, and the setting value and Since there is a linear proportional relationship with the resistance value of the variable resistor, setting is easy. Moreover, if the sliding piece of the variable resistor becomes in poor contact, it will shift to the high setting side, so there is no risk of malfunction. Furthermore, when the current is set to an arbitrary set value and a current n times the set value is detected in each state, the operating time becomes the same. For example, the operating time will be the same if a current of nI ₀ is detected when _the current is set at I 0, and if a current of nI ₀ is detected when the current is set at I ₀ ′. This is preferable in terms of time-limited cooperation. In addition, it is possible to provide high-speed operation time characteristics, and if each constant is set to an optimal constant, the operation time when a current twice the size of the constant value is input is 1/2 of the input wave.
It is possible to increase the speed to about the period (10ms in case of 50Hz).

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing an embodiment of the present invention, Fig. 2 is a circuit diagram showing a conventional example, Fig. 3 is a time chart showing the output voltage of the summing integrator, and Figs. 4 and 5 respectively. FIG. 2 is a circuit diagram showing another conventional example. 1... Rectifier, 2, 4... Addition integrator, 3, 5
... Comparator, R ₁ ... First resistor, R ₂ ...
Second resistor, V _R ...variable resistor.

Claims (1)

[Claims] 1. Detects an alternating current, rectifies its detection signal with a rectifier, inputs the resulting DC signal and reference signal to an summing integrator, and inputs the output to a comparator. In an overcurrent relay in which a circuit combining an summing integrator and a comparator is duplicated, a series circuit of a first resistor and a second resistor is connected between the output terminals of the rectifier, and a series circuit of a first resistor and a second resistor is connected between the output terminals of the rectifier. Connect the connection point to a reference power source, connect a variable resistor for setting the operating value in parallel to one of the first resistor and the second resistor, and connect both ends of the series circuit to the summing integrator. An overcurrent relay characterized in that it is connected to each input side.