JPH0581085A - Method and device for acquiring and storing trace data - Google Patents

Abstract

PURPOSE: To obtain a real time trace data capturing and storing method and device by which trace data flow is stored into a large-capacity memory unit making plural parallel actions of a relatively low speed, for example, parallel disk memory unit. CONSTITUTION: The trace data flow is separated to plural data packages in the unit 18 and a series of the packets are fed into a series of the different large-capacity memory units 20A,..., 20D. The number of the large-capacity memory units is set at a number sufficient for providing one period such as the period described below. Namely, the period necessary for a series of the packages from the trace data flow to be sent to the large-capacity units therefrom during this period and for at least one package to be stored into the one large-capacity memory unit. The large band width conditions of the trace data flow are so divided as to meet the large-capacity memory units which are relatively low in speed but are cost effective.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION This invention relates generally to improved methods and apparatus for capturing computer trace data in real time, and more particularly for accumulating large trace data in real time. Concerning the economical way of.

[0002]

BACKGROUND OF THE INVENTION As is well known to those skilled in the art, the art has the purpose of capturing and accumulating system hardware and software states detected while executing programs on the system. There are many software routines (ie trace programs). Trace-driven model simulation has been attracting attention as a method for evaluating the proposed computer design. Obtaining complete and accurate trace data is critical to the success of this trace-based approach for computer design evaluation. Trace data for this purpose and other applications are collected in real time to keep multiple processors and peripherals synchronized. However, the bandwidth and storage requirements required to capture trace data in real time are very demanding in many applications. The real-time trace bandwidth is then equal to the product of the clock frequency of the system or subsystem where the trace data is to be captured times the size of the trace record. The required real-time trace memory is equal to the real-time trace bandwidth times the length of the trace data in seconds.

As an example of real-time trace bandwidth and trace memory requirements, one wait state, 75
% Processor bus utilization and 16 MHz processor clock frequency Intel Corporation (In
tel Corporation) 80386 processor.
Here, the trace bandwidth requirement is equal to the processor clock frequency times the trace record size.
By using data filtering and compression, this bandwidth requirement can be reduced by a factor equal to the average number of bus accesses per clock cycle. Therefore, in calculating bandwidth requirements for a processor using data filtering and compression, the product of processor clock frequency and trace record length is multiplied by the average number of bus accesses per clock cycle. In this example, the trace record size is 12
It is a byte. That is, it consists of 32 address bits + 32 data bits + 32 bits control signal and processor dedicated information. The average bus access per clock cycle is 0.25; that is, processor bus utilization / (2T + number of wait times).

Therefore, the required bandwidth for this example is 48 Mbytes / sec. 2.88 Gbytes are required to store 48 Mbytes of data per second for one minute. Conventional real-time tracing systems meet this band requirement by using SRAM as a storage medium. However, the length of the trace result that can be accumulated is limited due to the high cost of the SRAM.

[0005]

SUMMARY OF THE INVENTION One object of the present invention is to provide a method and apparatus for economically real-time capture and storage of large amounts of trace data at very high data rates.

[0006]

SUMMARY OF THE INVENTION In summary, the present invention comprises:
Consider providing a real-time trace data capture and storage device in which the trace data streams are stored in a plurality of relatively low speed mass storage units operating in parallel, eg, parallel disk memory units. This stored data stream is divided into a plurality of data packets and a series of packets is sent to a series of different mass storage units. This mass storage unit has a relatively low speed with a large bandwidth requirement for the stored data stream, but is sufficient to meet the economical mass storage unit. For model simulation, the trace data packets thus accumulated are read out of these mass storage units in sequence and reproduced in a sequence of trace data streams without loss of integrity.

The above and other objects, features and advantages will become more apparent by reading the following detailed description of one preferred embodiment of the present invention with reference to the drawings.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, with reference to the drawings, a specific embodiment of the present invention described above by Intel Corp.
oration) in the context of the ability to capture and store data from the 80386 microprocessor. However,
Note that the present invention can be used with a wide variety of processors and can be used to store trace data of virtually any desired length. In addition to this, the present invention is not limited to capturing processor trace data, as it captures trace data from computer subsystems that require large amounts of data to be captured in real time.
Note that it can also be used for bus data and other trace data collection applications, for example. In accordance with the teachings of the present invention, system bandwidth and storage capacity depends on the number of mass storage units in the system, and any system can be easily expanded by adding mass storage units.

The interface 12 is, for example, the processor 1 which is an 80386 processor pad available from Tektronics Corporation.
The 0 pin is coupled to the trace data filtering and compression unit 14. As described above, this 8038
In the six processor example, processor 10 requires a bandwidth of 48 Mbytes per second to capture exactly one trace data. The trace data filtering and compression unit 14 may be of any suitable prior art design, the function of which is to recognize certain buses and / or data patterns in order to reduce the amount of data that has to be stored. For example, the data filtering and compression unit 14 sends for storage storage only data that is associated with a certain clock cycle, for example the clock cycle in which the data is transmitted from or to the processor.

A standard high speed parallel port interface (HPPI) 16 couples the stored data filtering and compression unit 14 to a data multiplexer and disk control unit 18. The function of this data multiplexer and disk control unit 18 is to divide the data by dividing the bandwidth of the incoming data stream on the HPPI 16 (which in this example has a bid width of 60 Mbytes / sec) by the number of mass storage units. The goal is to reduce the bandwidth required to carry the mass storage units to their capacity. In this example, 20
There are four disk drivers named A, 20B, 20C and 20D. In this exemplary embodiment of the invention, the trace data stream is divided every 0.15 seconds to form a 15 Mbyte trace data packet, as shown in FIG. Each packet in the sequence of four packets is combined into a different one of the four disk memory units 20. Here, it can be seen that the bandwidth required for each disk memory unit is only required to be 15 Mbytes / second, which can be supported by a commercially available disk memory unit.
At the same time, the overall bandwidth of the system is equal to the number of disk units 20 times the disk data rate held. The total system memory capacity is equal to the number of disks times the individual disk memory capacity.

After the trace results have been collected and stored on disk 20, these packets are read sequentially from each of the disks 20 and sent through HPPI 26 to the mainframe computer for further processing.

2 and 3 show the operation of the data multiplexer and disk control unit 18 in more detail. A series of switches 30A, 3 controlled by the clock generator 34 and the switch logic unit 32.
0B, 30C and 30D split the incoming data stream on HPPI 16 into 15 Mbyte data packets every 0.15 seconds as shown in FIG. Packets are repeated in real time in a repeating sequence on the disk controllers 36A, 3
6B, 36C and 36D. Each disk controller buffer stores this data packet at the input data rate (eg, 60 Mbytes / second), which is equal to the input bandwidth on its associated disk divided by the number of disk drivers; Then, it transmits at a speed of 15 Mbytes / second.

Thus, it can be seen that the object of the present invention has been achieved. Implementations of the present invention provide the ability to capture accurate real-time traces that are much longer than those collected in the prior art. The increase of the trace length can be realized by using a low-speed and low-cost storage device instead of the high-speed and high-speed RAM for storing the trace result.

Although the present invention has been described in the context of a single preferred embodiment, those skilled in the art will appreciate that the present invention may be modified without departing from the spirit and scope of the claims of the invention. You can understand what you can do.

[0015]

As described above, according to the present invention, a plurality of storage units operating in parallel are provided, the data stream is divided into a plurality of data packets, and each palette is divided into different storage units. The trace length can be increased in a low-speed and low-cost device.

[Brief description of drawings]

FIG. 1 is a block diagram of a trace data capture and storage device in accordance with the teachings of the present invention.

FIG. 2 is a block diagram showing the data multiplexer and disk controller of the device shown in FIG. 1 in expanded detail.

FIG. 3 is a timing chart diagram illustrating the operation of dividing a trace data stream into packets for transmission to separate disk storage units.

[Explanation of symbols]

10 processor 12 in-interface 14 data filtering and compression unit 16 high-speed parallel port interface 18 data multiplexer and disk control unit

 ─────────────────────────────────────────────────── ─── Continued Front Page (72) Inventor Syauchi, Ong Pleasantville, Heritage, Drive, 23, New York, USA

Claims (6)

[Claims] 1. A method for capturing and accumulating trace data having a large data bandwidth condition for accurate data capture in real time, the trace data being transmitted in real time to a plurality of mass storage units. The combining step includes: dividing the trace data into data packets at predetermined intervals, and sequentially sending the data packets to different ones of the plurality of mass storage units, Here, the data acquisition / accumulation method is characterized in that a value obtained by multiplying the duration of the predetermined interval by the number of the mass storage units is at least equal to the bandwidth. 2. A method for capturing and accumulating in real time trace data having a large data bandwidth condition for accurate data capture, said trace data being passed from a trace data stream to a trace data compression unit in real time. Transmitting to delete unnecessary data for accurate capture; transmitting the trace data from the data compression unit to a plurality of mass storage units in real time; The step of transmitting to the unit includes the steps of dividing the trace data into data packets at predetermined intervals, and sequentially transmitting the data packets to different ones of the plurality of mass storage units, wherein , The duration of the predetermined interval and the mass storage unit Trace data capture and storage methods value obtained by multiplying the number is equal to or at least equal to the bandwidth. 3. The trace data capture and storage of claim 1, further comprising the step of sequentially sending data packets to a central processor to replay the trace data from the plurality of mass storage units. Method. 4. The trace data capture of claim 2 further comprising the step of sequentially sending data packets to a central processor to replay the trace data from a plurality of mass storage units. Accumulation method. 5. An apparatus for capturing and storing in real time trace data having a large data bandwidth requirement for accurate data capture, wherein the trace data is transmitted in real time to a plurality of mass storage units. Means for dividing the trace data into data packets at a predetermined interval, and the transmission means sequentially transmits the data packets to different ones of the plurality of mass storage units. Means for storing the trace data, wherein the value obtained by multiplying the duration of the predetermined interval by the number of the mass storage units is at least equal to the bandwidth. 6. A system for capturing and storing in real time trace data having a large data bandwidth requirement for accurate data capture, wherein the trace data is streamed to a trace data compression unit in real time. From the data compression unit to a plurality of mass storage units in real time, and means for sending the trace data to remove unnecessary data for accurate data capture from the data compression unit. Means for transmitting to the plurality of mass storage units, means for dividing the trace data into data packets at predetermined intervals, and the data packet to a different one of the plurality of mass storage units. Means for transmitting sequentially, wherein the continuation of said predetermined interval Wherein a between trace data capture and storage device value obtained by multiplying the number of mass storage units, characterized in that at least equal to the bandwidth.