JPH0580816A - Device for evaluating line control circuit - Google Patents

Abstract

PURPOSE:To confirm the propriety of a circuit design by means of an offline by detecting a device which is changed to specifications based on a specified format by means of a comparing means. CONSTITUTION:A ladder circuit designed in accordance with a time chart being the basic specifications is stored in a memory 8 and the memory 2 of a computer 10 with a simulation sequencer CPU at first. The computer 10 reads the specifications by inputting the specified format, the program of the ladder circuit, the input of the device, etc., which are generated based on the basic specifications to store them in the memory 2. Input condition is outputted to the sequencer by the formal calculation of the read specified format with an interface 5 in accordance with operation order to be set. Thus, the simulation sequencer is executed so that the output state of the device changed as the result is read from the memory 8. It is compared and decided whether the change matches the specifications or not and the propriety of circuit design is judged.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a line control circuit evaluation device for evaluating a ladder circuit which is a program incorporated in a sequencer used in an automated line.

[0002]

2. Description of the Related Art Conventionally, tests have been conducted using an actual machine normally used in a line.

As a method of evaluation in advance, there is a method of setting one condition for each sequencer and judging from the result.

[0004]

In the conventional method performed on the actual machine, naturally, since the bug cannot be found in advance, the actual machine cannot be operated until the debugging is completed on the actual machine. There was a problem that the rise was delayed.

In the conventional method of setting the condition for the sequencer one by one, a person sets one condition each time, and the judgment is made based on the result. Therefore, even if the same check is performed, it is necessary to perform the condition one by one from the beginning. It took a huge amount of time and effort. Since there is no correspondence of the mechanical system, it is difficult to make a decision, and if the response of the mechanical system is also input every time, there is a problem that a mistake is likely to occur. Since the conditions are created by a person in consideration of combinations and the like, there is a problem that complicated timing and interlock cannot be sufficiently confirmed.

Before connecting the line control circuit and the equipment including the input / output unit, it was not possible to confirm offline whether or not the circuit design is good by performing an automatic simulation check of the ladder circuit.

[0007]

A line control circuit evaluation apparatus according to the present invention stores a ladder program designed according to basic specifications and stored in a ram in a sequencer, and processes in one direction according to the basic specifications. It stores a specific format that describes the operation contents and the time and operation sequence for each operation in the other direction, stores the device state before the operation of the sequencer, and the state of the device after the operation of the sequencer. In addition to reading from the RAM, the state before the operation of the sequencer stored in the memory is read out and the device in which the state has changed is taken out, and it is compared whether or not it has changed with respect to the specifications based on the specific format stored in the memory. And means for comparison.

According to a second aspect of the present invention, there is provided a line control circuit evaluation apparatus, which is different from the first aspect of the invention in that the circuit causing the device that is changing against the specification based on the specific format is changed. A factor circuit searching means for automatically searching by judging the on / off state of each circuit is added.

According to a third aspect of the present invention, in the line control circuit evaluation apparatus according to the first aspect of the invention, the interlock is forcibly given a non-establishment condition for an object to be interlocked at the time of output. An interlock check means for automatically checking the interlock by determining whether or not it is taken is added.

[0010]

According to the line control circuit evaluation apparatus of the first aspect of the present invention having the above-described structure, when the state of the device changes due to the operation of the sequencer according to the ladder program stored in the RAM of the sequencer, the sequencer stored in the memory Both the device state before operation and the device state after operation of the sequencer stored in the sequencer ram are read out, the device whose state has changed is taken out, and conditions are generated based on the specific format stored in the memory. By comparing whether or not there is a change with respect to the specification with a comparison means, a device that has changed with respect to the specification is detected.

In the line control circuit evaluation apparatus of the second aspect of the present invention having the above-mentioned configuration, the circuit causing the device that has changed against the specifications based on the specific format is searched by determining the on / off state of each circuit. To do.

The line control circuit evaluation apparatus of the third invention having the above-described structure judges whether or not the interlock can be taken by forcibly giving the disabling condition to the object of the interlock at the time of output.

[0013]

According to the first aspect of the present invention, the line control circuit evaluation apparatus automatically detects whether or not the specification is automatically met by detecting the device that is changing with respect to the specification based on the specific format by the comparison means. Since it is possible to check, it is possible to confirm the quality of the circuit design of the control circuit in advance by performing an automatic simulation check of the ladder circuit before connecting the equipment including the control circuit and the mechanical section. Play.

The evaluation device of the line control circuit of the second invention is
Since the circuit causing the device that is changing against the specifications based on the specific format is automatically searched, it is possible to correct the circuit causing the factor to operate properly.

The line control circuit evaluation apparatus of the third invention is
Since the interlock is automatically checked, there is an effect that it is possible to perform the check related to the establishment of various predetermined conditions with sufficient accuracy by human judgment.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An evaluation device for a line control circuit according to an embodiment of the present invention (first to third inventions) will be described below with reference to FIGS. 1 to 4 and Tables 1 and 2.

(Outline of Embodiment) First, an outline of an evaluation apparatus for a line control circuit of an embodiment will be described based on the system conceptual diagram of FIG.

When the ladder circuit is designed based on the basic specifications, which is a time chart of the ladder circuit, and the program of the ladder circuit is completed, the program is first stored in the memory of the simulation sequencer via the CPU.

Next, based on the basic specifications, Table 1 and Table 2
Create a specific format in which the process and operation name and operation content input device XXX setting status and output device YYYY status are described in one direction as shown in Figure 1, and the time and operation sequence for each operation is described in the other direction. To do. Table 1 shows an example of a specific format displayed numerically.
Is an example of a specific format expressed as a mathematical expression.

[Table 1]

[Table 2]

This specific format is stored in the memory of the computer, the input conditions of the device, operation sequence, operation time, interlock, and mechanical system response are determined based on the information of this specific format and input to the simulation sequencer. , Also stored in memory.

The simulation sequencer operates based on the various input conditions, and the output result of the sequencer is stored in the memory of the computer each time.

The quality of the circuit design is judged by comparing and judging by the comparing means whether or not the output result of the sequencer conforms to the specifications based on the specific format.

(Structure of Embodiment) The line control circuit evaluation apparatus of the embodiment has a hardware structure as shown in FIG.
A CP that sets spreadsheets in a specific format based on the basic specifications and sets the input conditions to the simulation sequencer.
U1, a designed ladder circuit program, a specific format, an input condition based on the specific format, a memory 2 for storing an output result of a sequencer, a display device 3 for appropriately displaying a necessary state and a result, and a command. A computer 10 composed of a personal computer consisting of a keyboard 4 for inputting, an interface 5 as a medium for communicating with the sequencer, and a sequencer for inputting a circuit program designed according to the specifications and performing operation calculation of the sequencer. It comprises a CPU 6, a communication mechanism 7 that communicates with the CPU 1 of the computer via the interface 6 and the CPU 6 of the sequencer, and a memory 8 that stores the circuit program and the output result after the sequencer operation.

The basic idea and setting items of the embodiment apparatus are shown below. In the ladder circuit, the program is stored in a floppy disk, and the used device (X, Y, M, etc.) is taken out and the comment file is read out.

As the initial setting of the input device, the state of each device when the power is turned on is set.

The response display of the mechanical system is stored in a floppy disk and set.

The state of each device (before the sequencer CPU run) is secured on the memory 2 as a storage area A. CP
The state of each device during the U run is secured in the memory 2 as a storage area B. The state of each device in which the sequencer CPU run is not equal to that before the CPU run is secured in the memory 2 as the storage area C.

As an initial setting, an initial set value when the sequencer CPU 6 is stopped is set in the storage area A, an inverted state of the initial set value is set in the storage area B, the storage areas A and B are compared, and different. Only the register (C) is output to the memory 8 of the sequencer. Therefore, the initial setting value outputs all registers.

As the reading of the initial change state when the power is turned on, the state of the output device Y is read from the memory 8 of the sequencer and saved in the storage area B while the CPU 6 of the sequencer is running. The device C whose state has changed is created from the storage areas A and B. After that, the contents of the storage area B are copied to the storage area A.

The contents of the operation sequence are extracted from the specific format, that is, the input device X is set to the ON or OFF state, and the output device Y is in the ON or OFF state waiting state.

As a simulation for each designated order, a portion of the input device (X, etc.) obtained from the operation order number in the memory area A is set to a designated state, the memory areas A and B are compared, and only different registers are sequencered. To the memory 8.

The state of the output device when the sequencer CPU 6 runs according to the memory 8 is read from the memory 8 of the sequencer and saved in the storage area B of the memory 2.

The sequencer CPU 6 is stopped, the arithmetic operation of the sequencer is stopped, the states of the storage area A and the storage area B are compared, different registers are calculated,
The contents of the storage area B are copied to the storage area A of the memory 2 after being stored in the storage area C.

In the changed storage area C of the device, it is checked whether the output device Y or the like obtained from the operation sequence number based on the information of the specific format is in the specific state obtained from the operation sequence number, and displayed with judgment. Display on device 3. Changing devices other than the above are also displayed in order.

Storage area C is used for setting the mechanical system response.
Then, if there is an output device Y or other registered in the mechanical system, the corresponding state is set in the storage area A.

March of operation sequence number (increment)
As a result, the judgment made while checking the changed device is
If all devices on the operation sequence number currently being worked are satisfied, the operation sequence number is updated by 1, and if there is no problem, the update is continued until the entire operation sequence number is completed.

When only a partial device on the operation sequence number currently being worked is satisfied with respect to the specifications, the operation sequence number is not updated, but the device once satisfied is removed from the next check. This is because it may be normal for the condition to change after the condition is satisfied once, for example, when the clamp is turned on, the limit switch is turned on, and then the clamp is turned off.

If the device which has not been established is not established even after the elapse of a certain time, the circuit which causes the factor is searched and displayed on the display device 3.

(Operation of Embodiment) The operation and operation of the embodiment apparatus having the above-mentioned configuration and setting will be described with reference to the flow chart shown in FIG. First, the ladder circuit designed according to the time chart which is the basic specification is stored in the memory 8 and the memory 2 of the computer 10 via the simulation sequencer CPU.

The computer 10 inputs the specific format created as shown in Tables 1 and 2 based on the basic specifications, the ladder circuit program, the device input, the interlock input, the mechanical system response input, etc. Is read and stored in the memory 2.

The operation sequence pattern (specification) is read by the spreadsheet of the specific format read in the memory 2, and the input condition is output to the sequencer via the interface 5 according to the operation sequence and set.

Execute the simulation sequencer (C
PU run), and the output state of the device changed as a result is read from the memory 8.

The changed device is taken out, and it is judged by comparing whether or not the change is a predetermined one corresponding to the specification.

If the predetermined state corresponding to the specifications is not reached even after the elapse of a certain period of time, the output circuit is taken out and the circuit that caused it is searched. For example, the reason why the output Y1 does not turn on is that the register M1 is not turned on by the automatic search as shown in FIG. 4, and the same automatic search is performed, and the device X3 is turned on even if the device X4 is turned off. The device X5 is searched for as the factor. As described above, when the device that is not turned on is the internal memory device like M, the output circuit of the internal memory device is taken out, and similarly all the target devices are checked. However, if one of the circuits of the OR condition is on, the circuit part that is not on is excluded.

At this time, if necessary, the ladder circuit related to the device X5 can be modified.

In the normal case, the input conditions are set and the comparison with the output state of the device is automatically repeated according to the operation order of the specific format.

If the changed output state of the device influences the input condition in the operation of the mechanical system, for example, when the limit switch is automatically set to ON when the clamp is ON, the mechanical system response input is applied. , It automatically searches for correspondence and sets input conditions.

If there is a manual condition setting, the condition is set as necessary.

In the above, when the cycle of the specifications is completed, in order to confirm the interlock, a failure condition is forcibly given at the time of output of the device, and it is automatically checked whether or not the interlock is taken. In this case, if necessary, the interlock condition may be reviewed and the ladder circuit may be modified.

In order to make it possible to detect a defect depending on the timing, the order of the conditions input in the same operation order of the specific format is changed including the input of the corresponding mechanical system so that the result is not adversely affected. Check automatically.
That is, the conditions entered in the order of → → → →
The result is checked when the conditions are input in the order of. That is, when a combination of internal memory devices having a holding circuit that holds the internal state is involved, when the set and reset outputs are the same device, when the states of multiple devices are transferred to the same device as application instructions, the power supply When using a latch register that keeps that state without turning off when it is turned off, in a device whose state is determined by the timing of a pulse command, in a circuit which uses a second device, in a device whose state changes by a timer command, and when this device is The circuit to be used corresponds to the combination of changing the operation order.

The checks described in the latter part correspond to so-called tampering checks and are appropriately performed as necessary to improve the completion of the ladder circuit.

(Effects of the Embodiment) In this embodiment, as shown in Tables 1 and 2, the horizontal axis indicates the operation sequence and the time for each operation, and the vertical axis indicates the process, operation content, and input / output device state. Since a specific format indicating, etc. is used, the basic specifications can be organized and embodied, which facilitates debugging, changes in operating time and others, and circuit program modification and creation. Has the effect.

The initial condition (initial register state) is set in advance in the sequencer, and the operation register 1 of the specific format shown in Table 1 indicates that the input register of X054 is in the ON state (indicated by "1" in Table 1 and Table 2). ) Give it to the sequencer. The sequencer is operated for a certain period of time, and operation sequence 21 is repeated in order. In operation sequence 22, X052
The condition that turns on the input register of 1 is given, the circuit is operated, and it is checked for a certain time whether the output device Y50C is in the ON state. If the output device Y50C is not in the ON state, it becomes a factor as shown in FIG. It is possible to search a circuit and output the factor system. When the output device Y50C is turned on, the next operation 23 is executed.

Even if the output Y does not require operation confirmation, if there is a mechanical correspondence such as a clamp and a limit switch, an appropriate input condition is automatically generated according to the mechanical system input / output format and set in the sequencer each time. There is an effect that can be done.

When there are a plurality of input registers in the order like the operation order 23, the input registers of X520 and X521 are exchanged and the same check is automatically performed, so that the operation order in which the timing becomes a problem. The effect that it is possible to check the subtle changes in.

In the operation sequence 23, since the input register of X127 is on condition (indicated by "10" in Table 1), the input register of X127 is forcibly turned off at that point and it is automatically checked whether or not it operates. By doing
It is possible to check the condition of the memory contact by the holding circuit or the like.

The above-mentioned embodiment is shown as an example for the purpose of explanation, and the present invention is not limited to it. Modifications and additions are made as long as they do not violate the idea of the present invention described in the claims. Is possible.

[Brief description of drawings]

FIG. 1 is a system conceptual diagram of an evaluation device of a line control circuit according to an embodiment.

FIG. 2 is a hardware block diagram of an apparatus according to an embodiment.

FIG. 3 is a flowchart of an apparatus according to an embodiment.

FIG. 4 is an explanatory diagram for searching a cause circuit of the apparatus according to the embodiment.

[Explanation of symbols]

 1 CPU 2 memory 3 display device 4 keyboard 5 interface 6 sequencer CPU 7 communication mechanism 8 sequencer memory

Claims (3)

[Claims] 1. A ladder program designed according to the basic specifications and stored in a ram in a sequencer is stored, and according to the basic specifications, a process and operation contents are described in one direction and time and operation for each operation in the other direction. A memory that stores a specific format that describes the sequence and stores the state of the device before and after the sequencer operates, and reads the state of the device after the sequencer operates from the ram of the sequencer according to the operation sequence, and also stores the sequencer stored in the memory. And a comparison means for reading out the device state before the operation, taking out the device whose state has changed, and comparing whether or not the device has changed with respect to the specification based on the specific format stored in the memory. Equipment for evaluating line control circuits. 2. A factor for automatically searching for a circuit, which is a factor of a device that is changing against a specification based on a specific format, by determining the on / off state of each circuit. An evaluation device for a line control circuit, characterized in that a circuit search means is added. 3. The interlock is automatically checked by determining whether or not the interlock can be taken by forcibly giving a failure condition to the target of the interlock at the time of output. A line control circuit evaluation device characterized in that an interlock check means is added.