JPH0580165B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a distributed FET amplifier that aims to improve gain in a high frequency band.

[Prior art] Figure 5 shows, for example, Y.ayasle et al.
“Amonolithic GaAs 1-13 GHz Traveling Wave Amplifier” by Al)
IEEE with the title of traveling−waveamplifier)
Trans.vol.MTT-30, PP976-981, July, 1982
FIG. 1 is an equivalent circuit diagram of the conventional distributed FET amplifier shown in FIG. In Fig. 5, 1 is an input terminal, 2 is an output terminal, 3 is a FET element, and 4, 5, and 6 are respectively the above-mentioned
These are the gate terminal, drain terminal, and source terminal of the FET element 3. 7 and 8 are inductor elements, and 9 and 10 are terminators.

Next, these operations will be explained. First, the microwave power applied to the input terminal 1 propagates through each inductor element 7 in the direction of the terminator 9, but on the way, a part of the microwave power is transmitted to each inductor element 7.
It is supplied to the gate electrode 4 of the FET element 3. Therefore, the microwave power supplied to each FET element 3 is amplified here, and each inductor element 8
are sequentially propagated to output terminal 2. Note that the terminators 9 and 10 are used to absorb unnecessary microwave power and improve reflection characteristics at the input terminal 1 and output terminal 2 to flatten the gain characteristics over a wide frequency band. .

Incidentally, the equivalent circuit of the FET element 3 is normally shown as shown in FIG. In other words, in Figure 6, Cgs is the gate-source capacitance,
Rg is gate resistance value, gm is mutual conductance,
Cds is the capacitance between drain and source,
Rds is the resistance value between the drain and source. Now, when microwave power is applied to the gate terminal 4, a microwave voltage v is generated in a portion forming a capacitor between the gate and the source, and this is amplified by the mutual conductance gm to generate a current source v·gm. Here, since the capacitance Cgd between the gate and drain is generally very small, if this is ignored approximately, the equivalent circuit shown in FIG. It is represented by the side equivalent circuit. In addition, Figure 7a
Both Figure 7 and Figure 7B are equivalent circuits equivalent to a distributed constant line with loss.

Here, since the characteristic impedance zo of the distributed constant line is constant regardless of the frequency, appropriate inductor elements 7 and 8 and terminators 9 and 10 having reactances corresponding to the internal capacitances Cgs and Cds of the FET element 3 are used. By using this, it is possible to obtain an amplifier with low reflection over a wide band.

However, as is clear from Figure 7a, the equivalent circuit on the gate side is equivalent to a distributed constant line with loss due to the resistance value Rg, and the portions constituting the capacitor between each gate and source _The microwave voltages (v _{1 ,} v ₂ , v _{3 ,} v _{4 )} applied to the It will no longer be done. This tendency becomes more pronounced as the frequency increases. Therefore, the higher the frequency, the less efficiently amplification becomes possible, resulting in a problem that the gain in the high frequency region decreases.

[Problems to be solved by the invention] As mentioned above, the conventional distributed FET amplification
There was a problem in that the gain in the high frequency range decreased due to the gate resistance value Rg inside the FET element.

The present invention was made to solve the above-mentioned problems, and an object of the present invention is to obtain a distributed FET amplifier in which the decrease in gain in a high frequency band is reduced.

[Means for solving the problem] The distributed FET amplifier according to the present invention has
An impedance element for DC grounding and the gate/gate of each FET element are connected between the source terminal of the element and the ground.
The capacitance is several times the capacitance between the sources, and the reactance due to the DC grounding impedance element mentioned above is higher than the reactance at the operating frequency!?
It is connected in parallel with a capacitor that exhibits a very small reactance.

[Function] As described above, by connecting a capacitor between the source terminal of each FET element and ground, positive feedback is applied to each FET element in the high frequency band to increase its gain, thereby increasing the gain of the amplifier in the high frequency range. Reduced gain drop.

[Embodiment] Hereinafter, an amplifier according to an embodiment of the present invention will be described as a first embodiment.
The equivalent circuit shown in the figure will be explained. In the figure 1~
10 is similar to the conventional example shown in FIG.
20 is a capacitor connected between the source terminal 6 of each FET element 3 and the ground, and 21 is an inductor element connected in parallel to the capacitor 20. Here, the capacitance Cs of the above capacitor 20
is selected to be several times the gate-source capacitance Cgs of each FET element 3.
Furthermore, the inductance of the inductor element 21
Ls is selected to a value such that 2π Ls≫1/(2π Cs) (2), where the frequency in the used frequency band is taken as the frequency.

In FIG. 1, the inductor element 21 is for DC-grounding the source terminal 6 of each FET element 3. Furthermore, at high frequencies, the capacitor 20 connects a capacitive circuit between the source terminal 6 of each FET element 3 and the ground.
A positive feedback effect is applied to the FET element 3 to improve the gain.

The solid line a in FIG. 2 shows the maximum available gain MAG in the conventional case where the source terminal of the FET element is directly grounded, and the broken line b shows the maximum available gain MAG in the case of the present invention where the source terminal of the FET element is grounded through the capacitor 20. Alternatively, it is a characteristic diagram showing each calculation example of the maximum stable gain MSG. Note that the broken line b indicates the case where the value of Cs is approximately 3.8 times the value of Cgs. Also, the symbol ○ in the diagram is
MSG (defined when stability index K<1), and symbol ● is MAG (defined when K≧1)
It is.

As is clear from the characteristic diagram in Figure 2,
By grounding the source terminal of the FET element via a capacitor, it is possible to
It can be seen that in the high frequency range (15 to 25 GHz), positive feedback becomes strong and the gain increases, although in the high frequency range (15 to 25 GHz), negative feedback becomes strong and the gain decreases slightly.

From the above, in the distributed FET amplifier shown in Figure 1, it is possible to reduce the decrease in gain in the high frequency region, so it is possible to
You can get a FET amplifier.

FIG. 3 is an equivalent circuit diagram of an amplifier according to another embodiment of the invention. In this case, each FET element 3
A resistor 22 with a resistance value Rs is connected in series to the inductor element 21 connected between the source terminal 6 and the ground, and a resistor 24 with one end directly grounded is used in the gate side terminator section, and the drain A circuit formed by connecting a resistor 25 and a capacitor 26 in series is used for the side terminator portion. In addition, 23
is a drain bias voltage application terminal.

In FIG. 3, since the gate DC current at the gate terminal 4 of each FET element 3 is almost 0,
It is grounded in terms of direct current. Here, when a positive voltage Vd is applied to the drain bias voltage application terminal 23 and a direct current Id flows between the source and drain of each FET element 3, the voltage drop Rs·Id due to the resistor 22 causes the gate・A reverse bias voltage of Rs/Id will be applied between the sources. Therefore, each terminal 4, 5, 6 of the FET element
is biased. Therefore, in this case, operation with a single power supply is possible.

FIG. 4 is an equivalent circuit diagram of an amplifier according to still another embodiment of the invention. Incidentally, here, in place of the inductor elements 7, 8 and 21 in FIG. 3, distributed constant lines 27, 28 and 2 are used, respectively.
9, and its operation is almost the same as that shown in FIG.

In addition, although the case where four FET elements were used was shown in the said Example, the number of FET elements may be multiple pieces other than four. Further, the distributed FET amplifier according to the present invention may be a monolithic circuit in which the FET element and the circuit element are formed on the same semiconductor substrate.

[Effects of the Invention] As described above, according to the present invention, an impedance element for DC grounding is provided between the source terminal of each FET element and the ground, and a capacitance that is several times the capacitance between the gate and source of each FET element is provided. By connecting a capacitor that exhibits a reactance much smaller than the reactance of the DC grounding impedance element at the operating frequency, positive feedback is applied to the FET element in the high frequency region to increase its gain. Therefore, it is possible to obtain a distributed FET amplifier with little gain reduction in the high frequency region.

[Brief explanation of drawings]

FIG. 1 is an equivalent circuit diagram according to an embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram of a conventional example and an embodiment according to the present invention.
A characteristic diagram for calculating the maximum available gain or maximum stable gain of the FET element, FIGS. 3 and 4 are equivalent circuit diagrams of an amplifier according to another embodiment of the present invention, and FIG. 5 is a conventional distributed FET amplifier. Equivalent circuit diagram of 6th
The figures are equivalent circuit diagrams of FET elements, Figure 7a and Figure 7.
FIG. b is an equivalent circuit diagram of the equivalent circuit shown in FIG. 5, viewed from the gate side and the drain side, respectively. In the figure, 1 is the input terminal, 2 is the output terminal, and 3 is the input terminal.
FET element, 4 is gate terminal, 5 is drain terminal,
6 is a source terminal, 7, 8 and 21 are inductor elements, 9 is a gate side terminator, 10 is a drain side terminator, 22, 24 and 25 are resistors, 20 and 26 are capacitors, and 23 is a drain bias voltage application. Terminals 27, 28, and 29 are distributed constant lines. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

[Claims] 1. Each gate terminal of a plurality of adjacently arranged FET elements and each drain terminal of the FET elements are connected by an inductor element, and the terminal opposite to the gate side input terminal and the drain In a distributed FET amplifier in which a terminator is connected between the opposite side output terminal and the ground, an impedance element for DC grounding is connected between the source terminal of each FET element and the ground, and an impedance element for DC grounding is connected between the source terminal of each FET element and the ground. A distributed FET amplifier characterized in that a capacitor is connected in parallel with a capacitor having a capacitance several times as large as the capacitance between the gate and the source, and exhibiting a reactance much smaller at the operating frequency than the reactance of the DC grounding impedance element. 2. The distributed FET amplifier according to claim 1, wherein the DC grounding impedance is an inductance element. 3 The DC grounding impedance is a series connection of an inductance element and a resistor, the drain side terminator is a series connection of a resistor and a capacitor connected between the drain bias application terminal and ground, and the gate side Claim 1 or 2, wherein the terminator is a resistor for DC grounding.
Distributed FET amplifier as described in Section. 4 Claims 1 to 3, wherein the inductance element is a distributed constant line.
Distributed FET amplifier according to any of paragraphs.