JPH0575663A - Demodulator - Google Patents

Abstract

PURPOSE:To prevent malfunction of a receiver side of a demodulation main signal at the time of out of synchronism. CONSTITUTION:A phase modulation signal (a) is applied to a phase detector 1 and subjected to synchronization detection by a reproduced carrier (f) being an output signal of a VCO 4 and a base band signal (b) is outputted. The base band signal (b) is inputted to an identification device 2 and an APC 3, and a demodulation main signal (c) is outputted from the identification device 2. Moreover, the APC 3 outputs an APC signal (e) to control the VCO 4. The APC signal (e) is also fed to a carrier asynchronous detection circuit 5, and when the carrier asynchronous detection circuit 5 detects it that a reproduced reference carrier (f) is in the synchronization state, a control signal (g) controls a switch circuit 6 to output a demodulation main signal (c) outputted from the identification device 2 as a demodulation main signal (d). However, when the reproduced carrier is asynchronous, the carrier asynchronous detection circuit 5 uses the control signal (g) of a preset logic level to control the switch circuit 6 thereby preventing a random signal from being outputted from the identification device 2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a demodulator, and more particularly to a PS
The present invention relates to a K, QAM modulation type demodulator.

[0002]

2. Description of the Related Art A conventional demodulator will be described with reference to the drawings.

FIG. 2 is a block diagram showing an example of a conventional demodulator.

Referring to FIG. 2, in the conventional demodulator, a multi-valued quadrature amplitude or multi-phase PSK modulated wave a is synchronously detected by a phase detector 1 by a reproduced carrier f from a voltage controlled oscillator (hereinafter referred to as VCO) 4, The band signal b is output, the base band signal b is supplied to the discriminator 2, the demodulation main signal c is output from the discriminator 2, and the base band signal b is also supplied to the automatic phase control circuit (APC) 3. Been AP
The C signal e is generated, the VCO 4 is controlled by the APC signal e, and the alarm display circuit 11 displays an alarm when the carrier asynchronous drive circuit 5 detects out-of-sync with the APC signal e.

[0005]

The above-described conventional demodulator has a structure in which an alarm is displayed and a random signal is output as the demodulation main signal when the reproduced carrier wave is out of synchronization. When a signal is output, pseudo-pull-in may occur in the frame synchronization circuit, and when the pseudo-pull-in occurs, information indicating that the frame is synchronized is output. So, for example, I considered a time domain automatic equalizer. If you are in sync, Z
In some cases, a control method called F method (Zero Forcing method) is used, a control method different from the ZF method is used in the asynchronous state, and a control method for shortening the synchronization pull-in time is used. Further, when considering the line switching device, the switching operation may be performed with the information from the frame synchronization circuit as the switching condition. Therefore, when the time domain automatic equalizer, the line switching device, or the like is controlled by the information from the frame synchronization circuit by the above-mentioned communication method, there is a drawback that it malfunctions.

[0006]

A demodulator of the present invention is a demodulator for digital microwave communication using a multilevel PSK or QAM modulation system, and a detector for detecting out-of-synchronization of a reference carrier recovery circuit. And a switch circuit that outputs a preset constant logic level signal when the detector detects out-of-sync and does not output a random signal from the phase detection discriminator.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention.

In FIG. 1, in this embodiment, a phase detector 1 for performing synchronous phase detection of an input phase modulation signal a by a reference carrier f from a VCO 4 and an analog signal (base signal) corresponding to either phase of the phase detector 1 are used. A discriminator 2 for converting a band signal b) into a digital signal c, and a baseband signal b
APC3 that outputs an APC signal e having a DC voltage corresponding to the analog amount of A, a VCO4 that outputs a reference carrier wave f having a different frequency depending on the voltage level of the APC signal e, and
A carrier wave non-synchronization detection circuit 5 for detecting out-of-synchronization between the input phase modulation signal a and the reference carrier wave f by the PC signal e;
The discriminator 2 is controlled by the control signal g of the carrier wave asynchronous detection circuit 5.
And a switch circuit 6 for opening and closing the output of the demodulated main signal c.

Next, the operation of this embodiment will be described.

The phase detector 1 is applied with the phase modulation signal a, is synchronously detected by the reproduced carrier f which is the output signal of the VCO 4, and outputs the baseband signal b.

The baseband signal b is the discriminator 2 and the APC 3
, And the demodulator main signal c is output from the discriminator 2. Further, the APC 3 outputs the APC signal e and controls the VCO 4. The APC signal e is also supplied to the carrier asynchronous detection circuit 5, and when the carrier asynchronous detection circuit 5 detects that the reproduced reference carrier f is in the synchronous state, the control signal g
The switch circuit 6 is controlled to output the demodulation main signal c output from the discriminator 2 as the demodulation main signal d.

However, when the reproduced carrier wave is in an asynchronous state,
The carrier wave asynchronous detection circuit 5 controls the switch circuit 6 by the control signal g having a preset logic level to determine the discriminator 2
Do not output a random signal from.

As a result, in the frame synchronization circuit, it is possible to implement normal operations such as control of the time domain automatic equalizer or line switching by preventing pseudo pull-in.

[0015]

As described above, according to the present invention, the switch circuit is operated by the control of the carrier wave asynchronous detection circuit for detecting the out-of-synchronization of the reference carrier wave reproduction circuit, and the demodulation main signal output from the discriminator is output at the time of synchronization. By selecting and not allowing the discriminator to output a random signal when asynchronous, there is an effect that it is possible to prevent the random signal from erroneously operating the control of the time domain automatic equalizer, the line switching, or the like.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a block diagram showing an example of a conventional demodulator.

[Explanation of symbols]

 1 phase detector 2 discriminator 3 automatic phase control circuit (APC) 4 voltage controlled oscillator (VCO) 5 carrier wave asynchronous detection circuit 6 switch circuit 11 alarm display circuit

Claims (1)

[Claims] 1. A demodulator for digital microwave communication using a multilevel PSK or QAM modulation method, wherein a detector for detecting out-of-synchronization of a reference carrier recovery circuit and preset when this detector detects out-of-synchronization And a switch circuit that outputs a fixed logic level signal and does not output a random signal from the phase detection discriminator.