JPH0570990B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Application of the Invention) The present invention relates to an FM signal generator.
This relates to an FM signal generator.

(Prior Art) One of the color television systems is the SECAM system. This method uses two color difference signals (R-
Y) and (B-Y) are sent alternately (line sequentially) every horizontal scan, and are converted into simultaneous signals using a one-line delay line on the receiver side. That is,
First color difference signal Dr' proportional to (RY) = -1.9
Frequency modulates the first color subcarrier signal fr with a frequency of 4.40625 MHz with (Er'-Ey'), and modulates the second color difference signal Db' = 1.5 (Eb'-Ey') proportional to (B-Y). The second color subcarrier signal fb with a frequency of 4.25000 MHz is frequency-modulated, and these frequency-modulated color subcarrier signals are alternately multiplexed into a luminance signal via a shaping filter called a bell filter. .
Here, the dash symbols Er', Ey', and Eb' represent gamma correction.

FIG. 10 is a circuit diagram showing an example of a conventional FM signal generator using the SECAM method. In FIG. 10, 1 is a memory;
Contains frequency pattern data for SECAM-based FM signals. Specifically, it supports known standard color signals such as color bar signals.
Frequency data of two color difference signals in the SECAM method are stored. 2 is a D/A converter that converts the data added from memory 1 into an analog signal; 3 is a waveform processing circuit that performs pre-emphasis processing on the analog output signal of D/A converter 2; 4 is the output of waveform processing circuit 3. A voltage controlled oscillator 5 converts voltage into a frequency signal, and 5 converts the output signal of the voltage controlled oscillator 4 into a video tape recorder (hereinafter referred to as VTR).
6 is a switch for selecting a frequency signal, and 7 is an output terminal.

With this configuration, a predetermined SECAM system FM signal is selected by the switch 6 and sent to the output terminal 7.

However, according to such a configuration, a frequency converter must be used to obtain a signal for a VTR, and the circuit configuration becomes complicated. That is, as described above, the frequency of the first color subcarrier signal fr used in the SECAM system is 4.40625 MHz, and the frequency of the second color subcarrier signal fb is 4.25000 MHz, and recording processing cannot be performed on a VTR as is. Therefore, for example, by mixing it with a signal of a constant frequency of about 3MHz using a mixer,
I am trying to extract the low frequency components of the mixed output.
According to this, only the carrier frequency can be lowered while keeping the frequency shift amount unchanged. Furthermore, since a voltage controlled oscillator is used, it is difficult to obtain a highly accurate and highly stable FM signal. Furthermore, since the FM signal output from the voltage controlled oscillator contains many harmonics, a low-pass filter with excellent characteristics must be used. In particular, in the case of β-method VTR signals, approximately
Since it has a band of 200KHz to 1.4MHz, a special filter is required. Furthermore, since a plurality of analog circuits such as the waveform processing circuit 3, VCO 4, and frequency converter 4 are used, the number of adjustment points increases.

(Objective of the Invention) The present invention focuses on these points, and its purpose is to achieve digitalization with a relatively simple circuit configuration, and to achieve low cost, high precision, high stability, and high quality. An object of the present invention is to provide an FM signal generator that generates various FM signals.

(Summary of the Invention) The present invention that achieves these objects is
Frequency data of two color difference signals in the method,
a memory storing at least one of the frequency data of a brightness signal for a VTR using the NTSC method; a method selection circuit that selectively outputs carrier frequency data corresponding to the frequency data of each method outputted from the memory; An adder that adds the frequency data of each method output from the memory and the carrier frequency data of each method output from the method selection circuit, and the output data of this adder is successively integrated according to the clock and output as phase data. a data converter that converts pre-stored frequency data into waveform data whose frequency is shifted by reading the phase data output from the multiplier as an address; A D/A converter that converts output data into an analog signal.

(Example) Hereinafter, a detailed explanation will be given using the drawings.

FIG. 1 is a configuration explanatory diagram showing one embodiment of the present invention, and parts equivalent to those in FIG. 10 are given the same reference numerals. In Figure 1, 8 is a data processing circuit that performs pre-emphasis processing on the data output from memory 1, and 9 is a data processing circuit that performs pre-emphasis processing on the data output from memory 1. This is a method selection circuit that selectively adds predetermined carrier frequency data to create a corresponding color signal, and the output data of these data processing circuits 8 and method selection circuit 9 are added in an adder 10 and added to an integrator 11. It will be done. A clock signal from a clock generator 12 is applied to the integrator 11, which integrates the data added from the adder 10 at the timing of this clock signal, and converts the phase data, which changes sequentially according to the clock signal, to the data converter 13. Add to. The data converter 13 converts the phase data into waveform data whose frequency is shifted (hereinafter referred to as frequency shift data), and converts this frequency shift data into D/
Add to A converter 2. The D/A converter 2 converts the frequency shift data into an analog signal of a predetermined frequency. The output signal of this D/A converter 2 is sent to an output terminal 15 via a filter 14 having predetermined characteristics, such as a bell filter or a low-pass filter.

2 and 3 are circuit diagrams showing the specific configuration of FIG. 1. FIG. First, data processing circuit 8
is, for example, 9 bits added from memory 1.
Multiplier 81 performs ²⁵ times the operation on data fin in memory 1 of 2KHz/LSB and outputs 14-bit data with the lower 5 bits being 0. Data fin is added to one input terminal, and 11-bit data is generated. an adder 82 that outputs 14-bit output data, an adder 83 to which the read timing clock RCLK of data fin is added and 14-bit output data fed back to one input terminal; The bit data is added to the other input terminal of the adder 83.
Adder 84 to which the 14-bit data output from is added and outputs 14-bit data;
A multiplier 85 multiplies the data output from the adder 84 by 1/2 ^{to 4} times and adds 10 bits of data to the other input terminal of the adder 82. The multiplier 86 multiplies the data by 1/-2 and adds 8-bit data to the other input terminal of the adder 83. The data processing circuit 8 thus constructed functions as a digital filter having pre-emphasis characteristics, and FIG. 4 shows its analog equivalent circuit, and FIG. 5 shows its step response characteristics. The method selection circuit 9 is 14 bits and 250Hz/LSB.
The multiplexer 91 selects carrier frequency constants corresponding to each of the VTR (VHS), VTR (β), and standard signal in accordance with a system selection signal. The 14-bit data output from multiplexer 91 is applied to one input terminal of adder 16. Note that the other input terminal of the adder 16 is connected to a multiplier 17 that performs a 16-fold operation on 8-bit 4KHz/LSB frequency offset data.
12 bits of data are added, and 15 bits equals 250
Hz/LSB data is applied to one input terminal of adder 10. This adder 16 adds an offset frequency to the carrier frequency for programmably fine-tuning the output frequency. The data in the adder 82 of the data processing circuit 8 is transferred to the multiplier 1
The adder 1 constitutes an offset selection circuit 19 ^that selects a predetermined offset frequency according to two types of color signals.
91 is applied to one input terminal. The other input terminal of this adder 191 is connected to a switch 1 which is switched and controlled by a control signal fv/2 synchronized with the screen.
92, 14-bit offset frequency data of 250 Hz/LSB is added, and 16-bit data is output. This 16-bit data is limiter 2
It is limited to 14 bits at 0 and applied to the other input terminal of adder 10. In addition, in the case of VTR (VHS), it is multiplied by 1/4 in multiplier 21 and becomes 500Hz/
It becomes LSB data. Adder 10 outputs 15-bit data and adds it to integrator 11. The integrator 11 receives the frequency data added from the adder 10 from the clock generator 12.
It integrates with a 16.384MHz clock to create 10-bit phase data (0° to 360°). This integrator 11 has a latch circuit 111 that latches frequency data according to a clock, and 15-bit output data of the latch circuit 111 is added to one input terminal via a latch circuit 112 to output 16-bit data. This data is also sent to the latch circuit 114.
The adder 11 is fed back to the other input terminal via
The upper 10 bits of the 16-bit data are sent to the data converter 13. The data converter 13 converts the phase data added from the integrator 11 into sine wave data, and stores data as shown in FIG.
It can be obtained by adding phase data as a ROM address. According to this embodiment,
Sine wave data synchronized to a 16.384MHz clock can be obtained. The output data of this data converter 13 is applied to a polarity switching circuit 22 that switches the polarity of data between positive and negative according to control signals fh/2 and fv/2.

In such a configuration, each circuit up to the adder 10 calculates carrier frequency data, offset frequency data, frequency shift data, etc. for each method for each color signal. These various frequency data are added by an adder 10 and applied to an integrator 11, where they are converted into phase data as shown in FIG. In FIG. 7, the horizontal axis represents time, the vertical axis represents the output data of the integrator 11, the 〇 mark represents the case where the input frequency data is f ₁ , and the × mark represents the case where the input frequency data is f ₂ (f ₁ < f ₂ ). As is clear from FIG. 7, the input frequency data appears in the output data as increments for each clock. Here, the output data is 10
Because of the bit width, if one period is 10 bits wide, the output data will be phase data that rotates at a speed proportional to the input frequency data. By applying the phase data f ₁ and f ₂ created in this manner to the address of the ROM constituting the data converter 13, a relationship as shown in FIG. 8 can be obtained between the phase data f 1 and f 2 and the data in the ROM. Then, when these output data are expressed with time on the horizontal axis, the 9th
As shown in the figure, f ₁ has a solid line waveform, and f ₂ has a broken line waveform. A necessary analog signal can be obtained by D/A converting such output data by the D/A converter 2 every clock.

With such a configuration, it is possible to achieve complete digitalization, and the adjustment work required in the case of analog circuits can be significantly reduced. Furthermore, standard color signals and VTR signals can be obtained with the same configuration. Furthermore, since frequency stability and accuracy are governed by the characteristics of the clock, an extremely stable and highly accurate signal can be obtained. In addition, the analog signal obtained in this way has the clock frequency fc,
If the frequency of the color signal is fo, it has frequency components of fc±fo, and if fc−fo>fo, a high-quality signal without spurious can be obtained in the entire required band.

In the above embodiment, an example of a SECAM color signal generation device has been described, but the device is not limited to this, and can be used for each television system (NTSC, PAL,
In addition to the color signal of SECAM), it is also possible to obtain the luminance signal of VTR (VHS, β) compatible with each television system.

(Effects of the Invention) As explained above, according to the present invention, various FM signals can be generated with a relatively simple circuit configuration, digitization, low cost, and high precision, high stability, and high quality. An FM signal generator can be realized, and it is suitable for television signal generators and the like.

[Brief explanation of drawings]

FIG. 1 is a configuration explanatory diagram showing an embodiment of the present invention;
2 and 3 are circuit diagrams showing the specific configuration of FIG. 1, FIG. 4 is an analog equivalent circuit of the data processing circuit used in the present invention, and FIG. 5 is a step response characteristic diagram of FIG. 4. FIG. 6 is a data explanatory diagram of the data converter used in the present invention, FIG. 7 is an explanatory diagram of the operation of the integrator used in the present invention, FIG. 8 is an explanatory diagram of the operation of the data converter used in the present invention, and FIG. is an explanatory diagram of its output data, and FIG. 10 is an explanatory diagram of a configuration showing an example of a conventional device. It is. 1... Memory, 2... D/A converter, 8... Data processing circuit, 9... Method selection circuit, 10... Adder, 11... Integrator, 12... Clock oscillator, 13... Data Converter (ROM), 14...
Filter, 15...output terminal.

Claims (1)

[Claims] 1. A memory storing at least one of frequency data of two color difference signals in the SECAM system and frequency data of a VTR brightness signal in the NTSC system, and frequency data of each system output from this memory. a method selection circuit that selectively outputs carrier frequency data corresponding to the method; an adder that adds the frequency data of each method output from the memory and the carrier frequency data of each method output from the method selection circuit; An integrator that sequentially integrates the output data of the adder according to the clock and outputs it as phase data, and a frequency deviation that is calculated by reading out the phase data output from the integrator as an address from pre-stored frequency data. An FM signal generating device comprising: a data converter that converts the data into analog waveform data; and a D/A converter that converts the output data of the data converter into an analog signal.