JPH0564809B2 - - Google Patents

Description

[Detailed Description of the Invention] [Objective of the Invention] (Industrial Application Field) This invention relates to a unit used for unification processing or unification search in information processing, particularly knowledge information processing and knowledge base processing. The present invention relates to a selection device for unified candidate terms.

(Conventional technology) In Prolog, which is one of the knowledge information processing languages,
A target term (target term) is given to a program consisting of a set of predicates (term set) expressed using the form called "term", and can this target term be satisfied by the term set in the program? The basis of processing is to check whether the terms are different, and in this process, the unification of terms plays an important role (Prolog Programming by WFCloksin/CS Mellish, translated by Katsuhiko Nakamura). ” Published by Microsoft Ware: Reference).

Success or failure of unification of two terms t1 and t2 is t1
If and t2 are exactly the same, unification is successful, t1 or
When there is a variable in t2, if it can be made to match the other by assigning an appropriate term to that variable (assuming that the same term is assigned to the same variable), unification is successful, and these If unification is not successful, it is defined as unification failure.

Conventional processing methods for this unification often employ a method of sequentially examining the expressions between the target term and one term in a term set, which is a collection of terms to be unified. However, with this method,
Even though there are only a few terms in the term set that can be successfully unified with the target term, in order to unify with these few terms, which is meaningful as a process, more failures are possible. The disadvantage was that it required a lot of unification work. As a result, the unification process has traditionally been time-consuming, and Prolog programs have often run slower than programs in other languages.

(Problems to be Solved by the Invention) As described above, in the conventional unification candidate term selection device, the task of unifying the target term with many terms for which unification may fail is performed. indispensable,
There was a problem with slow execution speed.

The present invention has been made to solve these problems, and is a unification method that can quickly unify each term in a term set consisting of a plurality of terms and a target term. An object of the present invention is to provide a candidate item selection device.

[Structure of the Invention] (Means for Solving the Problems) The present invention provides a means for solving the problem when attempting to unify each term of a term set including a plurality of terms and a target term. Instead of attempting to unify all terms, if there is a term that can be unified, it attempts to unify only with each term in the subterm set that always includes that term. In other words, we try to shorten the overall processing time and increase execution speed by not attempting to unify most of the terms that fail to unify from the beginning. It is something.

In order to select a unification candidate term set as a partial term set from a term set including a plurality of terms in such a way that the target term and terms that can be unified are always included, the present invention uses the following method. a term set storage means described in
It is characterized by comprising a target term input means, a general term address generation means, an equal term address generation means, an index storage means, a registration means, and a search/selection means.

The term set storage means stores a term set whose elements are a plurality of terms to be searched.

A target term input means and a target term are input.

When an arbitrary term is given from the term set storage means or the target input means, the general term address generating means generates and outputs an address specifying the kernel from the kernels of all general terms of that term. be.

The equal term address generation means generates and outputs an address specifying the kernel from the kernel of the given arbitrary term.

The index storage means receives an arbitrary term from the term set storage means, and stores the identifier of the term related to the general term in the storage location indicated by the address generated by the general term address generation means as a general term index. At the same time, when an arbitrary term is given from the term set storage means, the identifier of the term is stored as an isomand index in a storage location indicated by the address generated by the isomand address generation means. .

When an arbitrary term is given from the term set storage unit, the registration unit writes an identifier of the term in a storage location of the index storage unit indicated by the address generated by the general term address generation unit. By registering the general term index and receiving an arbitrary term from the term set storage means, the corresponding item is stored in the storage location of the isomerical index storage means indicated by the address generated by the isomerical address generation means. The equinominal index is registered by writing the identifier of the term.

The search/selection means receives the target term from the target term input means, searches the equinominal index in the index storage means with each address generated by the general term address generation means, and inputs the target term input. When a target term is given from the means, the general term index is searched by the address generated by the isomerical address generating means, and when a target term is further given from the target term input means, the isomerical address generating means The above-mentioned equality index is searched using the address generated by , and if a registered term identifier is found, it is read out as a unification candidate term.

(Function) In the present invention, since the general term address generation means is particularly important, its function will be explained, but as a preparation, the general term will be explained.

The expression of a "term" is similar to that of a function used in mathematics, and is expressed, for example, as f(g(a,b),h(X)). Here, f, g, h, etc. are a kind of function symbol, and there is a place where two terms can be substituted for each of f and g. In this case, f has terms g and h, g contains terms a and b, respectively. Also, h has a place where one term can be substituted, and contains a variable called X. In this case, "the arity of f, g is 2, the arity of h is 1, a,
The arity of b is 0.'' Also, f,
Let g, a, b, etc. be called constants with respect to X (variables).

Now let us take the example of the above term as t1 (t1=f(g
(a, b), h(X)), and terms that can be unified with t1 include t2=f(g(a, Y), h(g(c, a))). In this case, the unification is X=g(c,a),
If Y=b, both t1 and t2 are f(g(a,
b), h(g(c,a))), so it is successful.
In this way, there are other terms that can be unified with t1, such as f(g
(a, b), h(f(d(b, h(c), k), Z))
),
f(g(a,b),h(d(y,b,a))),...f
(X, h(g(a, Y))), etc., and there are an infinite number of them. Unification is like this, in terms that include variables:
Since it is possible to succeed with an infinite number of opponents, it is not possible to use the method of speeding up the search by pre-registering it in a hashing table, as in a simple match search.

By the way, as a term expression, in addition to the above expression, each constant is paired with its arity and written in the order of their appearance without using parentheses "( )".
There is a "linear expression". According to this expression, the above
t1 and t2 are t1=f:2, g:2, a:0, b:0, h:
1, X: 0 t2=f: 2, g: 2, a: 0, Y: 0, h:
It is written as 1, g: 2, c: 0, a: 0 ■. Also, the term resulting from unifying these is
Assuming t3, t3 = f: 2, g: 2, a: 0, b: 0, h:
It is written as 1, g: 2, c: 0, a: 0 ■. When a variable is assigned in this way (by unification), only the area to the left of the position of the variable is affected in the linear representation.

When we express term t in a linear expression, we define the sequence of constants starting from the left end until the first variable appears, or if the variable does not appear, the entire term as the "nucleus" of that term.
and write K(t). Further, the number of constants included in the nucleus of term t is defined as the "left constant length" of that term, and is written as L(t). In the above example, the kernel and left constant length of each term are as follows.

nuchal nucleus
Left constant length t1...f: 2, g: 2, a: 0, b: 0, h:
1...5 t2...f:2, g:2, a:0...3 t3...f:2, g:2, a:0, b:0, h:
1, g: 2, c: 0, a: 0...8 Based on these preparations, consider the necessary conditions for unification.

As a necessary condition for t1 and t2 to be unified,
The following conditions are possible.

[1] In order for t1 and t2 to be unified, let the left constant lengths of t1 and t2 be n1 and n2, respectively, then compare the linear expressions of t1 and t2, and calculate from the left end
The constants up to min{n1, n2} must match completely.

This is because, in unifying these terms, whichever appears after min{n1, n2}+1st,
Or, no matter how you substitute both variables, the resulting change in term will be expressed in linear terms.
The effect only appears after min{n1, n2}+1, and the area from the left end to min{n1, n2} remains unchanged, so if there is a mismatch in this part, no matter how you perform the assignment, the mismatch cannot be resolved. First, unification is not possible (failure).

Rewriting this requirement, we can write it as follows.

[2] In order for t1 and t2 to be unified, let the left constant lengths of t1 and t2 be n1 and n2, respectively. (a) If n1>n2, then...the n2th from the left end must match. . In other words, the constants up to the n2th kernel of t1 match the kernel of t2.

(b) If n1<n2... there must be a match up to the n1th from the left end. In other words, the constants up to the n1th kernel of t2 match the kernel of t1.

(c) If n1=n2... there must be a match up to the n1 (or n2)th from the left end. In other words, K(t1)
and K(t2) must match completely.

is necessary.

Here, when (a) of the above necessary conditions is satisfied, define ``t2 is a 'general term' of t1.'',
Let's say that t2 is more 'general' than t1. Furthermore, when (c) holds, it is defined that ``t2 is an 'equal term' of t1.'' Furthermore, the entire general term of term t is written as g☆t.

Considering the above definition and further investigating the necessary conditions for unification of t1 and t2 ([2] above), the following three cases can be investigated.

[3] (a) Is there something in K(g☆t) that is the same as K(t2)? (b) Is there something in K(g☆t2) that is the same as K(t1)? (c) Are K(t1) and K(t2) the same? This check is a check to see if they are all equal, and since there are a finite number of K(g☆t1) and K(t1) (L(t1)) and they can be made in advance, a hashing table or You can use a method of registering it in an index table and finding it quickly. The present invention is based on this fact.

Now, when a certain term is given, the general term address generation means generates the kernel of (all) general terms of that term (K(g
☆t1)), the core outputs the address of the index storage means using a certain algorithm. For example, for the antecedent t1, the kernel of its general term (K(g☆
t1)) is k11:f:2,g:2,a:0,b:
There are five character strings: 0- k12:f:2, g:2, a:0- k13: f:2, g:2- k14: f:2- k15:-. For example, the following address is generated by converting it into an address in the range of 0 to 255.

(X “…” represents a hexadecimal number) A (k11) = X “0E” A (k12) = X “36” A (k13) = X “AB” A (k14) = X “66” A ( k15)=X“00” When the equal term address generation means is given a certain term, it outputs the address of the index storage means from the kernel of the term using a certain algorithm. The algorithm used at this time is the same as the algorithm used by the general address generation means for the same storage means. For example, for t1 in the previous example, its kernel K(t1) is K10:f:2,g:2,a:0,b:0,
h:1,-, and the same hashing algorithm as before outputs the following number as an address to the index storage means.

A(k10) = Since the index storage means is searched by the general address and the equinominal address,
Search for unification candidate terms can be performed at high speed.

(Example) Hereinafter, a first example of the present invention will be described based on FIGS. 1 to 6.

FIG. 1 is an overall configuration diagram of a unitization candidate term selection device according to this embodiment. As shown in the figure, this device includes term set storage means 10 and target term input means 2.
0, the general address generation means 30, the equality address generation means 40, the general term index storage means 50, the equality index storage means 52, the registration means 60, the search and
It is composed of a selection means 70.

The term set storage means 10 is a means for storing terms to be unified, and as shown in FIG. 2, it consists of a term storage section 11, a term definition section 12, and a term set specification section 13. has been done. The term storage unit 11 stores each element when a term is expressed in linear expression. The term definition unit 12 stores the definition of each term using each element in the term storage unit 11. Further, the term set specifying unit 13 specifies and stores term sets using a set of term identifiers such as pointers to a plurality of term definitions in the term definition unit 11. These specific storage formats will be described later.

The target term input means 20 is a means for inputting a term to be the target of unification from outside the apparatus.

When a certain term is given, the general term address generating means 30 generates an address in the range of 0 to 255, for example, by hashing the character strings forming the kernels of all the general terms of that term. This is means for converting and outputting the address of the general term index storage means 50.

The equal term address generation means 40 is a means for outputting the address of the equal term index storage means 52 by hashing from the kernel of the term, similar to the general term address generation means 30, when a certain term is given.

Further, in this embodiment, two index storage means, a general index storage means 50 and an equal index storage means 52, are used.
index storage means. These index storage means are means for storing, for each term in the term set, a term identifier such as a pointer to the term at a specific address for the kernel of that term or its general term.

As shown in FIG. 3, the registration means 60 is composed of a general term registration section 61, a first equality registration section 62, and a second equality registration section 63. The first isomer registration unit 62 stores isomer indexes designated by addresses generated by the isomer address generator 40 for each term of the specified term set stored in the term set storage means 10. A control section that writes the term identifier to a storage location in the means 52. In addition, the second equal term registration unit 6
1 is stored in the storage location in the general index storage means 50 specified by the address generated by the equinominal address generation means 40 for each term of the specified term set stored in the term set storage means 10. , is a control unit that writes the term identifier.

Further, the search/selection means 70 includes a general term search/selection section 71 and a first equinominal search/selection section 72, as shown in FIG. The first equinominal search/selection unit 72 is configured to perform a general term index storage unit 5 designated by an address generated by the equinominal address generation unit 40 for the target term inputted from the target term input unit 20.
This is a control unit that outputs the term or term identifier stored in the storage location in 0.

FIG. 5 is a diagram showing a storage method of terms and term sets in the term set storage means 10. Term set storage means 1
The term storage unit 11 in 0 is for defining and storing constants and variables that are elements of terms, and the name storage unit 14
and a symbol definition section 15.

The name storage unit 14 is a storage device with 32 bits per word.
This part starts from the address and stores the spelling of the name of each symbol. The spelling of the name of one symbol consists of one or more characters, and each word is divided into four characters and stored. The blank space within a word is filled with a symbol (/) that indicates the end of spelling or a blank space. For example, the symbol name “likely” is stored at address N+15, but this name is 6
Since it consists of letters, we use the memory location of the two-word sentence, and 1
The word up to "like" is stored in the first word, and the second word is "ly//", which is the remaining "ly" and the margin "//".

The symbol definition section 15 also starts from address A of the storage device of 32 bits per word, and is a section that stores the arity of each symbol used in a term and the symbol definer of that symbol in pairs. In addition,
Here, the symbol definer is the name storage unit 14.
N of the memory location where the symbol in question is stored
It shows a relative address from. For example, the symbol "f" appearing in the term t1 in the above example is defined at address A+6, and the arity is 2.
The relative address of the name (“f”) in the name storage unit 14 is
It shows that it is 11. Furthermore, in the case of a variable, its arity is always 0, so instead of arity, X "FF" indicating that it is a variable is stored.
For example, the symbol representing the variable "X" in the above term t1 is defined at address A+100, and its contents are FF indicating a constant and "X" in the name storage section.
It shows the relative address 17 of the storage location where is stored.

The term definition section 12 is also a section starting from the T address of the storage device of 32 bits per word, and pairs the arity of each symbol when a term is expressed in a linear expression with a term element descriptor, and calculates the term in a linear expression. This is the part that stores in the order of appearance. Note that the term element descriptor here indicates the relative address from A of the storage location in the symbol definition unit 15 where the symbol descriptor for the symbol is stored. For example, in the above example, the term t1 is stored from address T+25, and the linear representation of t1 is: f:2, g:2, a:0, b:0, h:1,
X: represents 0.

Although not shown in FIG. 5, the term set designation unit 13 is composed of a storage device that can store a plurality of term identifiers. As shown in FIG. 5, the term identifier includes the number of symbols included in the term and the relative address from T of the storage location where the term is defined in the term definition section 12 (pointer to the term).
Contains. For example, in the case of example t1 above,
As shown in 16 in the figure, the term identifier is the number of symbols of t1, 6, and the relative address 25 of t1 in the term definition section 12.
Contains.

FIG. 6 shows the principle and operation of selecting unification candidate terms in this embodiment.

In this embodiment, the registration means performs an operation of quickly finding a term from a term set that meets the unification requirements [3] (a), (b), and (c) described in (Operation) above. 60
and a search/selection means 70. That is, when one term in the term set is t1 and the target term is t2, the general term registration unit 61 and the first equinominal search/selection unit 7
2, the necessary condition (a) includes the first equality registration unit 62 and the general term search/selection unit 7.
1, the terms that match the necessary condition (b), and the terms that match the necessary condition (c) by the second equal term registration section 63 and the first equal term search/selection section 72, respectively. Select now.

(a1) First, the operation of the general term registration unit 61 will be explained.

First, the general term registration section 61 sends a control signal from the a terminal to the term set storage means 10, and the term set specifying section 13
Requests that the term identifiers of term sets stored in the term set be read out in order.

Each time the term set storage means 10 reads out one term identifier, it outputs the term identifier from the PN terminal, and reads term element definitions in the term definition section 12 from the relative address by the number of symbols indicated by the term identifier. The child is read out, and for each term element descriptor, using the relative address specified by the term element descriptor, read the symbol descriptor from the symbol definition section 15, and further use the relative address specified by the symbol descriptor. Then, the spelling of the name is read out from the name storage section 14 and outputted sequentially from the DATA terminal. For example, when the term identifier indicated by 16 in FIG. Since the storage start address of the term in section 12 is 25, from address T+25 in term definition section 12
Read the six term element descriptors up to +30, and then read A+6 in the symbol definition section 15 because the relative addresses indicated by these term element descriptors are 6, 7, 1, 2, 8, and 100, respectively. ,A+7,A+1,A
The symbol definers stored in +2, A+8, and A+100 are read out, and the relative addresses in the name storage unit 14 indicated by these symbol definers are 11, 14, 3, 6, 13, and 17, respectively. , from the name storage unit 14, N+11, N+14, N+3, N+
6. Read out the name character strings f, g, a, b, h, and X stored in N+13 and N+17.
Send from the DATA terminal.

Next, the general term registration section 61 sends a control signal from the b terminal to the general term address generation means 30 every time the term set storage means 10 reads out one term from the term set as described above. Requests generation of a generalized address.

When the general term address generation means 30 receives this request from the B terminal, it extracts the kernel of the term from the term itself input from the DATA1 terminal, generates the kernel of the general term from the character string of the kernel, and Generate a general term address by hashing from the kernel string.

For example, the character string in the linear representation of the term read out as described above from the term identifier 16 in FIG. 5:
When f, g, a, b, h, and X are input from the DATA1 terminal, the general term address generation means 30 removes the first variable (X) and the following to generate the nucleus of this term:
Obtain f, g, a, b, h, −, and from this, the general term kernel of this term: f, g, a, b, −; f, g, a,
−;:f, g, f, −;−;, and by hashing operation from this character string,
Create addresses “36”, X “AB”, X “66”, and X “00”. Note that this hashing converts the ASC code of each character in the target string into a(1), a
(2) When ,...,a(n),...,a(N),
The following Zanka formula is used.

H(0)=0, H(i)=a(i). eor.(left*H(i-1))…
…
i=1~N However, ".eor." is exclusive OR for each bit,
"Left*" indicates a 1-bit left rotation. According to this method, H(N-1), H(1), ..., H
(0) is the hashing result for the kernel of each general term.

Next, the general term registration unit 61 stores the general term index storage unit 50 from the d terminal every time the general term address generation unit 30 generates one general term address as described above.
It sends a control signal to request that the term identifier output from the PN terminal of the term set storage means 10 be written into the storage location pointed to by the general term address.

When the general term index storage means 50 receives this request from the WC terminal, it stores the term identifier input from the WD terminal in the word blank of the storage location pointed to by the address input from the AD1 terminal. One word of the general term index storage means 50 has the number of bits capable of storing 16 term identifiers. However, in FIG. 6, only the first four of them are shown.

For example, the processing location 16 in FIG. 5 is generated from the general term address generating means 30 as described above, as general term addresses such as X "0E", X "36", X "AB",
Addresses X “00” are generated one after another, so
Write the term identifier 16 to these addresses. However, in FIG. 5, the term identifier 16 is
Relative address in term definition section 12 included in 6: "25"
It is shown.

In this way, the general term registration unit 61 selects all terms of the term set stored in the term set storage means 10 from the kernel of the general term (the kernel of the term having the same kernel). An index table for immediately retrieving term identifiers is created in the general term index storage means 50.

(b1) Next, the operation of the first equal term registration unit 62 will be explained.

First, the first equality registration section 62 sends a control signal from the a terminal to the term set storage means 10 to request that the term identifiers of the term sets stored in the term set specification section 11 be read out in order.

The operation of the term set storage means 10 at this time is exactly the same as in the case (a1) above, so the explanation will be omitted.

Next, the first equal term registration unit 62 stores the term set storage unit 1.
Each time 0 reads out one term from the term set as described above, the equal term address generation means 4 is output from the c terminal.
0 to request that it generate an equinominal address for that term.

When receiving this request from the C terminal, the equinominal address generation means 40 extracts the kernel of the term from the term itself input from the DATA1 terminal, and generates an equinominal address by hashing from the character string of the kernel. .

For example, the character string in the linear representation of the term read out as described above from the term identifier 16 in FIG. 5:
When f, g, a, b, h, and X are input from the DATA1 terminal, the equal term address generation means 40 removes the first variable (X) and the following to generate the nucleus of this term:
f, g, a, b, h, -, and create an address X "74" by hashing from this character string. The hashing at this time is as described in (a1) above.
The same thing is used.

Next, the first isomer registration unit 62 sends a control signal from the e terminal to the isomer index storage means 52 every time the isomer address generation means 40 generates one isomer address as described above. Then, a request is made to write the term identifier output from the PN terminal of the term set storage means 10 into the storage location pointing to the equality address.

When the equal term index storage means 52 receives this request from the WC terminal, it stores the term identifier input from the WD terminal in the word blank of the storage location pointed to by the address input from the AD2 terminal.

For example, in the case of process 16 in FIG. 5, the isomand address generation means 40 generates the address X "74" as the isomand address, as described above.
The term identifier 16 is written in the word blank of the memory location pointed to by this address. However, in Figure 6, term identifier 1
6, the term definition part 12 included in the term identifier 16
Relative address: Indicated by "25".

In this way, for all the terms of the term set stored in the term set storage means 10 of the first equal term registration unit 62, the kernel (the kernel of the term having the same kernel) as the term An index table for immediate retrieval of term identifiers is created in the equality index storage means 52.

(c1) Next, the operation of the second equal term registration unit 63 will be explained.

First, the second equal term registration section 63 sends a control signal from the a terminal to the term set storage means 10 to request it to sequentially read the term identifiers of the term sets stored in the term set specifying section 13.

The operation of the term set storage means 10 at this time is exactly the same as in the case (a1) above, so the explanation will be omitted.

Next, the second equal term registration unit 63 stores the term set storage unit 1.
Each time 0 reads out one term from the term set as described above, the equal term address generation means 4 is output from the c terminal.
0 to request that it generate an equinominal address for that term.

The operation of the equal address generating means 40 at this time is exactly the same as in case (b1), so the explanation will be omitted.

Next, the second isomer registration unit 63 sends a control signal from the d terminal to the general term index storage means 50 every time the isomer address generating means 40 generates one isomer address as described above. Then, a request is made to write the term identifier output from the PN terminal of the term set storage means 10 into the storage location pointed to by the equal term address.

When the general term index storage means 50 receives this request from the WC terminal, it stores the term identifier input from the WD terminal in the word blank of the storage location pointed to by the address input from the AD2 terminal.

For example, in the case of the process No. 16 in FIG. 5, the address X "74" is generated as the isomand address from the isomand address generating means 40 as described above, so the child of the storage location pointed to by this address is Relative address in term definition section 12 included in section 16: Indicated by "25".

In this way, the second isoterm registration unit 63 selects all terms of the term set stored in the term set storage means 10 from the kernel (the kernel of the term having the same kernel) to the term. An index table for immediately searching term identifiers is added to the general term index storage means 50.

As described above, under the control of the registration means 60, the general index storage means 50 and the equality index storage means 52 are
After creating an index table for the term set in , the search/selection means 70 is controlled to search for unification candidate terms for the target term at high speed in the following manner.

(b2) First, the operation of the general term search/selection unit 71 will be explained.

First, the general term search/selection unit 71 sends a control signal from the j terminal to request the target term input means 20 to send out the input target term from the DATA terminal.

When the target term input means 20 receives this request from the IC terminal, it generates a character string of term elements based on the linear representation of the target term input from outside the device (not shown), and sends it out from the DATA terminal.

For example, if the target term indicated by 21 in FIG. 6 is input, the target term input means 20 inputs f,
The character string g, a, Y, h, p, - is sent from the DATA terminal.

Next, the general term search/selection unit 71 sends a control signal from the k terminal to the general term address generation means 30 to request it to generate a general term address of the term sent out from the target term input means 20.

When the general term address generation means 30 receives this request from the K terminal, it extracts the kernel of the term from the character string of the term input from the DATA2 terminal, generates the kernel of the general term from the character string, and Generate a general term address by hashing from the kernel string.

This operation is basically the same as that in (a1), but for example, in the above case where the target term 21 in FIG. 6 is input, the target term input means 20
When the character string of the target term sent from is input from the DATA2 terminal, the general term address generation means 30
removes the variables below the first appearing variable (Y) to obtain the kernel of this target term: f, g, a, -, and from this the kernel of the general term of this target term: f, g, -; f, -; −;, by hashing from this string,
Generate addresses “AB”, X “66”, X “00”,
Output from ADRS terminal. The hashing used at this time is the same as in (a1).

Next, the general term search/selection unit 71 sends a control signal from the n terminal to the equality index storage unit 52 every time the general term address generation unit 30 generates one general term address as described above. , requests to read the term identifier stored in the storage location pointed to by the general term address.

When receiving this request from the RC terminal, the equal term index storage means 52 reads the word in the storage location pointed to by the address input from the AD1 terminal, and if the word is not empty and has a term identifier written in it, it reads the term identifier. is output from the RD terminal as a unification candidate term.

For example, for the target term 21 in Figure 6,
As mentioned above, the general address generation means 30
Since the addresses "AB", In the case of FIG. 6, since nothing is registered (written) in these words, no unification candidate terms are output.

This operation has the result of searching the term set for a term that satisfies the requirement [3] (b) with respect to the target term, as described in (action) above.

(ac2) Next, the first equal term search/selection section 7
The second operation will be explained.

First, the first equal term search/selection unit 72 sends a control signal from the j terminal to request the target term input means 20 to send out the input target term from the DATA terminal.

When the target term input means 20 receives this request from the IC terminal, it generates a character string of term elements based on the linear representation of the target term input from outside the device (not shown), and sends it out from the DATA terminal.

For example, if the target term indicated by 21 in FIG.
The character string g, a, Y, h, p, - is sent from the DATA terminal.

Next, the first isomer search/selection unit 72 sends a control signal from one terminal to the isomer address generation means 40 to request it to generate an isomer address of the term sent from the target term input means 20. do.

When receiving this request from the L terminal, the equinominal address generation means 40 extracts the kernel of the term from the character string of the term input from the DATA2 terminal, and generates an equinominal address from the character string by hashing. .

This operation is basically the same as that in (b1), but for example, in the above case where the target term 21 in FIG. 6 is input, the target term input means 20
The character string of the target term sent from DATA2
When input from the terminal, the equal address generating means 4
0 removes variables below the first appearing variable (Y) to obtain the core of this target term: f, g, a, -, generates an address X “36” from this string by hashing, and Output from the terminal. The hashing used at this time is the same as in (a1).

Next, when the isomerical address generating means 40 generates an isomerial address as described above, the first isomerical search/selection unit 72 sends a control signal from the m terminal to the generalized index storage means 50, Requests reading of the term identifier stored in the storage location pointed to by the equality address.

When the general term index storage means 50 receives this request from the RC terminal, it reads out the word in the memory location indicated by the address input from the AD2 terminal, and if the word is not empty and a term identifier has been written, then it reads the term identifier. is output from the RD terminal as a unification candidate term.

For example, for the target term 21 in Figure 6,
As mentioned above, the equal address generation means 40 generates X “36”
Since these addresses are output, the general term index storage means 50 reads out the words at the storage locations pointed to by these addresses. In the case of Fig. 6, two term identifiers 25 and 86 are registered (written) in these words.
Therefore, these term identifiers are output as unification candidate terms.

This operation has the result of searching the term set for a term that satisfies (a) and (c) of requirement [3] for the target term, as described in (action) above.

As described in detail above, in this embodiment, the registration means 60 registers the term set to be searched in the general term index storage means 50 and the equality index storage means 52, and the search/selection means 70 registers the term set to be searched as the target term. It is possible to quickly select terms that meet the unification requirements [3] (a), (b), and (c) by using the general index storage means 50 and the equality index storage means 52. .

In addition, in this example, as described in (c1), the second
The equality registration unit 63 additionally registers a table for searching term identifiers from its own kernel in the general term index storage means 50, but in step (a1), the general term address generation means 30 However, at the end of generating the hashing results (H(0) to H(N-1)) for the kernel of a general term, the hashing result (H(N)) for the kernel of that term can also be easily generated. It is also possible to simultaneously perform additional registration in (a1) and omit (c1), and therefore, the second equal term registration section 63.

Note that the present invention is not limited to the embodiments described above. For example, in the above embodiment, in order to search for terms that meet (c) of the unification requirement [3], the second isometric registration section 63 and the first isometric search/selection section 72 are used. This is how you do it, but you can also do it like this:

That is, as shown in FIG. 7, the operation of the second isometric registration section 63 is deleted, and the operation of the second isometric search/selection section 73 is added instead. In this case, the search for terms that meet the unification requirement [3](c) is performed using the first
The isomand index storage means 52 by the isomand registration unit 62 of
This is performed by searching the term identifier of the term set registered in the target term by the second equiterm search/selection unit 73 from the nucleus of the target term.

FIG. 8 shows the registration means 65 in this embodiment.
and FIG. 9 respectively show the search/selection means 75 in this embodiment.

The registration means 65 consists of a general term registration unit 61 and a first equal term registration unit 62, and their operations are the same as in (a1) and (b1) above.

Further, the search/selection means 75 includes a second isonomial search/selection section 73 in addition to the general term search/selection section 71 and the first isonominal search/selection section 72 . The operation of the general term search/selection unit 71 is exactly the same as in (b2) above.
In addition, although the operation of the first equality search/selection unit 72 is the same as in (ac2) above, the term identifiers that are searched as a result are only those that meet the unification requirement [3] (a). It is. For example, for the target term 21 in FIG.
Since the address "36" is output, the general term index storage means 50 reads the word at the storage location pointed to by this address and obtains the term identifier 25 as the unification candidate term. Here, 86 in the case of (ac2) is not registered, so 86 is not read out.

(c2) The operation of the second isometric search/selection unit 73 will be explained.

First, the second equal term search/selection unit 73 sends a control signal from the j terminal to request the target term input means 20 to send out the input target term from the DATA terminal.

The operation of the target term input means 20 is the same as that in (ac2) above.

Next, the second isomer search/selection unit 73 sends a control signal from one terminal to the isomer address generation means 40 to request it to generate an isomer address for the term sent from the target term input means 20. do. The operation of the equal address generating means 40 at this time is the same as in (ac2).

Next, when the isomandial address generation means 40 generates an isomandial address as described above, the second isomandial search/selection unit 73 sends a control signal from the n terminal to the isomandum index storage means 52, Requests to read the term identifier stored in the memory location pointing to the equality address.

The operation of the equality index storage means 52 at this time is the same as that in (b2) above, but the term identifier read out as a result meets the necessary condition [3] for unification.
(c) is met.

For example, for the target term 21 in Figure 7,
Since the isomandial address generation means 40 outputs the address X "36", the isomy index storage means 52 reads out the word at the storage location pointed to by this address. 7th
In the case of the figure, 86 is read out as the term identifier.

In this second embodiment, the operation (c2) of the second equinominal search/selection section 73 can be performed simultaneously with the operation (b2) of the general term search/selection section 71.

In the above embodiments, as the index storage means,
The reason for providing two types, the general term index storage means 50 and the equal term index storage means 52, is the necessary condition for unification [3]
In the "mixing" of (a) and (b), that is, in the table lookup type search operation for terms that meet these requirements, the unnecessary combination: K (g☆t1) and K (g☆t2): This is to prevent table lookup results from being mixed up. There is another solution to this problem as described below. This will be explained as a third embodiment.

FIG. 10 shows the configuration of the third embodiment. In this embodiment, the index storage means is one index storage means 58. Further, 80 is a registration means, 90 is a search/selection means, and as shown in FIGS. 11 and 12, respectively, a general term registration section 81
It consists of an isomer registration section 82, a general term search/selection section 91, and an isomer search/selection section 92.

The operation of this third embodiment is shown in FIG. In this embodiment, the registration means 80 is the index storage means 58.
When registering a term identifier in , in order to distinguish whether it is for a general term or an equal term,
Register with a flag.

FIG. 14 shows the flag and item identifier at the time of this registration. The first bit is a flag, and if it is 1, it indicates that it has been registered by the general term registration section 81, and if it is 0, it indicates that it has been registered by the equality registration section 82.

The operation of the general term search/selection unit 91 to obtain a unification candidate term for the target term is almost the same as (b2) of the first embodiment, except for the above-mentioned "mixing".
To avoid problems, among the term identifiers read at this time, only those with a flag of 0 are designated as unification candidate terms.

Further, the operation of the isomer search/selection unit 92 to obtain a unification candidate term for the target term is exactly the same as (ac2) in the first embodiment, and in this case, the read term identifier is the flag. Regardless of the value, all are candidate terms for unification.

[Effects of the Invention] As detailed above, according to the high-speed selection device for unification candidate terms of the present invention, the target term and the probability of successful unification are selected from a term set including a large number of terms. Certain unification candidate terms can be selected extremely quickly. As a result, much of the time required to perform a time-consuming unification operation on combinations of all terms in a term set can be saved.

In addition, in most applications, the term set to be unified is fixed, so by registering it in the index storage means in advance, the selection time of unification candidate terms can be reduced. This can be the shortest method. Moreover, this selection time has the excellent property of being constant regardless of the number of terms included in the term set.

[Brief explanation of the drawing]

1 to 6 are diagrams for explaining a unitization candidate term selection device according to a first embodiment of the present invention,
Fig. 1 is an overall block diagram, Fig. 2 is a block diagram of the term set storage means, Fig. 3 is a block diagram of the registration means, Fig. 4 is a block diagram of the search/selection means, and Fig. 5 is a block diagram of the term set storage means. FIG. 6 is an explanatory diagram of the operation, and FIGS. 7 to 9 are diagrams for explaining the unification candidate term selection device according to the second embodiment of the present invention. 7 is an explanatory diagram of the operation, FIG. 8 is a configuration diagram of the registration means, FIG. 9 is a configuration diagram of the search/selection means, and FIGS. 10 to 14 are diagrams showing the third embodiment of the present invention. A diagram for explaining such a unification candidate term selection device,
Figure 10 is an overall configuration diagram, Figure 11 is a configuration diagram of the registration means, Figure 12 is a configuration diagram of the search/selection means, and
FIG. 3 is an explanatory diagram of the operation, and FIG. 14 is a diagram showing the format of registered flags and item identifiers. 10...Term set storage means, 20...Target term input means, 30...General term address generation means, 40...
Equinominal address generation means, 50... General term index storage means, 52... Equivalent index storage means, 58... Index storage means, 60, 80... Registration means, 70, 90...
...Search and selection means.

Claims (1)

[Scope of Claims] 1. If there is a term that can be unified with a separately given target term from a term set whose elements are a plurality of terms to be searched, the term is unified so that the term is always included. A device for selecting unified candidate terms, comprising: term set storage means for storing the term set; target input means for inputting the target term; When a term is given, a general term address generation means that generates and outputs an address specifying the kernel from the kernels of all general terms of the term; and isomerical address generation means for generating and outputting an address for the general term; and by receiving an arbitrary term from the term set storage means, the general term is stored in a storage location indicated by the address generated by the general term address generation means. The identifier of such term is stored as a general term index, and when an arbitrary term is given from the term set storage means, the identifier of the term is stored in the storage location indicated by the address generated by the equinominal address generation means. an index storage means for storing an isomerical index; and when an arbitrary term is given from the term set storage means, the term is stored in a storage location of the index storage means indicated by the address generated by the general term address generation means. By writing an identifier of a term and registering the general term index, and receiving an arbitrary term from the term set storage means, the isomerical index memory is designated by the address generated by the isomerical address generating means. a registration means for registering the isomerical index by writing an identifier of the term in a storage location of the means; and each address generated by the general term address generation means by receiving the target term from the target term input means. searches the equality index in the index storage means, receives a target term from the target term input means, searches the general term index with the address generated by the equality address generation means, and further searches the general term index with the address generated by the equality address generation means. When a target term is given from the target term input means, the isomer index is searched with the address generated by the isomer address generator, and if a registered term identifier is found, it is used as a unification candidate. 1. An apparatus for selecting unification candidate terms, comprising a search and selection means for reading out terms as terms. 2. The registration means, when given an arbitrary term from the term set storage means, writes the identifier of the term in the storage location of the index storage means indicated by the address generated by the equinominal address generation means. The isomerical index is additionally registered in the general term index, and the search/selection means receives the target term from the target term input means and searches the address generated by the isomerical address generation means. 2. The unification candidate term selection device according to claim 1, wherein the unitary candidate term selection device searches the equinomial index that has been additionally registered in the general term index. 3. The index storage means stores an identifier of each term registered as the general term index and an identifier of each term registered as the equinominal index in the same storage location in a distinguishable state. 2. A device for selecting unification candidate terms as claimed in claim 1. 4. The unification candidate term selection device according to claim 1, wherein the term identifier is an identification symbol such as the term itself or a term pointer.