JPH0557948U - FM tuner - Google Patents

Abstract

(57) [Abstract] [Purpose] To provide an FM tuner that can switch to a stereo reception state when a new radio wave is input while the FM tuner is forcibly receiving monaural radio waves. . When an SD signal, that is, a tuning signal, is detected, the frequency of the intermediate frequency signal is counted in the PLL frequency synthesizer 3 to determine whether the count value is within a proper predetermined range or out of the range, and the count value is within the predetermined range. When the count value is outside the specified range, it switches to the stereo reception state, and when the count value is outside the predetermined range, the monaural / stereo switching signal is switched to PL.
A control circuit 8 is provided which causes the L frequency synthesizer 3 to output to the stereo demodulator 5.

Description

[Detailed description of the device]

[0001]

[Industrial application]

 The present invention relates to an FM tuner capable of switching monaural / stereo reception.

[0002]

[Prior Art]

 The conventional FM tuner was configured to forcibly switch to the monaural reception state when the reception frequency could not be received.

[0003]

[Problems to be solved by the device]

 However, according to the conventional FM tuner described above, when the power is turned on with the antenna removed, the FM tuner determines that there is no broadcasting station and the monaural reception even if the reception setting frequency is a broadcasting station. Switch to. After that, when the antenna was connected, there was the problem that stereo reception would not be possible even if the broadcast was stereo. Also, when the broadcasting station has not started broadcasting when the power is turned on, the same problems as described above occur.

The present invention provides an FM tuner that can switch to a stereo reception state when a new radio wave is input while the FM tuner is forcibly receiving monaural radio waves. To aim.

[0005]

[Means for Solving the Problems]

 The FM tuner of the present invention comprises a counting means for counting the frequency of the intermediate frequency signal when a tuning signal is detected, and a stereo reception state when the count value by the counting means is within a predetermined range, and a monaural when the frequency is outside the predetermined range. It is characterized in that it is provided with a first switching means for switching to a reception state and a second switching means for switching to a monaural reception state when a tuning signal is not detected.

[0006]

According to the FM tuner of the present invention, the frequency of the intermediate frequency signal is counted by the counting means when the tuning signal is output, and when the count value is within the predetermined range, the stereo reception state is set, and the predetermined range is set. When it is outside, it is switched to the monaural reception state. If no tuning signal is output, it switches to monaural reception. Therefore, when the antenna is removed, the monaural reception state is switched to, and when a new broadcast wave is received during the monaural reception state, the count value is usually within the specified range and switched to the stereo reception state. become.

[0007]

【Example】

 Hereinafter, the present invention will be described with reference to examples. FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

In FIG. 1, reference numeral 1 indicates an antenna, and reference numeral 2 indicates a front end. The output high frequency signal from the high frequency stage in the front end 2 is input to the mixing stage in the front end 1 and mixed with the oscillation output from the local oscillator in the front end 2 to be frequency converted to an intermediate frequency. The phase comparison output output from the PLL frequency synthesizer 3 is amplified by the amplifier 6 and applied as a tuning control voltage to the tuning circuit of the high frequency stage to control tuning and control the oscillation frequency of the local oscillator.

The intermediate frequency signal output from the front end 2 is supplied to the FM demodulator 4 for FM demodulation, and the demodulated output is supplied to the stereo demodulation circuit 5 to be separated into left and right signals. The stereo demodulation circuit 5 is configured to be switchable between a stereo state and a monaural state based on the monaural / stereo switching signal from the PLL frequency synthesizer 3 and, in the stereo state, outputs a stereo signal indicating the stereo state. It is configured to output. On the other hand, the FM demodulator 4 outputs a tuning detection voltage (SD signal) in a predetermined range including the tuning point based on the S curve output.

The intermediate frequency signal output from the front end 2 is supplied to the PLL frequency synthesizer 3 via the buffer circuit 7 whose opening and closing is controlled by the opening / closing control signal, and the PLL frequency synthesizer 3 outputs the intermediate frequency signal. The frequency of is counted.

Here, the PLL frequency synthesizer 3, for example, LC7218 (PLLIC) (manufactured by Sanyo Electric Co., Ltd.), receives the frequency division ratio signal based on the reception frequency from the control circuit 8 described later, determines the reception frequency, and determines the front end. Phase comparison is performed with the local oscillation signal input from 2 and the phase comparison output is sent. Further, the PLL control signal from the control circuit 8 controls the opening / closing of the buffer circuit 7, counts the frequency of the input intermediate frequency signal, sends the count value data (count value data) to the control circuit 8 and the stereo demodulator 5 The monaural / stereo switching signal is sent to.

The control circuit 8 is composed of a microcomputer, receives a reception frequency signal from a reception frequency setting means (not shown), and outputs frequency division ratio data for setting the oscillation frequency of the PLL frequency synthesizer 3 to the PLL frequency synthesizer 3. The PLL frequency synthesizer 3 is provided with means for sending an open / close control instruction signal for the buffer circuit 7.

Further, the control circuit 8 receives the SD signal and the intermediate frequency count data from the PLL frequency synthesizer 3, and causes the PLL frequency synthesizer 3 to output a monaural / stereo switching signal based on the SD signal and the intermediate frequency count data. And means for receiving a stereo signal from the stereo demodulator 5 and sending a control signal for displaying on the stereo display means (not shown) that the stereo reception state is present.

In the present embodiment configured as described above, the frequency division ratio data is sent to the PLL frequency synthesizer 3 from the control circuit 8 in response to the reception frequency signal from the reception frequency setting means (not shown). The received PLL frequency synthesizer 3 compares the received frequency and the local oscillation frequency in phase. This phase comparison output is amplified and sent to the front end 2 as a tuning control voltage. The front end 2 which has received the tuning control voltage is tuned to the instructed reception frequency, the local oscillation frequency is controlled based on the tuning control voltage, the high frequency signal is converted into the intermediate frequency signal, and the FM demodulator is demodulated. 4 is sent.

The intermediate frequency signal sent from the front end 2 is FM demodulated in the FM demodulator 4, and the SD signal is output from the FM demodulator 4 to the control circuit 8. An open signal is sent from the PLL frequency synthesizer 3 to the buffer circuit 7 based on the PLL control signal from the control circuit 8 which receives the SD signal, and an intermediate frequency counting instruction signal is sent to the PLL frequency synthesizer 3. The intermediate frequency signal is sent to the PLL frequency synthesizer 3 through the buffer circuit 7 which has received the open signal, and the frequency of the intermediate frequency signal sent to the PLL frequency synthesizer 3 is counted.

The count value data of the intermediate frequency is sent to the control circuit 8, and it is judged whether or not the count value data received by the control circuit 8 is within a predetermined range. When it is determined that the signal is present, the PLL frequency synthesizer 3 sends the monaural / stereo control signal to the stereo demodulator 5 as a stereo control signal. Upon receiving the stereo control signal, the stereo demodulator 5 is controlled to be in a stereo reception state and performs a stereo demodulation operation, and the audio signal is separated into the left and right audio signals and output, and the stereo signal is sent out. A lighting signal is output from the control circuit 8 which has received the stereo signal, and the stereo display means is lit to indicate that the stereo signal is in the stereo reception state.

When it is determined that the count value data of the intermediate frequency is out of the predetermined range, the PLL frequency synthesizer 3 sends the monaural / stereo control signal to the stereo demodulator 5 as a monaural control signal. Upon receiving the monaural control signal, the stereo demodulator 5 is controlled to the monaural reception state and the sending of the stereo signal is stopped. When the stereo signal is not transmitted, the control circuit 8 outputs a turn-off signal, the stereo display means is turned off, and the monaural reception state is displayed.

Therefore, when the antenna 1 is pulled out, the SD signal is not output, and the PLL frequency synthesizer 3 sends the monaural / stereo control signal to the stereo demodulator 5 as the monaural control signal, and the stereo demodulator 5 Is forcibly controlled to the monaural reception state.

That is, as shown in FIG. 2, when the antenna 1 is pulled out, the SD signal is not output (step S1) and the monaural reception state is forcibly controlled (step S2). When the antenna 1 is connected and the broadcast is received, the SD signal is output, the output of the SD signal is detected (step S1), and the intermediate frequency counting process is performed (step S3). As a result of the counting process, when it is determined that the count value is within the predetermined range (step S4), the stereo reception state is switched to (step S5).

If it is determined in step S4 that the count value of the intermediate frequency is outside the predetermined range, the monaural reception state is forcibly controlled (step S2).

[0021]

[Effect of the device]

 As described above, according to the present invention, when the tuning signal is not output, it is switched to the monaural reception state, and when the tuning signal is output, the frequency of the intermediate frequency signal is counted by the counting means and the count value is set to the predetermined value. When it is within the range, it switches to the stereo reception state, and when it is out of the specified range, it switches to the monaural reception state.Therefore, when the antenna is removed, it is controlled to the monaural reception state, and the broadcast radio wave is received during the monaural reception. When newly received, it has an effect of switching to a stereo reception state.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

FIG. 2 is a flow chart for explaining the operation of one embodiment of the present invention.

[Explanation of symbols]

 1 Antenna 2 Front End 3 Frequency Synthesizer 4 FM Demodulator 5 Stereo Demodulator 8 Control Circuit

Claims (1)

[Scope of utility model registration request] 1. Counting means for counting the frequency of an intermediate frequency signal when a tuning signal is detected, and switching to a stereo reception state when the count value by the counting means is within an appropriate predetermined range, and monaural reception when outside the predetermined range. An FM tuner comprising: a first switching means for switching to a state and a second switching means for switching to a monaural reception state when a tuning signal is not detected.