JPH055666B2 - - Google Patents

Info

Publication number
JPH055666B2
JPH055666B2 JP4274883A JP4274883A JPH055666B2 JP H055666 B2 JPH055666 B2 JP H055666B2 JP 4274883 A JP4274883 A JP 4274883A JP 4274883 A JP4274883 A JP 4274883A JP H055666 B2 JPH055666 B2 JP H055666B2
Authority
JP
Japan
Prior art keywords
electrode
electrodes
block
stylus
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP4274883A
Other languages
Japanese (ja)
Other versions
JPS59167280A (en
Inventor
Yukio Tabata
Toshuki Kawanishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP58042748A priority Critical patent/JPS59167280A/en
Publication of JPS59167280A publication Critical patent/JPS59167280A/en
Publication of JPH055666B2 publication Critical patent/JPH055666B2/ja
Granted legal-status Critical Current

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/385Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective supply of electric current or selective application of magnetism to a printing or impression-transfer material
    • B41J2/39Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective supply of electric current or selective application of magnetism to a printing or impression-transfer material using multi-stylus heads
    • B41J2/40Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective supply of electric current or selective application of magnetism to a printing or impression-transfer material using multi-stylus heads providing current or voltage to the multi-stylus head

Landscapes

  • Electronic Switches (AREA)
  • Facsimile Heads (AREA)
  • Fax Reproducing Arrangements (AREA)

Description

【発明の詳細な説明】 技術分野 本発明は、記録紙にドツト記録する通電転写記
録装置に関する。
DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to an electrical transfer recording device that records dots on recording paper.

従来技術 従来、通電転写方式による記録においては、単
針でドラムを走査させながら記録していたが、記
録速度が遅く、そのため線密度を粗くせざるを得
ず、解像度は低かつた。そこで、記録紙にインク
シートを接触させ、このインクシートに列状に配
置された多数の針状電極と、これから所定間隔を
おいて配置された帰路電極とを接触した状態で針
状電極と帰路電極との間に画像信号電圧を印加
し、針状電極の直下のインクシート部分を溶融し
て記録紙に転写するマルチスタイラス通電転写記
録方式が提案されている。しかしながら、このよ
うな記録方式では、針状電極同士の相互作用が生
じ、各針状電極と帰路電極に電圧印加したとき、
隣接する針状電極は、互いに他の電界でシールド
されて針状電極から帰路電極への電流通路有効面
積が小さくなつて抵抗が大きくなり、その結果針
状電極から帰路電極へ流れる電流が小さくなる現
象が生じる。第1図はこのような現象を説明する
図で、横軸が針状電極本数、縦軸が針状電極(中
央)に流れる電流を示し、針状電極本数の増加と
共に電流が減少している。このように電流が減少
するとインクシートが十分溶融せず、マルチドツ
ト抜けが生じて印字むらが起こり、特に、たて線
が出ないという問題が生じてしまう。
Prior Art Conventionally, in recording by the current transfer method, recording was performed by scanning a drum with a single needle, but the recording speed was slow, so the linear density had to be coarse, and the resolution was low. Therefore, an ink sheet is brought into contact with the recording paper, and a large number of needle-like electrodes arranged in a row on this ink sheet are in contact with return-path electrodes arranged at predetermined intervals. A multi-stylus current transfer recording method has been proposed in which an image signal voltage is applied between the electrode and the ink sheet directly below the needle-shaped electrode to melt the portion and transfer it to recording paper. However, in such a recording method, interaction occurs between the needle electrodes, and when voltage is applied to each needle electrode and the return electrode,
Adjacent needle-shaped electrodes are shielded from each other by other electric fields, and the effective area for the current path from the needle-shaped electrode to the return electrode becomes smaller, increasing the resistance, and as a result, the current flowing from the needle-shaped electrode to the return electrode becomes smaller. A phenomenon occurs. Figure 1 is a diagram explaining this phenomenon, where the horizontal axis shows the number of needle-like electrodes and the vertical axis shows the current flowing through the needle-like electrode (center).The current decreases as the number of needle-like electrodes increases. . If the current decreases in this manner, the ink sheet will not be sufficiently melted, resulting in multi-dot omission, uneven printing, and especially the problem that no vertical lines will appear.

目 的 本発明は斯かる事情に鑑み、マルチドツト抜け
を防止すると共に、低い印加電圧で良好な印字品
質の得られるマルチスタイラス通電転写記録装置
を提供しようとするものである。
Purpose In view of the above circumstances, the present invention aims to provide a multi-stylus current transfer recording device that can prevent multi-dot omission and provide good print quality with a low applied voltage.

構 成 本発明は、上記目的を達成するために、複数の
電極をN本づつブロツクに分け、各ブロツクの予
め決定された第1番目の電極にのみ同時に画像信
号に基づいてパルスを印加し、次いで、各ブロツ
クの第2番目、第3番目、……、第N番目の電極
に順次画像信号に基づいてパルスを印加する通電
転写記録装置において、前記ブロツクにおいて駆
動中の電極に印加されるパルスと、該ブロツク内
において次いで駆動される電極に印加されるパル
スとが時間的に一部重なるようにしたことを特徴
としたものである。以下、実施例に基づいて説明
する。
Configuration In order to achieve the above object, the present invention divides a plurality of electrodes into blocks of N electrodes, simultaneously applies a pulse based on an image signal only to a predetermined first electrode of each block, Next, in an electric transfer recording apparatus that sequentially applies pulses to the second, third, ..., Nth electrodes of each block based on the image signal, the pulses applied to the electrodes being driven in the block are This is characterized in that the pulse applied to the next electrode in the block partially overlaps in time. The following will explain based on examples.

第2図、第3図は本発明の原理を説明するため
の電極配置図、印加電圧波形図であり、1は1列
が32本のスタイラスから成る千鳥構造の針状電極
で、2は帰路電極である。32本のスタイラスは例
えば8本ずつ4ブロツクに分けられ、第3図に示
すように、各ブロツクの最初の電極1番目、9番
目、17番目、25番目に同時に画像信号に基づくパ
ルス電圧を印加し、このパルスが立下ると同時に
各ブロツクの次の電極2番目、10番目、18番目、
26番目に次のパルス電圧を印加する。以下8番
目、16番目、24番目、32番目まで同様に各ブロツ
ク内でパルス電圧が重ならないように印加する
(Staggered法)。このように同時に電圧が印加さ
れる隣接電極間に間隔をあけることにより電極間
同士の相互作用が避けられ、この間隔は4ドツト
ピツチ(隣接スタイラス間の間隔が1ドツトピツ
チ)以上、好ましくは8ドツトピツチ以上が良
い。ところで、従来は、第4図に示すように32本
のスタイラスに対して同時に電圧(パルス幅
100μS、電圧170V)を印加していたが、
Staggered法による電圧印加法では、従来の同時
電圧方法に比して印字速度が1/N(ただしNは
ドツトピツチ)になつてしまう。しかし、印加電
圧を300Vまであげることにより、従来の100μSに
対し、12.5μSと1/8の短時間記録が可能となつて、
従来の300mm/Sの印字速度が維持でき、実用上
支障をきたさない。また、Staggered法による電
圧印加法では、従来、第5図に示すように1/2
Dutyで電圧印加しているため、1番目と8番目
のスタイラスに対応したドツトが1/2ドツトピツ
チ(実際は線速度300mmSで30μm)のずれを起こ
すが、ドツトの大きさのバラツキにかくれて目視
には問題にならない。
Figures 2 and 3 are electrode arrangement diagrams and applied voltage waveform diagrams for explaining the principle of the present invention, where 1 is a staggered needle-like electrode with one row consisting of 32 styli, and 2 is a return path. It is an electrode. For example, the 32 styli are divided into 4 blocks of 8 each, and as shown in Figure 3, pulse voltages based on image signals are applied simultaneously to the first electrodes 1, 9, 17, and 25 of each block. However, at the same time as this pulse falls, the next electrodes of each block, 2nd, 10th, 18th, etc.
Apply the next pulse voltage at the 26th point. The pulse voltages are similarly applied to the 8th, 16th, 24th, and 32nd blocks so that they do not overlap (staggered method). Interaction between electrodes is avoided by providing a spacing between adjacent electrodes to which voltages are applied at the same time, and this spacing is at least 4 dot pitches (the spacing between adjacent styli is 1 dot pitch), preferably at least 8 dot pitches. is good. By the way, conventionally, voltage (pulse width) was applied simultaneously to 32 styli as shown in Figure 4.
100μS, voltage 170V) was applied, but
In the voltage application method using the staggered method, the printing speed is 1/N (however, N is dot pitch) compared to the conventional simultaneous voltage method. However, by increasing the applied voltage to 300V, it became possible to record for a short time of 12.5μS, 1/8 of the conventional 100μS.
The conventional printing speed of 300mm/S can be maintained without causing any practical problems. In addition, in the voltage application method using the Staggered method, conventionally, as shown in Figure 5, 1/2
Since the voltage is applied at the duty, the dots corresponding to the 1st and 8th styli will be shifted by 1/2 dot pitch (actually 30 μm at a linear velocity of 300 mmS), but this is hidden by the variation in the dot size and is not visible to the naked eye. is not a problem.

しかし、駆動パルスが全く重ならないようにし
て時分割駆動した場合、従来の印字速度を維持す
るためには印加電圧を300Vと高くしなければな
らず、スタイラスに悪影響を与え、全体の信頼性
を低くし、またドライバーとしてより高圧のもの
が必要となり実用上不利となる。
However, when time-division driving is performed so that the drive pulses do not overlap at all, the applied voltage must be as high as 300V in order to maintain the conventional printing speed, which adversely affects the stylus and reduces overall reliability. In addition, it requires a driver with higher pressure, which is disadvantageous in practice.

第6図は本発明による電圧印加法の一実施例を
示す図で、原理は第3図に示した電圧印加法
(Staggered法)と全く同じであり、ただパルス
幅だけを倍に伸ばして、パルス幅の1/2ずつ隣接
スタイラスと重複している点が異なるのみである
(変形Staggered法)。このようにパルス幅を伸ば
すことにより印加電圧を下げることができ、本実
施例では230Vで記録可能であつた。ただ、この
変形Staggered法では、各スタイラスへの印加パ
ルスが1ブロツク8本の中で完全に分離独立して
おらず、第6図の例ではパルス幅の1/2ずつ交代
で隣りのスタイラスと同時印加されており、電流
の減少が生ずる。この場合第1図の単独スタイラ
スから2本スタイラスに変つた場合に相当し、電
流の減少は20〜25%であるが、この程度の減少で
は単独スタイラスの場合と殆んど同程度のドツト
濃度が得られ、実用上問題にならない。また、各
ブロツクの頭のスタイラス(1番目、9番目、17
番目、25番目)と尾のスタイラス(8番目、16番
目、24番目、32番目)への印加パルスの各々前
半、後半は他との重なりはなく、これら頭と尾の
スタイラスと中間のスタイラスのドツト濃度に差
が生じるが、それ程の差ではなく、ドツト濃度の
バラツキの範囲内に入るため目視上は問題となら
ない。
FIG. 6 is a diagram showing an embodiment of the voltage application method according to the present invention. The principle is exactly the same as the voltage application method (Staggered method) shown in FIG. 3, except that only the pulse width is doubled. The only difference is that the pulse width overlaps with the adjacent stylus by 1/2 of the pulse width (modified staggered method). By extending the pulse width in this way, the applied voltage could be lowered, and in this example, recording was possible at 230V. However, in this modified staggered method, the pulses applied to each stylus are not completely separated and independent among the eight pulses in one block, and in the example shown in Figure 6, the pulses applied to the adjacent stylus are alternated by 1/2 of the pulse width. are applied simultaneously, resulting in a decrease in current. In this case, the current decreases by 20 to 25%, which corresponds to the case of changing from a single stylus to a dual stylus in Figure 1, but with this degree of decrease, the dot density is almost the same as in the case of a single stylus. is obtained, and there is no problem in practical use. Also, the stylus at the head of each block (1st, 9th, 17th
The first half and the second half of the pulses applied to the head and tail styli (8th, 16th, 24th, and 32nd) do not overlap with each other; Although there is a difference in dot density, the difference is not that large and falls within the range of variation in dot density, so it does not pose a problem visually.

第7図は本発明による駆動回路の例を示す図
で、第8図はそのタイミングチヤートである。
CPU又はアドレスカウンタ等の10から指定さ
れたキヤラクタを示すADRをROM11に入力
し、文字パターンを出力させる。一方、文字の頭
を示す信号Sを2つのモノステーブルマルチバイ
ブレータ12(MM0)、13(MM1)に入力
する。モノステーブルマルチバイブレータ12〜
20は全てC=0.01μF、R0=4.3kΩ、R1=6.8kΩ
である。MM1からは25μSのパルス幅にセツト
されたφ1が出力される。そしてφ1が立下つたと
きに立上がるφ3が得られる。以下同様にφ5,φ7
が得られる。またMM0のからはSの立上り時
点から12.5μSのパルス幅をもつパルスの反転した
パルス信号が得られ、これをMM5に入力するこ
とによつてφ1より12.5μS遅れて立上る25μS幅の
パルスφ2が得られ、同様にしてφ4,φ6,φ8が得
られる。これらφ1〜φ8と文字パターン出力を
AND回路21に加え、AND回路出力をドライバ
ー22に加えて各スタイラスを駆動する。なお、
V1には+5V、V2には記録電圧を印加する。
第7図では1列分32本のスタイラスの駆動につい
てのみ述べたが、32×2本の千鳥構造に対しても
全く同じことを繰り返すだけでよい。さらにスタ
イラスは千鳥構造のもののみに限定されず、1列
のものであつてもよいし、又帰路電極が針状電極
と一体となつたものでなく、例えばローラ等で別
個に設けてもよく、スタイラスの分割も8本に限
定する必要はない。また、スタイラスの分割は1
列だけで行なうのではなく、第9図に示すように
2列を含めて分割し、同様に変形Staggered法で
駆動してもよい。
FIG. 7 is a diagram showing an example of a drive circuit according to the present invention, and FIG. 8 is a timing chart thereof.
An ADR indicating a character designated by 10 such as the CPU or an address counter is input to the ROM 11, and a character pattern is output. On the other hand, a signal S indicating the beginning of a character is input to two monostable multivibrators 12 (MM0) and 13 (MM1). Monostable multivibrator 12~
All 20 are C = 0.01μF, R 0 = 4.3kΩ, R 1 = 6.8kΩ
It is. MM1 outputs φ1 with a pulse width of 25 μS. Then, φ3, which rises when φ1 falls, is obtained. Similarly below, φ5, φ7
is obtained. In addition, from MM0, a pulse signal which is an inverted version of the pulse having a pulse width of 12.5 μS from the rising edge of S is obtained, and by inputting this to MM5, a pulse signal φ2 with a width of 25 μS that rises 12.5 μS later than φ1 is obtained. is obtained, and φ4, φ6, and φ8 are obtained in the same way. These φ1 to φ8 and character pattern output
In addition to the AND circuit 21, the AND circuit output is applied to the driver 22 to drive each stylus. In addition,
+5V is applied to V1, and a recording voltage is applied to V2.
In FIG. 7, only the driving of 32 styli in one row has been described, but it is sufficient to repeat exactly the same process for the staggered structure of 32×2 styli. Furthermore, the stylus is not limited to a staggered structure, but may have a single row, and the return electrode may not be integrated with the needle electrode, but may be provided separately, for example with a roller or the like. Also, it is not necessary to limit the division of the stylus to eight. Also, the stylus is divided into 1
Instead of using just the columns, it may be divided into two columns as shown in FIG. 9, and similarly driven using the modified staggered method.

第10図は本発明の他の実施例における電圧印
加法を示す図で、第6図の1つのブロツク内の印
加パルスの順序を入れかえたものである。これは
第7図でφ1〜φ8をAND回路へ入力する順序を変
えるだけで実現できる。この方法によると、第1
0図の場合第5番目のスタイラスは同時にパルス
電圧の印加されるスタイラスが1番目と2番目に
なり、第6図の実施例の場合よりも離れるため、
より単独でのドツトに近いドツトが得られる。
FIG. 10 is a diagram showing a voltage application method in another embodiment of the present invention, in which the order of the applied pulses within one block of FIG. 6 is reversed. This can be achieved by simply changing the order in which φ1 to φ8 are input to the AND circuit in FIG. According to this method, the first
In the case of Figure 0, the fifth stylus is the first and second stylus to which the pulse voltage is applied at the same time, and they are further apart than in the example of Figure 6.
Dots that are closer to individual dots can be obtained.

効 果 以上のように、本発明による電圧印加法によれ
ば、マルチドツト抜けが解消し、たて線も横線と
同様に確実に記録され、ノイズ的な記録のされ方
もなくなり良好な印字品質が得られると共に
Staggered法よりも低電圧で記録でき、マルチス
タイラスの寿命に与える悪影響も小さく、ドライ
バーの耐圧も低くてすむ。
Effects As described above, according to the voltage application method of the present invention, multi-dot omission is eliminated, vertical lines are recorded as reliably as horizontal lines, and noisy recording is eliminated, resulting in good print quality. as well as obtained
It can record at a lower voltage than the staggered method, has less negative impact on the lifespan of the multi-stylus, and requires a lower withstand voltage of the driver.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はスタイラス本数とスタイラス(中央)
を流れる電流の関係を示すグラフ、第2図は本発
明の原理を説明するための電極配置図、第3図は
本発明の原理を説明するための図、第4図は従来
の電圧印加法を示す図、第5図はドツトずれを示
す図、第6図は本発明による電圧印加法の一実施
例を示す図、第7図は本発明による駆動回路の一
実施例を示す図、第8図はタイミングチヤート、
第9図は第6図の実施例の変形を示す図、第10
図は本発明による電圧印加法の他の実施例を示す
図である。 1……針状電極、2……帰路電極、10……
CPU又はカウンタ等、11……ROM、12〜2
0……モノステーブルマルチバイブレータ、21
……AND回路、22……ドライバー。
Figure 1 shows the number of styli and the stylus (center)
Figure 2 is an electrode arrangement diagram to explain the principle of the present invention, Figure 3 is a diagram to explain the principle of the present invention, Figure 4 is a graph showing the relationship between the current flowing through the FIG. 5 is a diagram showing dot misalignment. FIG. 6 is a diagram showing an embodiment of the voltage application method according to the present invention. FIG. 7 is a diagram showing an embodiment of the drive circuit according to the present invention. Figure 8 is a timing chart.
FIG. 9 is a diagram showing a modification of the embodiment shown in FIG. 6, and FIG.
The figure is a diagram showing another embodiment of the voltage application method according to the present invention. 1... Needle electrode, 2... Return electrode, 10...
CPU or counter, etc., 11...ROM, 12-2
0... Monostable multivibrator, 21
...AND circuit, 22...driver.

Claims (1)

【特許請求の範囲】[Claims] 1 複数の電極をN本づつブロツクに分け、各ブ
ロツクの予め決定された第1番目の電極にのみ同
時に画像信号に基づいてパルスを印加し、次い
で、各ブロツクの第2番目、第3番目、……、第
N番目の電極に順次画像信号に基づいてパルスを
印加する通電転写記録装置において、前記ブロツ
クにおいて駆動中の電極に印加されるパルスと、
該ブロツク内において次いで駆動される電極に印
加されるパルスとが時間的に一部重なるようにし
たことを特徴とする通電転写記録装置。
1 Divide the plurality of electrodes into blocks of N electrodes, apply pulses based on the image signal simultaneously only to the predetermined first electrode of each block, and then apply pulses to the second, third, and third electrodes of each block simultaneously. . . ., in a current transfer recording apparatus that sequentially applies pulses to the Nth electrode based on an image signal, a pulse applied to the electrode being driven in the block;
An electrical transfer recording apparatus characterized in that a pulse applied to an electrode subsequently driven within the block is made to partially overlap in time.
JP58042748A 1983-03-15 1983-03-15 Voltage application method in current supply transfer recording system Granted JPS59167280A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58042748A JPS59167280A (en) 1983-03-15 1983-03-15 Voltage application method in current supply transfer recording system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58042748A JPS59167280A (en) 1983-03-15 1983-03-15 Voltage application method in current supply transfer recording system

Publications (2)

Publication Number Publication Date
JPS59167280A JPS59167280A (en) 1984-09-20
JPH055666B2 true JPH055666B2 (en) 1993-01-22

Family

ID=12644630

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58042748A Granted JPS59167280A (en) 1983-03-15 1983-03-15 Voltage application method in current supply transfer recording system

Country Status (1)

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JP (1) JPS59167280A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0276978B1 (en) * 1987-01-29 1993-07-28 Matsushita Electric Industrial Co., Ltd. Resistive ribbon thermal transfer printing apparatus
SE466591B (en) * 1989-06-01 1992-03-09 Asea Brown Boveri THERMO PRINTING HEAD WITH STEP CONTROLLED STREAM ON POWER ON AND OFF
CA2224339C (en) * 1997-12-10 2003-02-11 Pierre Castegnier Printing head system for use in an electrocoagulation printing apparatus

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JPS59167280A (en) 1984-09-20

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