JPH0553695A - No interruption electric power unit interface - Google Patents

No interruption electric power unit interface

Info

Publication number
JPH0553695A
JPH0553695A JP3217149A JP21714991A JPH0553695A JP H0553695 A JPH0553695 A JP H0553695A JP 3217149 A JP3217149 A JP 3217149A JP 21714991 A JP21714991 A JP 21714991A JP H0553695 A JPH0553695 A JP H0553695A
Authority
JP
Japan
Prior art keywords
power supply
power failure
circuit
signal
power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3217149A
Other languages
Japanese (ja)
Inventor
Masaaki Ochi
正明 越智
Takahiro Yamada
高裕 山田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP3217149A priority Critical patent/JPH0553695A/en
Publication of JPH0553695A publication Critical patent/JPH0553695A/en
Pending legal-status Critical Current

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  • Stand-By Power Supply Arrangements (AREA)

Abstract

PURPOSE:To inform the generation of a service interruption from a no interruption electric power unit to a computer without using the I/O port of the computer. CONSTITUTION:A no-interruption electric power unit 2 incorporates a signal synthesizing circuit 14 synthesizing a signal detecting service interruption to be generated from the power supply output and a control circuit 8 at the service interruption. The no-interruption electric power supply output with the synthesized service interruption detection signal is sent to a computer 1. The computer 1 incorporates a signal separator circuit 15 among the service interruption power supply output from the no-interruption electric power supply 2, and the separated service interruption detection signal is sent to a main circuit 12 of the computer 1.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、コンピュータ本体への
電源供給源が停電時に、停電検知信号をコンピュータ本
体に出力する、無停電電源インターフェースに関するも
のである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an uninterruptible power supply interface for outputting a power failure detection signal to a computer main body when a power supply source for the computer main body has a power failure.

【0002】[0002]

【従来の技術】一般に、無停電電源インターフェースの
一部を構成する無停電電源装置は、停電時に停電検知信
号を無停電電源装置からコンピュータ側へRS232C
等の入出力ポートを介して送り、停電検知信号を受け取
ったコンピュータ側では、現在使用中のデータをハード
ディスク装置等の記憶装置に書き込むという処理をし
て、停電時の対策を行なっている。以下図面を参照しな
がら、上記した従来の無停電電源装インターフェースの
一例について説明する。
2. Description of the Related Art Generally, an uninterruptible power supply which constitutes a part of an uninterruptible power supply interface transmits a power failure detection signal from the uninterruptible power supply to the computer side at the time of power failure by RS232C.
The computer which receives the power failure detection signal by sending it through the input / output port such as the above, writes the data currently in use in a storage device such as a hard disk device, and takes measures against the power failure. An example of the conventional uninterruptible power supply interface described above will be described below with reference to the drawings.

【0003】図3は従来の無停電電源インターフェース
の構成を示すものである。図3に示すように構成要素と
しては、1はコンピュータ本体、2は無停電電源装置、
3は無停電電源装置に電源を供給する電源供給源として
の商用AC100V電源、4は停電用電源、5は停電用
電源4からの直流出力のD/Aコンバートを行なうイン
バータ回路、6は電源ラインをオープン、ショートする
ためのゲート回路、7は停電検知回路、8は停電検知回
路7に基づいて、停電時に必要なゲート6及びインバー
タ回路5の動作を制御し、停電検知信号を出力する制御
回路、9はコンピュータ本体1への電源供給線、10は
コンピュータ本体1へ停電検知を知らせる信号線、11
はコンピュータ本体1の電源回路、12はメイン回路、
13はハードディスク装置である。以上のように構成さ
れた無停電電源インターフェースを有するコンピュータ
について、以下その動作について説明する。
FIG. 3 shows the configuration of a conventional uninterruptible power supply interface. As shown in FIG. 3, as components, 1 is a computer main body, 2 is an uninterruptible power supply,
3 is a commercial AC 100V power supply as a power supply source for supplying power to the uninterruptible power supply, 4 is a power supply for blackout, 5 is an inverter circuit for D / A converting DC output from the power supply 4 for blackout, 6 is a power supply line A gate circuit for opening and short-circuiting, 7 is a power failure detection circuit, and 8 is a control circuit that controls the operation of the gate 6 and the inverter circuit 5 required at the time of power failure and outputs a power failure detection signal based on the power failure detection circuit 7. , 9 is a power supply line to the computer body 1, 10 is a signal line for notifying the computer body 1 of power failure detection, 11
Is a power supply circuit of the computer main body 1, 12 is a main circuit,
Reference numeral 13 is a hard disk device. The operation of the computer having the uninterruptible power supply interface configured as described above will be described below.

【0004】通常はゲート6を介して商用100V電源
3が直接コンピュータ本体1へ供給される。停電が発生
すると、停電検知回路7からの信号に基づき制御回路8
によりゲート6が閉じられ、インバータ5が瞬時に起動
して停電用電源4より引続きコンピュータ本体1へ電源
供給される。同時に制御回路8から信号線10を介して
コンピュータ本体1に停電検知信号が送られ、現在使用
中のデータのハードディスク装置13への書き込み処理
が行なわれる。
Normally, the commercial 100V power source 3 is directly supplied to the computer main body 1 through the gate 6. When a power failure occurs, the control circuit 8 is based on the signal from the power failure detection circuit 7.
As a result, the gate 6 is closed, the inverter 5 is instantly activated, and power is continuously supplied to the computer main body 1 from the power supply 4 for power failure. At the same time, a power failure detection signal is sent from the control circuit 8 to the computer main body 1 through the signal line 10, and the data currently in use is written into the hard disk device 13.

【0005】[0005]

【発明が解決しようとする課題】しかしながら上記のよ
うな構成では、無停電電源装置2からコンピュータ本体
への停電検知信号の伝達手段としてRS232C等の入
出力ポートを使用するか、または専用入出力ポートを設
けるかが必要であり、入出力ポートの数が限られている
コンピュータでは使用頻度の低い停電検知信号の転送に
入出力ポート使用するのは非効率である。 また、無停
電電源装置の取り付けには電源入力用のコンセント以外
にケーブルが必要であり、その取り付け作業には手間が
かかるという問題点を有していた。
However, in the above configuration, an input / output port such as RS232C is used as a means for transmitting a power failure detection signal from the uninterruptible power supply 2 to the computer main body, or a dedicated input / output port is used. It is inefficient to use the input / output port for transferring a power failure detection signal that is rarely used in a computer having a limited number of input / output ports. Further, the installation of the uninterruptible power supply requires a cable in addition to an outlet for power input, and there is a problem that the installation work is troublesome.

【0006】本発明は、上記従来の問題点を解決するも
ので、入出力ポートを使用する事なしにコンピュータ本
体へ停電の発生を知らせることができる無停電電源の提
供を目的とする。
The present invention solves the above-mentioned conventional problems, and an object thereof is to provide an uninterruptible power supply capable of notifying the computer main body of the occurrence of a power failure without using an input / output port.

【0007】[0007]

【課題を解決するための手段】上記課題を解決するため
に本発明の無停電電源インターフェースは、無停電電源
装置により、停電用電源と停電検知信号をコンピュータ
本体に提供する無停電電源インターフェースにおいて、
無停電電源装置内にコンピュータ本体への停電用電源出
力と停電検知信号とを合成する信号合成回路と、コンピ
ュータ本体の電源内に停電用電源出力と停電検知信号を
分離する信号分離回路を設けたものである。
In order to solve the above problems, the uninterruptible power supply interface of the present invention is an uninterruptible power supply interface for providing a power supply for power failure and a power failure detection signal to a computer main body by an uninterruptible power supply device,
In the uninterruptible power supply, a signal synthesis circuit that synthesizes the power failure output to the computer and the power failure detection signal, and a signal separation circuit that separates the power failure output and the power failure detection signal in the computer power It is a thing.

【0008】[0008]

【作用】上記構成の本発明の無停電電源インターフェー
スは、停電時に無停電電源装置内で、停電用電源出力と
停電検知信号を合成して、従来の電源供給線を通してコ
ンピュータ本体に送られ、コンピュータ本体側では、停
電用電源出力と停電検知信号を分離することにより停電
発生を知ることが可能となり、コンピュータ本体の入出
力ポートを用いることなしに無停電電源装置の接続が可
能となり、入出力ポートの数が限られているパーソナル
コンピュータの拡張性を損なうことなしに、無停電電源
装置を取り付けることができる。
The uninterruptible power supply interface of the present invention having the above-mentioned configuration combines the power output for power failure and the power failure detection signal in the uninterruptible power supply at the time of power failure, and sends them to the computer main body through the conventional power supply line. On the main unit side, it is possible to know the occurrence of a power failure by separating the power output for power failure and the power failure detection signal, and it is possible to connect the uninterruptible power supply without using the I / O port of the computer main unit. An uninterruptible power supply can be installed without compromising the expandability of a limited number of personal computers.

【0009】[0009]

【実施例】以下、本発明の実施例について図1、図2を
参照しながら説明する。 図1は本発明の一実施例にお
ける無停電電源装置インターフェースの構成を示すもの
である。なお、図1において1から13までは既に図3
で説明した内容と同じなので説明は省略する。14は停
電用電源出力と停電検知信号を重畳、変調等の方法によ
り合成する信号合成回路、15は信号合成回路14によ
り合成された信号を分離する信号分離回路である。 図
2は停電用電源出力と停電検知信号の合成の例である。
図2(a)の16は停電用電源出力の波形、図2(b)
の17は制御回路8からの停電検知信号、図2(c)の
18は停電用電源出力16と停電検知信号17と波形合
成された無停電電源装置2からの無停電電源出力であ
る。
Embodiments of the present invention will be described below with reference to FIGS. FIG. 1 shows the configuration of an uninterruptible power supply interface in one embodiment of the present invention. 1 to 13 in FIG.
The description is omitted because it is the same as the content described in. Reference numeral 14 is a signal synthesizing circuit for synthesizing the power output for power failure and the power failure detection signal by a method such as superimposing and modulating, and 15 is a signal separating circuit for separating the signal combined by the signal synthesizing circuit 14. FIG. 2 shows an example of combining the power output for power failure and the power failure detection signal.
16 in FIG. 2 (a) is a waveform of the power supply output for power failure, FIG. 2 (b)
17 is a power failure detection signal from the control circuit 8, and 18 in FIG. 2C is an uninterruptible power supply output from the uninterruptible power supply 2 which is waveform-combined with the power failure power output 16 and the power failure detection signal 17.

【0010】以上のように構成された本発明の実施例に
ついて、以下図1及び図2を用いてその動作を説明す
る。 まず図1により停電発生時の動作について説明す
る。停電発生時は従来例と同様に制御回路8により商用
AC100V電源から停電用電源4への切り替えの処理
が行なわれる。一方、制御回路8より出力された停電検
知信号17は従来例と異なり信号合成回路14に送ら
れ、停電用電源出力16と停電検知信号17が合成さ
れ、電源供給線9を介してコンピュータ本体1へ送られ
る。コンピュータ本体1側では、信号分離回路15によ
り停電用電源出力16と停電検知信号17に分離し、停
電検知信号17をメイン回路12に送ることにより停電
発生が認識され、現在使用中のデータのハードディスク
装置13への書き込み処理が行われ、重要なデータの損
失を防ぐことができる。
The operation of the embodiment of the present invention configured as described above will be described below with reference to FIGS. 1 and 2. First, the operation when a power failure occurs will be described with reference to FIG. When a power failure occurs, the control circuit 8 switches from the commercial AC 100V power supply to the power failure power supply 4 as in the conventional example. On the other hand, unlike the conventional example, the power failure detection signal 17 output from the control circuit 8 is sent to the signal synthesizing circuit 14, and the power failure power output 16 and the power failure detection signal 17 are synthesized, and the computer main body 1 through the power supply line 9. Sent to. On the computer main body 1 side, the signal separation circuit 15 separates the power failure output 16 and the power failure detection signal 17 and sends the power failure detection signal 17 to the main circuit 12 to recognize the occurrence of the power failure, and the hard disk of the data currently in use. The writing process to the device 13 is performed, and the loss of important data can be prevented.

【0011】図2により停電用電源出力16と停電検知
信号17の合成、分離の一例について説明する。停電発
生時の制御回路8からの停電検知信号17を、信号合成
回路14に送り、停電用電源出力16に停電検知信号1
7を重畳して無停電電源出力18を得たのち、コンピュ
ータ本体1への電源供給出力とする。コンピュータ本体
1では、無停電電源装置2から受け取った無停電電源出
力18を、信号分離回路15により停電用電源出力16
と停電検知信号17に分離し、それぞれ電源回路11と
メイン回路12に送り、メイン回路12に停電発生を知
らせる。また停電時には、データのハードディスクへの
書き込みの他に、停電発生通知音での警告、停電発生通
知の表示を行なう。なお、商用100V電源及び停電用
電源は交流で説明したが、直流でも同様な効果があるの
は言うまでもない。
An example of combining and separating the power failure power output 16 and the power failure detection signal 17 will be described with reference to FIG. A power failure detection signal 17 from the control circuit 8 when a power failure occurs is sent to the signal synthesizing circuit 14, and a power failure detection signal 1 is output to the power failure power output 16.
After superimposing 7 to obtain the uninterruptible power supply output 18, the power supply output to the computer main body 1 is made. In the computer main body 1, the uninterruptible power supply output 18 received from the uninterruptible power supply 2 is supplied to the power supply output 16 for power failure by the signal separation circuit 15.
And the power failure detection signal 17 are separated and sent to the power supply circuit 11 and the main circuit 12, respectively, to notify the main circuit 12 of the power failure occurrence. At the time of a power failure, in addition to writing data to the hard disk, a warning by a power failure occurrence notification sound and a power failure occurrence notification are displayed. Although the commercial 100V power source and the power source for blackout have been described as alternating current, needless to say, the same effect can be obtained by direct current.

【0012】[0012]

【発明の効果】以上の説明により明らかなように本発明
の無停電電源インターフェースは、無停電電源装置内に
コンピュータ本体への停電用電源出力と停電検知信号の
信号合成回路、コンピュータ本体内に停電用電源出力と
停電検知信号の分離回路を設けることにより、コンピュ
ータの拡張性を損なうことなしに、容易に無停電電源装
置を取り付けることができる。
As is apparent from the above description, the uninterruptible power supply interface of the present invention has a power synthesizing circuit for a power failure output signal to the computer main body and a power failure detection signal in the uninterruptible power supply, and a power failure in the computer main body. By providing the circuit for separating the power supply output for power supply and the power failure detection signal, the uninterruptible power supply can be easily attached without impairing the expandability of the computer.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例における無停電電源インターフ
ェースを用いた無停電電源装置と、パーソナルコンピュ
ータ本体の概略ブロック図。
FIG. 1 is a schematic block diagram of an uninterruptible power supply using an uninterruptible power supply interface and a personal computer main body according to an embodiment of the present invention.

【図2】(a)〜(c)は同実施例を説明するための信
号合成波形図。
2A to 2C are signal synthesis waveform diagrams for explaining the embodiment.

【図3】従来の無停電電源装置インターフェースを用い
たコンピュータの概略ブロック図。
FIG. 3 is a schematic block diagram of a computer using a conventional uninterruptible power supply interface.

【符号説明】[Explanation of symbols]

1 コンピュータ本体 2 無停電電源装置 3 商用100V電源(電源供給源) 4 停電用電源 7 停電検知回路 11 電源回路 14 信号合成回路 15 信号分離回路 1 Computer Main Body 2 Uninterruptible Power Supply 3 Commercial 100V Power Supply (Power Supply Source) 4 Power Outage 7 Power Failure Detection Circuit 11 Power Supply Circuit 14 Signal Synthesis Circuit 15 Signal Separation Circuit

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 電源供給源の停電を検知する停電検知回
路と、前記電源供給源の停電時に前記停電検知回路によ
る停電検知信号と停電用電源の出力を合成する信号合成
回路と、前記信号合成回路の出力からコンピュータ本体
への前記停電用電源の出力と前記停電検知信号に分離す
る信号分離回路を具備し、前記信号合成回路が無停電電
源装置内に、前記信号分離回路が前記コンピュータ本体
内に配置される無停電電源インターフェース。
1. A power failure detection circuit for detecting a power failure of a power supply source, a signal synthesizing circuit for synthesizing a power failure detection signal by the power failure detection circuit and an output of a power source for power failure at the time of power failure of the power source, and the signal synthesizing circuit. A signal separating circuit for separating the output of the power supply for power failure from the output of the circuit to the computer main body and the power failure detection signal, wherein the signal combining circuit is in an uninterruptible power supply, and the signal separating circuit is in the computer body. Uninterruptible power supply interface located at.
JP3217149A 1991-08-28 1991-08-28 No interruption electric power unit interface Pending JPH0553695A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3217149A JPH0553695A (en) 1991-08-28 1991-08-28 No interruption electric power unit interface

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3217149A JPH0553695A (en) 1991-08-28 1991-08-28 No interruption electric power unit interface

Publications (1)

Publication Number Publication Date
JPH0553695A true JPH0553695A (en) 1993-03-05

Family

ID=16699629

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3217149A Pending JPH0553695A (en) 1991-08-28 1991-08-28 No interruption electric power unit interface

Country Status (1)

Country Link
JP (1) JPH0553695A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7047431B2 (en) 2001-11-30 2006-05-16 Nec Corporation Uninterruptible power supply unit for allowing a computer to wake up before receiving notification of power failure

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7047431B2 (en) 2001-11-30 2006-05-16 Nec Corporation Uninterruptible power supply unit for allowing a computer to wake up before receiving notification of power failure

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