JPH0553549A - Image display device - Google Patents

Abstract

PURPOSE:To obtain data with only one access even when there are a large number of display screens, for instance, four, to eliminate the need of providing a storage region, and to simplify a circuit constitution by dividing a VRAM into banks, and controlling each divided bank. CONSTITUTION:When four screens are displayed, first, an image display controller (VDC) 5 simultaneously, accesses four banks of the VRAM 6, to read the BAT data of the width of 6-bits, and has the accesses of four times to read the BAT data of four screens. Then, the address of a character generator storing characters displayed on each screen is calculated from each BAT data, and a tip selecting signal, a character generator block selecting signal, and the inferior 6-bits of the address, are outputted, to read the dot data of each character. At this time, the dot data of four screens are obtained, so that the priority order of the screen is decided, and the data of one dot is transferred to a VCE 4, to execute a TV display.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image display device for a scanning type display.

[0002]

2. Description of the Related Art Conventionally, a structure as shown in FIG. 4 is known as an image display device of a scanning display. The central processing unit (CPU1) is a read-only memory (ROM
The program stored in 2) is read and executed.
Video RAM6 (VRAM for displaying on TV
6) The data for display is transferred to the image display control device (VDC5) and the data necessary for display is read from the VRAM6 at the display timing and internally processed to send the data to the video color encoder (VCE4) for television display. Interface 7 or 8
To become a TV signal.

The VRAM 6 shown in FIG. 4 is treated as one 16-bit wide RAM. When the 8 × 8 data structure is considered as the internal structure, the display screen of the television is decomposed as shown in FIG. 5 (a). Each decomposed 8 × 8 unit is called BAT and is numbered in hexadecimal number starting from 0. This BAT shows one screen. Therefore, if you want to display several screens at the same time, you need BAT for the number of screens.
As shown in (a), in the case of a four-screen display, BAT is A,
Four B, C, D are required.

FIG. 5C shows the data structure of each BAT.
The 16-bit wide data structure shown in is used. The character code in this data structure is the upper 12b of the address of the VRAM in which the picture and character (referred to as a character generator) that is actually set in each BAT is stored.
refers to it. V indicated by this character code
Data having a structure as shown in FIG. 7 is stored in the RAM address. One picture or character is defined in the area shown by the 8 × 8 matrix. Or multiple 8x8
Use the matrix of to define a picture or letter.

When 16 different colors are used for each dot, 4-bit data is required. As shown in FIG. 7, CH1, CH2, CH3, and CH4 have 4 bits.
This is achieved by superimposing different types of data.

On the other hand, when several screens are simultaneously displayed on the TV, it is necessary to prioritize dots on each screen on the TV screen and display only necessary data. In other words, it is necessary to create a state where the dots on the lower screen are hidden by the data on the upper screen. Therefore, the data for each screen of a certain dot on the TV is stored in VRAM.
The screen display control device controls the read-out screen display control device to sequentially store the data in order, and display the data of higher priority. However, in this case, it is assumed that the dot data on the upper screen has a higher priority.

[0007]

Since the conventional image display device as described above is configured as described above, it has the following problems.

When reading the data for each screen required for displaying a plurality of screens simultaneously, since the VRAM is treated as one RAM with a 16-bit width, it is necessary to read the character generator the same number of times as the number of display screens. In addition, there is a big problem that a circuit for storing the character of each screen is required in the image display control device.

[0009]

According to the image display device of the present invention, when the display control of the scanning type display is performed, the storage means for storing the display information can be divided into a plurality of parts in the bit width direction. , Each of the storage means divided in the bit width direction can be controlled individually or simultaneously.

[0010]

1 is a block diagram of an image display device of the present invention. The configuration will be described below with reference to FIG.

The central processing unit (CPU1) in FIG. 1 reads and executes the program stored in the read-only memory (ROM2). In order to display on a television, data for display is transferred to the video RAM 6 (VRAM 6), and the image display control device (VDC 5) reads out data necessary for display from the VRAM 6 at display timing and internally processes it to perform a video color encoder ( The data is sent to the VCE 4), converted into a signal that can be displayed on the television, and converted into a television signal through the interface 7 or 8. V
In this case, the RAM 6 is divided into four banks and independent chip select signals and character generator block select signals are connected to them. VRAM6 is 16bit
In the case of the width, each bank has 4 bits. FIG. 3 shows an example of the character generator of the image display device of the present invention. When the character generator has the configuration shown in the figure, the lower 6 bits of the address can be commonly used in each bank.

Displaying four screens Considering the 8 × 8 data structure as the VRAM internal data structure, the display screen of the television is divided into four screens of BAT data as shown in FIG. 2 (a). .. Each decomposed 8x8
The unit of is called BAT and is numbered in hexadecimal numbers starting from 0. In the case of a normal home television, the horizontal display range is about 256 dots at a dot rate of 5 MHz. Therefore, 32 8 × 8 data structures are arranged in the horizontal direction.

The data structure of each BAT is 4 of VRAM.
16 shown in FIG. 2 (b) that is enabled by bank access
Use a bit wide data structure. The character code in this data structure indicates the upper 12 bits of the address of the VRAM storing the character generator which is actually set in each BAT. The data of the configuration shown in FIG. 3 is stored in the VRAM address indicated by this character code.

When four screens are displayed with the above-mentioned data structure: First, VDC 5 simultaneously accesses 4 banks of VRAM 6 and reads 16-bit wide BAT data. Four
Access four times to read BAT data for 4 screens. Next, the address of the character generator in which the character to be displayed on each screen is stored is calculated from each BAT data, and the chip select signal, the character generator block select signal, and the lower 6 bits of the address are output to read the dot data of each character. .. At this time, since the dot data for four screens can be obtained at the same time, the priority order of the screens is determined and the one-dot data is transferred to the VCE4 to display it on the television.

When the number of screens is less than 4, for example, in the case of two, VDC 5 accesses VRAM 6 twice to read BAT data for 2 screens. Next two bats
The address of the character generator is calculated from the data, the chip select signal for two banks, the character generator block select signal, and the lower 6 bi of the address.
t to output the dot data of two characters to VRA
Read from M6.

FIG. 3 shows an example of the character generator of the image display device of the present invention as described above. In this case, one word 16 bits is divided into four banks, which are referred to as bank A, bank B, bank C, and bank D, respectively. Each bank has a width of 4 bits and uses 64 words to represent one character. 6 bits are required to specify a 64-word address. As described above, each bank can be accessed individually or simultaneously as necessary by controlling the chip select signal and the like. In other words, in case of 1 bank access, 4 bi
t width, 8 bit width for 2 bank access,
In the case of 4-bank access, the width is 16 bits.

[0017]

As described above, according to the present invention, by dividing the VRAM into banks and controlling each of the divided banks, even if the number of display screens is as large as four, data can be accessed by one access. Therefore, it is not necessary to provide a storage area in the image display control device, and the circuit configuration can be simplified.

In addition, when writing a large amount of data such as initial data transfer from a program ROM or the like, the banks are put together into one by making them parallel, and writing one word is equivalent to a bit width such as 16 bit width. Can be handled and the increase in data transfer time can be prevented.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an image display device of the present invention.

FIG. 2 is a configuration diagram of a VRAM of the image display device of the present invention.

FIG. 3 is another configuration diagram of the VRAM of the image display device of the present invention.

FIG. 4 is a configuration diagram of a conventional image display device.

FIG. 5 is a configuration diagram of a VRAM of a conventional image display device.

FIG. 6 is a configuration diagram of four screens of a VRAM of a conventional image display device.

FIG. 7 is another configuration diagram of the VRAM of the conventional image display device.

[Explanation of symbols]

 1 CPU 2 Program ROM 3 RAM 4 Video Color Encoder (VCE) 5 Video Display Controller (VDC) 6 VRAM 7 Television Interface 8 Television Interface 9 Television

Claims (1)

[Claims] 1. An image display device for displaying on a scanning display, comprising a storage means for storing display information.
An image display device, wherein division control is possible in a plurality of parts in the width direction, and each of the storage means divided in the bit width direction can be controlled individually or simultaneously.