JPH0553331U - converter - Google Patents
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- JPH0553331U JPH0553331U JP10149091U JP10149091U JPH0553331U JP H0553331 U JPH0553331 U JP H0553331U JP 10149091 U JP10149091 U JP 10149091U JP 10149091 U JP10149091 U JP 10149091U JP H0553331 U JPH0553331 U JP H0553331U
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Abstract
(57)【要約】
【目的】 ＶＳＡＴのインドアユニットに組み込んだＴ
Ｖコンバータにおいて信号の流れを直線性にしてその損
失や外からの妨害を防止する。
【構成】 シャーシベース２４内において、入力端子Ｖ
ｉから第１区画室Ａ内に第１増幅器３４と第１混合器３
５と中間フィルタ部３８と第２混合器３９とを直線状に
配すると共に、その配列に沿って第２区画室Ｂ内に第
１、第２局部発振器４０、４１をエアーシールド部４３
を挟んで直線状に配する。そして、第２混合器３９及び
第２局部発振器４１に隣接して、第３区画室Ｃ内に第２
増幅器と帯域濾波器と低域濾波器とを含む出力部３３を
配する。
(57) [Summary] [Purpose] T built into the indoor unit of VSAT
The V converter has a linear signal flow to prevent its loss and interference from the outside. [Configuration] Input terminal V in chassis base 24
i from the first compartment A into the first amplifier 34 and the first mixer 3
5, the intermediate filter unit 38, and the second mixer 39 are linearly arranged, and the first and second local oscillators 40 and 41 are arranged in the second compartment B along the arrangement of the air shield unit 43.
Arrange in a straight line across. Then, adjacent to the second mixer 39 and the second local oscillator 41, a second
An output 33 is provided which includes an amplifier, a bandpass filter and a low pass filter.
Description
【０００１】[0001]
本考案はコンバータに関し、詳しくは双方向データ通信用超小型衛星通信地球 局（以下ＶＳＡＴと称す。）においてＢＳレシーバの接続を可能にしたＴＶコン バータに関するものである。 The present invention relates to a converter, and more particularly to a TV converter that enables connection of a BS receiver in a micro satellite earth station for bidirectional data communication (hereinafter referred to as VSAT).
【０００２】[0002]
近年、通信衛星を用いたＶＳＡＴと称す双方向のデータ通信システムが知られ ており、その一例を図３を参照して次に示す。図において（１）は通信衛星、（ ２）は地上アンテナ、（３）はアウトドアユニット、（以下ＯＤＵと称す。）、 （４）はインドアユニット（以下ＩＤＵと称す。）である。上記ＯＤＵ（３）は ダウンコンバータを有し、通信衛星（１）から受信した１２〜１４ＧＨｚの信号 を第１ＩＦ周波数に周波数変換してＩＤＵ（４）に送出する。ＩＤＵ（４）は、 ＯＤＵ（３）に接続した分配器（５）と、分配器（５）に接続したダウンコンバ ータ（６）と、ダウンコンバータ（６）に接続した復調器（７）と、復調器（７ ）に接続したＣＰＵ（８）とを具備すると共に、分配器（５）にＴＶコンバータ （９）を接続してＢＳレシーバ（１０）の接続を可能にする。 In recent years, a bidirectional data communication system called VSAT using a communication satellite is known, and an example thereof is shown below with reference to FIG. In the figure, (1) is a communication satellite, (2) is a ground antenna, (3) is an outdoor unit, (hereinafter referred to as ODU), and (4) is an indoor unit (hereinafter referred to as IDU). The ODU (3) has a down converter and frequency-converts a signal of 12 to 14 GHz received from the communication satellite (1) into a first IF frequency and sends it to the IDU (4). The IDU (4) includes a distributor (5) connected to the ODU (3), a down converter (6) connected to the distributor (5), and a demodulator (7) connected to the down converter (6). And a CPU (8) connected to a demodulator (7) and a TV converter (9) connected to a distributor (5) to enable connection of a BS receiver (10).
【０００３】 即ち、通信衛星（１）から送る信号は通信用データ信号だけでなく、ＢＳ信号 （放送用）も含んでおり、まず、データを受信する場合、地上アンテナ（２）に て受信した高周波の受信データ信号をＯＤＵ（３）において第１ＩＦ周波数に変 換してＩＤＵ（４）に送出する。そこで、ＩＤＵ（４）の分配器（５）を介して ダウンコンバータ（６）に入力した受信データ信号を第２ＩＦ周波数に変換し、 更に復調器（７）により復調してＣＰＵ（８）にて処理する。That is, the signal sent from the communication satellite (1) includes not only the data signal for communication but also the BS signal (for broadcasting). First, when receiving the data, the signal is received by the ground antenna (2). The high frequency received data signal is converted into the first IF frequency in the ODU (3) and sent to the IDU (4). Therefore, the received data signal input to the down converter (6) through the distributor (5) of the IDU (4) is converted into the second IF frequency, and further demodulated by the demodulator (7) and then by the CPU (8). To process.
【０００４】 次に、ＢＳ信号を受信する場合、ＯＤＵ（３）からＩＤＵ（４）に送出された 第１ＩＦ周波数のＢＳ信号を分配器（５）を経てＴＶコンバータ（９）に送出す る。そこで、ＴＶコンバータ（９）においてＢＳ受信周波数に周波数変換してＢ Ｓレシーバ（１０）にて受像する。Next, when receiving the BS signal, the BS signal of the first IF frequency transmitted from the ODU (3) to the IDU (4) is transmitted to the TV converter (9) via the distributor (5). Therefore, the TV converter (9) frequency-converts it into a BS reception frequency, and the BS receiver (10) receives the image.
【０００５】 上記ＴＶコンバータ（９）は、図４に示すように、入力端子（Ｖｉ）に接続し た第１増幅器（１１）と第１混合器（１２）と帯域濾波器（１３）と第２混合器 （１４）とからなる周波数変換部（１５）と、第１、第２混合器（１２）（１４ ）にそれぞれ接続した第１、第２局部発振器（１６）（１７）からなる発振部（ １８）と、第２混合器（１４）に接続した第２増幅器（１９）と帯域濾波器（２ ０）とからなる出力部（２１）とを具備し、出力部（２１）より出力端子（Ｖｏ ）を導出する。As shown in FIG. 4, the TV converter (9) includes a first amplifier (11) connected to an input terminal (Vi), a first mixer (12), a bandpass filter (13) and a first amplifier (11). Oscillation consisting of a frequency converter (15) consisting of two mixers (14) and first and second local oscillators (16) and (17) respectively connected to the first and second mixers (12) and (14). And an output section (21) comprising a second amplifier (19) connected to the second mixer (14) and a bandpass filter (20), and an output from the output section (21). The terminal (Vo) is derived.
【０００６】 上記ＴＶコンバータ（９）において入力端子（Ｖｉ）に分配器（５）から第１ ＩＦ周波数に変換されたＢＳ信号が入力すると、第１増幅器（１１）を通過した 後、第１混合器（１２）において第１発振器（１６）の信号と混合し、中間周波 数に周波数変換する。そこで、帯域濾波器（１３）を経て中間周波数の信号を通 過させ、入力周波数の出力周波数と重なる帯域を遮断して入出力のアイソレーシ ョンを確保した後、第２混合器（１４）において第２発振器（１７）の信号と混 合し、ＢＳ受信周波数に周波数変換する。そして、第２増幅器（１９）と帯域濾 波器（２０）を経て出力端子（Ｖｏ）より出力する。When the BS signal converted into the first IF frequency from the distributor (5) is input to the input terminal (Vi) of the TV converter (9), the BS signal passes through the first amplifier (11) and then the first mixing (11). In the device (12), it is mixed with the signal of the first oscillator (16) and frequency-converted to an intermediate frequency. Therefore, after passing the intermediate frequency signal through the bandpass filter (13) and blocking the band overlapping the output frequency of the input frequency to ensure the isolation of the input and output, the second mixer (14) It is mixed with the signal from the second oscillator (17) and frequency converted to the BS reception frequency. Then, the signal is output from the output terminal (Vo) through the second amplifier (19) and the bandpass filter (20).
【０００７】 又、図５に示すように、上記ＴＶコンバータ（９）を矩形枠状シャーシベース （２２）に組み込むに際しては、シャーシベース内を升目状に８分割し、図の上 段側に左（入力側）から第１増幅器（１１）と第１混合器（１２）と第２局部発 振器（１７）と第２混合器（１４）とを順次、配置すると共に、下段側に左から 電源安定化回路（２３）と第１局部発振器（１６）と帯域濾波器（１３）と出力 部（２１）を配し、更に、第１増幅器（１１）と電源安定化回路（２３）と出力 部（２１）からそれぞれ入力端子（Ｖｉ）と電源端子（Ｖｂ）と出力端子（Ｖｏ ）とを導出する。上記構成によれば、第１、第２局部発振器（１６）（１７）を 離隔・配置してその隣接を妨げ、それらの間の相互干渉を防止して高調波妨害（ ビート妨害）を阻止しておく。Further, as shown in FIG. 5, when the TV converter (9) is assembled into the rectangular frame-shaped chassis base (22), the chassis base is divided into eight cells in a grid shape, and the left side is shown on the upper side of the figure. From the (input side), the first amplifier (11), the first mixer (12), the second local oscillator (17) and the second mixer (14) are sequentially arranged, and from the left side to the lower side. A power supply stabilizing circuit (23), a first local oscillator (16), a bandpass filter (13) and an output unit (21) are arranged, and further, a first amplifier (11), a power supply stabilizing circuit (23) and an output. An input terminal (Vi), a power supply terminal (Vb), and an output terminal (Vo) are derived from the section (21). According to the above configuration, the first and second local oscillators (16) and (17) are separated and arranged to prevent their adjacency, prevent mutual interference between them, and prevent harmonic interference (beat interference). Keep it.
【０００８】[0008]
解決しようとする課題は、図５に示すＴＶコンバータ（９）の各回路の配置に おいて、信号が入力端子（Ｖｉ）から第１増幅器（１１）、第１混合器（１２） 、帯域濾波器（１３）、第２混合器（１４）、及び出力部（２１）を経て出力端 子（Ｖｏ）から出力されるため、信号の流れがジグザグになって、信号の損失が 大きくなり、且つ、不要信号の妨害を受け易い点である。又、帯域濾波器（１３ ）の通過帯域が基準帯域の奇数倍においても生じるため、その帯域を第１、第２ 局部発振器（１６）（１７）のビート周波数が通過してビート妨害を十分に阻止 できない点もある。 The problem to be solved is that in the arrangement of each circuit of the TV converter (9) shown in FIG. 5, a signal is input from the input terminal (Vi) to the first amplifier (11), the first mixer (12), the band-pass filter. Since it is output from the output terminal (Vo) through the device (13), the second mixer (14), and the output unit (21), the signal flow becomes zigzag, and the signal loss increases, and The point is that it is easily disturbed by unnecessary signals. Further, since the pass band of the bandpass filter (13) occurs even at an odd multiple of the reference band, the beat frequencies of the first and second local oscillators (16) and (17) pass through that band to sufficiently prevent beat interference. There are some points that cannot be stopped.
【０００９】[0009]
本考案は、第１、第２、第３、第４側板を順次、連続的に一体成形して矩形枠 を形成してなり、第２、第４側板に平行な第１仕切り板と第１、第３側板に平行 な第２仕切り板とをＴ字状に組み合わせて第１、第２側板に隣接した第１区画室 、第１、第４側板に隣接した第２区画室、及び第２、第３、第４側板に隣接した 第３区画室をそれぞれ形成したシャーシベースと、上記第１区画室内に、第１側 板側より第２側板に沿って順次、第１増幅器、第１混合器、帯域濾波器と低域濾 波器からなる中間フィルタ部、及び第２混合器をそれぞれ直線状に配した周波数 変換部と、上記第２区画室内に、第１側板側より電源安定化回路を介し第４側板 に沿って順次、第１局部発振器、エアーシールド部、及び第２局部発振器をそれ ぞれ配した発振部と、上記第３区画室内に、第２増幅器、帯域濾波器及び低域濾 波器をそれぞれ配した出力部とを具備したことを特徴とする。 According to the present invention, the first, second, third, and fourth side plates are successively and integrally formed to form a rectangular frame, and the first partition plate and the first partition plate parallel to the second and fourth side plates are formed. A first partition chamber adjacent to the first and second side plates by combining a second partition plate parallel to the third side plate in a T shape, a second partition chamber adjacent to the first and fourth side plates, and a second partition chamber. , A chassis base in which a third compartment is formed adjacent to the third and fourth side plates, respectively, and a first amplifier and a first mixer are sequentially arranged in the first compartment along the second side plate from the first side plate side. Converter, an intermediate filter unit including a bandpass filter and a low-pass filter, and a frequency conversion unit in which a second mixer is linearly arranged, and a power supply stabilization circuit from the first side plate side in the second compartment. Oscillation in which the first local oscillator, the air shield part, and the second local oscillator are sequentially arranged along the fourth side plate via the When, in the third compartment, characterized by comprising a second amplifier, bandpass filter, and an output unit that Teiiki濾 wave device was placed, respectively.
【００１０】[0010]
上記技術的手段によれば、シャーシベース内に配したＴＶコンバータの各回路 において信号が入力端子から出力部まで直線的に流れ、出力端子（Ｖｏ）から出 力される。又、第１、第２局部発振器の間にエアーシールド部を配すると共に、 帯域濾波器に低域濾波器を付加した中間フィルタ部を設けて帯域濾波器の奇数倍 通過帯域を遮断し、第１、第２局部発振器の間で生じる相互干渉を防止する。 According to the above technical means, a signal linearly flows from the input terminal to the output section in each circuit of the TV converter arranged in the chassis base, and is output from the output terminal (Vo). Further, an air shield section is arranged between the first and second local oscillators, and an intermediate filter section in which a low pass filter is added to the band pass filter is provided to cut off an odd multiple pass band of the band pass filter. First, mutual interference between the second local oscillators is prevented.
【００１１】[0011]
本考案に係るコンバータの実施例を図１及び図２を参照して以下に説明する。 まず図１において（２４）はシャーシベースで、第１、第２、第３、第４側板（ ２５）（２６）（２７）（２８）を順次、連続的に一体成形して矩形枠を形成し てなる。そして、第２、第４側板（２６）（２８）に平行な第１仕切り板（２９ ）と、第１、第３側板（２５）（２７）に平行な第２仕切り板（３０）とを横Ｔ 字状に組み合わせて、第１、第２側板（２５）（２６）に隣接した第１区画室（ Ａ）と、第１、第４側板（２５）（２８）に隣接した第２区画室（Ｂ）と、第２ 、第３、第４側板（２６）（２７）（２８）に隣接した第３区画室（Ｃ）とをそ れぞれ形成し、第１、第２、第３区画室（Ａ）（Ｂ）（Ｃ）内に周波数変換部（ ３１）と発振部（３２）と出力部（３３）とをそれぞれ組み込む。 An embodiment of the converter according to the present invention will be described below with reference to FIGS. First, in FIG. 1, (24) is a chassis base, and the first, second, third, and fourth side plates (25), (26), (27), (28) are successively and integrally formed to form a rectangular frame. It will be done. Then, a first partition plate (29) parallel to the second and fourth side plates (26) (28) and a second partition plate (30) parallel to the first and third side plates (25) (27) are provided. A first partition chamber (A) adjacent to the first and second side plates (25) and (26) and a second partition adjacent to the first and fourth side plates (25) and (28) in combination in a horizontal T shape. The chamber (B) and the third compartment (C) adjacent to the second, third, and fourth side plates (26), (27), (28) are formed respectively, and the first, second, and third chambers are formed. A frequency conversion section (31), an oscillation section (32) and an output section (33) are incorporated in the three compartments (A), (B) and (C), respectively.
【００１２】 上記周波数変換部（３１）は、図２に示すように、入力端子（Ｖｉ）に順次、 接続した第１増幅器（３４）と、第１混合器（３５）と、帯域濾波器（３６）と 低域濾波器（３７）からなる中間フィルタ部（３８）と、第２混合器（３９）と を具備する。そして、第１区画室（Ａ）を第２側板（２６）に沿って４分割し、 それぞれに第１側板（２５）側より順次、第１増幅器（３４）と第１混合器（３ ５）と中間フィルタ部（３８）と第２混合器（３９）とを組み込んで直線状にそ れらを配すると共に、第１増幅器（３４）より第１側板（２５）側へ入力端子（ Ｖｉ）を導出する。As shown in FIG. 2, the frequency conversion unit (31) includes a first amplifier (34), a first mixer (35), and a bandpass filter (, which are sequentially connected to an input terminal (Vi). 36) and an intermediate filter section (38) consisting of a low pass filter (37), and a second mixer (39). Then, the first compartment (A) is divided into four along the second side plate (26), and the first amplifier (34) and the first mixer (35) are sequentially arranged from the first side plate (25) side. And the intermediate filter section (38) and the second mixer (39) are installed and arranged linearly, and the input terminal (Vi) from the first amplifier (34) to the first side plate (25) side. Derive.
【００１３】 発振部（３２）は、第１、第２混合器（３５）（３９）にそれぞれ接続した第 １、第２局部発振器（４０）（４１）を具備する。そして、第１区画室（Ｂ）を 第４側板（２８）に沿って４分割し、第１側板（２５）側より電源安定化回路（ ４２）介し第４側板（２８）に沿って順次、第１局部発振器（４０）と、エアー シールド部（４３）と、第２局部発振器（４１）とを組み込んで直線状にそれら を配すると共に、各仕切りは２重シールドとし、電源安定化回路（４２）より第 １側板（２５）側へ電源端子（Ｖｂ）を導出する。The oscillating unit (32) includes first and second local oscillators (40) (41) connected to the first and second mixers (35) (39), respectively. Then, the first compartment (B) is divided into four along the fourth side plate (28), and sequentially from the first side plate (25) side through the power source stabilizing circuit (42) along the fourth side plate (28). The first local oscillator (40), the air shield part (43), and the second local oscillator (41) are installed and arranged linearly, and each partition is a double shield, and the power stabilization circuit ( 42) The power supply terminal (Vb) is led out to the 1st side plate (25) side.
【００１４】 出力部（３３）は、第２混合器（３９）に順次、接続した第２増幅器（４４） と帯域濾波器（４５）と低域濾波器（４６）とを具備し、第３区画室（Ｃ）内に 組み込むと共に、第４側板（２８）側へ出力端子（Ｖｏ）を導出する。The output section (33) comprises a second amplifier (44), a bandpass filter (45), and a low-pass filter (46) connected in sequence to the second mixer (39), The output terminal (Vo) is led out to the side of the fourth side plate (28) while being installed in the compartment (C).
【００１５】 上記構成に基づき本考案の動作を次に説明する。まず、入力端子（Ｖｉ）に分 配器（５）（図３参照）から第１ＩＦ周波数に変換されたＢＳ信号が入力すると 、第１増幅器（３４）を通過した後、第１混合器（３５）において第１発振器（ ４０）の信号と混合し、中間周波数に周波数変換する。そこで、中間フィルタ部 （３８）を経て中間周波数の信号を通過させ、入力周波数の出力周波数と重なる 帯域を遮断して入出力のアイソレーションを確保すると共に、低域濾波器（３７ ）にて帯域濾波器（３８）の奇数倍通過帯域を遮断した後、第２混合器（３９） において第２発振器（４１）の信号と混合し、ＢＳ受信周波数に周波数変換する 。そして、第２増幅器（４４）と帯域濾波器（４５）と低域濾波器（４６）を経 て出力端子（Ｖｏ）より出力する。The operation of the present invention based on the above configuration will be described below. First, when the BS signal converted to the first IF frequency from the distributor (5) (see FIG. 3) is input to the input terminal (Vi), it passes through the first amplifier (34) and then the first mixer (35). At, the signal is mixed with the signal of the first oscillator (40) and frequency converted to an intermediate frequency. Therefore, the intermediate frequency signal is passed through the intermediate filter section (38), the band overlapping the output frequency of the input frequency is blocked to ensure the input / output isolation, and the low pass filter (37) controls the band. After blocking the odd-numbered pass band of the filter (38), it is mixed with the signal of the second oscillator (41) in the second mixer (39) and frequency-converted to the BS reception frequency. Then, the signal is output from the output terminal (Vo) through the second amplifier (44), the bandpass filter (45) and the low pass filter (46).
【００１６】 この時、シャーシベース（２４）内において入力端子（Ｖｉ）から入力したＢ Ｓ信号は、第１増幅器（３４）と第１混合器（３５）と中間フィルタ部（３８） と第２混合器（３９）とを経て出力部（３３）に到り、出力端子（Ｖｏ）から出 力される。そのため、出力部（３３）に到る信号の流れは、略直線状となって損 失が最小になると共に、不要信号の妨害を防止できる。又、第１、第２局部発振 器（４０）（４１）の間にエアーシールド部（３２）を設けると共に、２重シー ルド（４７）にて仕切っているため、第１、第２局部発振器（４０）（４１）の 間の相互干渉を防止でき、ビート妨害を阻止できる。更に、入出力端子（Ｖｉ） （Ｖｏ）間の距離が大きくなり、アイソレーションを大きく取れる。At this time, the B S signal input from the input terminal (Vi) in the chassis base (24) includes the first amplifier (34), the first mixer (35), the intermediate filter unit (38), and the second filter (38). It reaches the output part (33) through the mixer (39) and is output from the output terminal (Vo). Therefore, the flow of the signal reaching the output section (33) becomes substantially linear so that the loss is minimized and the interference of the unnecessary signal can be prevented. Moreover, since the air shield part (32) is provided between the first and second local oscillators (40) and (41) and the partition is divided by the double shield (47), the first and second local oscillators are provided. Mutual interference between (40) and (41) can be prevented, and beat interference can be prevented. Further, the distance between the input / output terminals (Vi) and (Vo) becomes large, and a large isolation can be obtained.
【００１７】[0017]
本考案によれば、ＶＳＡＴのＩＤＵに組み込んだＴＶコンバータにおいてシャ ーシベース内における信号の流れが略直線状になってその損失が最小になると共 に、不要信号の妨害を防止でき、且つ、２個の局部発振器の間にエアーシールド 部を設けたから、それらの間の相互干渉を防止でき、性能が向上する。 According to the present invention, in a TV converter incorporated in an IDU of VSAT, the signal flow in the chassis base becomes substantially linear and its loss is minimized, and at the same time, the unwanted signal interference can be prevented and two Since the air shield part is provided between the local oscillators of, the mutual interference between them can be prevented and the performance is improved.
【図面の簡単な説明】[Brief description of drawings]
【図１】本考案に係るコンバータの実施例を示すシャー
シベース内における各回路の配置図である。FIG. 1 is a layout view of each circuit in a chassis base showing an embodiment of a converter according to the present invention.
【図２】本考案に係るコンバータの実施例を示すブロッ
ク図である。FIG. 2 is a block diagram showing an embodiment of a converter according to the present invention.
【図３】ＶＳＡＴの一例を示すブロック図である。FIG. 3 is a block diagram showing an example of VSAT.
【図４】従来のコンバータの一例を示すブロック図であ
る。FIG. 4 is a block diagram showing an example of a conventional converter.
【図５】図４に示すコンバータのシャーシベース内にお
ける各回路の配置図である。5 is a layout view of each circuit in the chassis base of the converter shown in FIG.
２５、２６、２７、２８ 第１、第２、第３、第４側板 ２９、３０ 第１、第２仕切り板 ３１ 周波数変換部 ３２ 発振部 ３３ 出力部 ３４ 第１増幅器 ３５、３９ 第１、第２混合器 ３８ 中間フィルタ部 ４０、４１ 第１、第２局部発振器 ４３ エアーシールド部 Ｖｉ、Ｖｏ 入出力端子 25, 26, 27, 28 1st, 2nd, 3rd, 4th side plate 29, 30 1st, 2nd partition plate 31 Frequency conversion part 32 Oscillation part 33 Output part 34 1st amplifier 35, 39 1st, 1st 2 mixer 38 intermediate filter section 40, 41 first and second local oscillator 43 air shield section Vi, Vo input / output terminal
Claims (2)
続的に一体成形して矩形枠を形成してなり、第２、第４
側板に平行な第１仕切り板と第１、第３側板に平行な第
２仕切り板とをＴ字状に組み合わせて第１、第２側板に
隣接した第１区画室、第１、第４側板に隣接した第２区
画室、及び第２、第３、第４側板に隣接した第３区画室
をそれぞれ形成したシャーシベースと、上記第１区画室
内に、第１側板側より第２側板に沿って順次、第１増幅
器、第１混合器、帯域濾波器と低域濾波器からなる中間
フィルタ部、及び第２混合器をそれぞれ直線状に配した
周波数変換部と、上記第２区画室内に、第１側板側より
電源安定化回路を介し第４側板に沿って順次、第１局部
発振器、エアーシールド部、及び第２局部発振器をそれ
ぞれ配した発振部と、上記第３区画室内に、第２増幅
器、帯域濾波器及び低域濾波器をそれぞれ配した出力部
とを具備したことを特徴とするコンバータ。1. A rectangular frame is formed by sequentially and integrally forming first, second, third, and fourth side plates into a second frame and a fourth frame.
A first partition plate adjacent to the first and second side plates by combining a first partition plate parallel to the side plate and a second partition plate parallel to the first and third side plates in a T shape, first and fourth side plates. A second compartment adjacent to each other and a third compartment adjacent to each of the second, third, and fourth side plates, and the first compartment inside the first side plate along the second side plate. Sequentially in sequence, the first amplifier, the first mixer, the intermediate filter unit including the bandpass filter and the low-pass filter, and the frequency conversion unit in which the second mixer is linearly arranged, and in the second compartment, From the first side plate side through the power source stabilizing circuit along the fourth side plate in order, the oscillation unit in which the first local oscillator, the air shield unit, and the second local oscillator are respectively arranged, and the second compartment in the third compartment. And an output section in which an amplifier, a bandpass filter, and a low-pass filter are respectively arranged. Converter to butterflies.
ルドを設けたことを特徴とする請求項１記載のコンバー
タ。2. The converter according to claim 1, wherein double shields are provided on both sides of the air shield portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10149091U JP2550283Y2 (en) | 1991-12-10 | 1991-12-10 | converter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10149091U JP2550283Y2 (en) | 1991-12-10 | 1991-12-10 | converter |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0553331U true JPH0553331U (en) | 1993-07-13 |
| JP2550283Y2 JP2550283Y2 (en) | 1997-10-08 |
Family
ID=14302132
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10149091U Expired - Lifetime JP2550283Y2 (en) | 1991-12-10 | 1991-12-10 | converter |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2550283Y2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2003063371A1 (en) * | 2002-01-22 | 2003-07-31 | Matsushita Electric Industrial Co., Ltd. | High frequency signal receiving apparatus |
-
1991
- 1991-12-10 JP JP10149091U patent/JP2550283Y2/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2003063371A1 (en) * | 2002-01-22 | 2003-07-31 | Matsushita Electric Industrial Co., Ltd. | High frequency signal receiving apparatus |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2550283Y2 (en) | 1997-10-08 |
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