JPH0548425A - Transmission test method for feed termination system for logic circuit - Google Patents

Abstract

PURPOSE:To detect a transmission fault relating to a transmission line with simple configuration by providing a switch section connecting a transmission line and a low potential power supply section or bringing them into an insulating state with an external command to the system. CONSTITUTION:A logic section 5 of a sender side integrated circuit section 10 generates a test signal and the signal is sent to a receiver side integrated circuit section 30 through a termination resistor 40 and a transmission line 20. In this case, a command is given to a switch section 110 to bring the transmission line 20 and a low potential power supply section 100 into the conductive state. The test signal sent through the transmission line 20 is outputted through a pin scan gate 80, and since a low potential V2 is lower than two high/low levels outputted from the sender side integrated circuit section 10, a current flows through the transmission line 20. Then the resistance of the transmission line 20 is detected by comparing a potential from the pin scan gate 120 with a potential from the pin scan gate 80.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for testing a feed termination line of a logic circuit such as an ECL logic circuit, and particularly to two levels of high and low in a potential region sandwiched between a high potential V ₁ and a low potential V _2. The transmission-side integrated circuit unit that transmits the signal represented by, the reception-side integrated circuit unit that receives the signal, the transmission line that connects these circuit units, and the transmission-side integrated circuit unit A logic part formed by elements, a terminating resistor,
A high-potential power supply having a logic portion formed of logic elements and a high potential V ₁ in the receiving side integrated circuit portion, and a pin scan gate for outputting a test signal before transmission through the transmission line. Section, a low-potential power supply section having a low potential V ₂ , a diode for protection from a predetermined current, and a pin scan gate for outputting a test signal transmitted via a transmission line. The present invention relates to a transmission terminating method transmission test method for a logic circuit in which a test signal transmitted from an integrated circuit section to a receiving side integrated circuit section via a transmission line is output from a pin scan gate to perform a transmission test. Although a receiving and terminating system is used in which a terminating resistor is provided on the receiving side of a transmission line that has been widely used from the past, the present invention is used in place of the terminating resistor. It is an object of the present invention to provide a transmission terminating method of a logic circuit which can detect a transmission abnormality occurring in a transmission line when the terminating method is adopted.

[0002]

2. Description of the Related Art Conventionally, as shown in FIG. 5, there has been a transmission test method of an ECL logic circuit in a feed termination system. In this system, the transmission side integrated circuit unit 1 for transmitting a signal represented by two levels, high and low, in a potential region sandwiched between the high potential V ₁ = V _CC and the low potential V ₂ = V _EE And a receiving side integrated circuit section 3 for receiving the signal via a transmission line 2, and the transmitting side integrated circuit section 1 is provided with a logic section 5 formed by an ECL method and a terminating resistor 4 of 50Ω. The receiving side integrated circuit unit 3 has a logic unit 6 formed by an ECL method, a high potential power supply unit 9 having a high potential V _CC , a low potential power supply unit 14 having a low potential V _EE , and exceeding a limit. Further, it has diodes 7 and 32 for circuit protection from a current inputted at a high potential or a low potential and a pin scan gate 8 for outputting a test signal transmitted via the transmission line 2. Here, "ECL
“Emitter coupled logic” is not a method of saturating a transistor to turn it on, but a method of configuring a logic circuit by using a current switching circuit that performs high-speed switching in a transistor in an unsaturated state. mod
Also called e logic), the "feed termination method" refers to a method in which a terminating resistor is provided in the transmission side integrated circuit section. When performing a test, a test signal is transmitted from the transmission side integrated circuit unit 1 through the transmission line 2 and the pin scan gate 8
It is output through to inspect the H state or the L state.

[0003]

By the way, in the conventional feed termination method of the logic circuit, as shown in FIG. 5, because of the diodes 7 and 32 for protection from the current,
No current flows into the receiving side integrated circuit section 3. Therefore, even if the transmission line 2 between the transmission side integrated circuit unit 1 and the reception side integrated circuit unit 3 has a defective portion due to a large resistance or the like, a current does not flow and a potential drop does not occur. ，
There was a problem that the level of the L state did not change and the defective portion could not be extracted. Therefore, the present invention has been made for the purpose of providing a transmission test method of a sending termination method of a logic circuit, which can detect a transmission abnormality relating to a transmission line with a simple configuration.

[0004]

In order to solve the above technical problems, the present invention, as shown in FIG. 1, has _two high and low potentials in a potential region sandwiched between a high potential V ₁ and a low potential V ₂ . Transmitting side integrated circuit unit 1 for transmitting a signal represented by a level
0, the receiving side integrated circuit unit 30 for receiving the signal,
The transmission line 20 connecting these circuit units and the transmission side integrated circuit unit 10 include a logic unit 50 formed of logic elements.
And a terminating resistor 40 and a pin scan gate 120 for outputting a test signal before transmission through the transmission line 20, and the receiving side integrated circuit section 30 has a logic section 60 formed of logic elements. And a high potential power supply unit 90 having a high potential V _1.
A low potential power supply unit 100 having a low potential V ₂ , a diode 70 for protection from a predetermined current, and a pin scan gate 8 for outputting a test signal transmitted via the transmission line 20.
0, and a switch section 110 for electrically connecting or insulating the transmission line 20 and the low-potential power supply section 100 according to an instruction from the outside.

[0005]

Next, the operation of the present invention will be described. When performing a test on the transmission line 20, a test signal is created by the logic unit 50 of the transmission side integrated circuit unit 10, passes through the terminating resistor 40, and passes through the transmission line 20 to the reception side integrated circuit unit. 30 will be transmitted. At that time, an instruction is given to the switch section 110 so that the transmission line 20 and the low-potential power supply section 100 are electrically connected. Further, the test signal before transmission through the transmission line 20 is output through the pin scan gate 120. The test signal transmitted through the transmission line 20 will be output through the pin scan gate 80. By the way, since the low potential V ₂ is lower than the two high and low levels (H state and L state) output from the transmitting side integrated circuit section 10, a current flows through the transmission line 20. Therefore, by comparing the potential value extracted from the pin scan gate 120 with the potential value extracted from the pin scan gate 80, the resistance value is detected by observing the potential drop due to the resistance of the transmission line 20. You will be able to do it.
On the other hand, when a normal operation is performed instead of a test, the switch section 110 is instructed to be in an insulating state to protect from a current having a potential exceeding the limit. here,
The "transmission side integrated circuit section" and the "reception side integrated circuit section" are generally a part of an integrated circuit, and an integrated circuit having a transmission side integrated circuit section and an integrated circuit having a reception side integrated circuit section are different from each other. In each integrated circuit, a plurality of these transmitting side integrated circuit parts or receiving side integrated circuit parts are mixed, and one transmission line is provided for each pair.

According to a second aspect of the present invention, as the embodiment of the present invention, the switch section is provided between the transmission line 20 and the low-potential power supply section 100 for protection from a current having a potential exceeding the limit. It uses a transistor forming a diode. Further, claim 3 shows, as another embodiment, a case where a switch part is provided by replacing the protective diode with a transistor, and the fourth aspect connects the switch part in parallel with the protective diode. The case is shown.

[0007]

EXAMPLES Next, examples of the present invention will be described.
FIG. 2 shows a transmission test method of the ECL logic circuit according to the present embodiment in the sending termination method. As shown in the figure, the high potential V ₁ =
A transmission side integrated circuit (LSI) unit 1 that transmits a signal represented by two levels, high and low, in a potential region sandwiched between V _CC and low potential V ₂ = V _EE, and a reception side that receives the signal. An integrated circuit (LSI) unit 3 is connected via a transmission line 2, and a logic unit 5 formed by the ECL method, a terminating resistor 4 of, for example, 50Ω, and a transmission line 2 are connected to the transmission side integrated circuit unit 1.
And a pin scan gate 12 for outputting a test signal before transmission via the ECL.
Logic part 6 formed by the method, a high potential power supply part 9 having a high potential V _CC , a low potential power supply part 14 having a low potential V _EE , a diode 7 for protection from an input current, and a transmission line. 2 is a pin scan gate 8 for outputting a test signal transmitted through the transistor 2 and a transistor 11 which is a switch unit for electrically connecting or insulating between the transmission line 2 and the low-potential power supply unit 14 according to an instruction from the outside. And a level adjusting resistor 21. Further, the transistor 11 that is the switch section uses a transistor that is provided between the transmission line 2 and the low-potential power supply section 14 to form a die auto for protection from a current having a potential exceeding the limit. Is. When the diode is formed of a transistor, it is created by short-circuiting the base and the emitter with a resistance value of 0. However, the switch section can be created by setting this resistance value to a finite predetermined value. Also,
In this embodiment, the logical units 5 and 6 are EC
1 shows a circuit having a differential pair adopting the L method, and since the transistor is in an unsaturated operation, its current switching can be performed at high speed.

Next, the operation of this embodiment will be described. In order to conduct a transmission termination method transmission test of an ECL logic circuit, it is created by the logic unit 5 of the transmission side integrated circuit unit 1.
The test signal is sent to the receiving side integrated circuit section 3 through the terminating resistor 4 and the transmission line 2. At that time, the potential level in the H state adjusted by the adjusting resistor 21 is applied (instructed) to the base of the transistor 11, and the low potential power supply unit 14 and the transmission line 2 are made conductive. In that case, test signal H
Since the levels of the state and the L state are higher than the low potential V _EE , a potential gradient appears on the transmission line 2 so that a current flows. Therefore, a value obtained by dropping the potential value of resistance value R × current value I existing in the transmission line 2 is output through the pin scan gate. By detecting this potential value, the resistance value of the transmission line 2 can be measured. In the embodiment described above, since the switch section is configured by using the transistor used for the protection diode, it is cheaper and easier in operation than the case where a new switch section is provided. It is possible to make it, and it is economically and operationally advantageous.

Next, FIG. 3 shows a switch section according to another embodiment. Unlike the switch section 11 shown in FIG. 2, the switch section 16 shown in FIG. 6A has an emitter side connected to a transmission line side. Further, the switch section 17 shown in FIG. 9B is set so as to divide the potential level input to the base of the transistor between the potential levels of V _CC and V _EE . As a result, it becomes possible to apply electric potentials of various magnitudes to the bases of the transistors of the switch section 17 as compared with the above-described embodiment. Further, the switch section 18 shown in FIG. 7C is different from the transistor of the switch section 17 shown in FIG. 7B in that the emitter side is connected to the transmission line.

Next, FIG. 4 shows still another embodiment. In FIG. 4A, the switch unit 17 shown in FIG.
A current-protection diode is inserted between the voltage-dividing resistors shown in FIG. 3B. In FIG. 3B, a current-protection diode is provided between the voltage-dividing resistors of the switch section 18 shown in FIG. It is inserted. In the embodiment shown in FIGS. 3 and 4, a transistor is provided in place of the protection diode, but a switch unit may be connected in parallel with the protection diode. good. Also,
In the above description, the pin scan gates 8 and 1
Reference numeral 2 denotes a comparator, which makes it possible to easily compare with an expected potential value by using an expected potential as the reference potential. Furthermore, in the above description, only the case of ECL has been described, but it goes without saying that the present invention is not limited to this case and can be applied. Furthermore, in the above description, the case where the integrated circuit units are connected by one transmission line has been described. However, in reality, each integrated circuit has a transmission side integrated circuit unit and a reception side integrated circuit unit. A plurality of them are mixed, and one transmission line is provided for each pair.

[0011]

As described above, according to the present invention, the switch section is provided to bring the transmission line and the low-potential power supply section into a conductive state or an insulated state according to an instruction from the outside. Therefore, when conducting a transmission termination type transmission test of a logic circuit, it is possible to detect a transmission abnormality such as a resistance abnormality of the transmission line by causing a current to flow on the transmission line by putting the switch section into a conductive state. become. Therefore, with a simple configuration, it is possible to provide a transmission test method of a logic circuit feed termination method that can detect transmission abnormalities of a transmission line reliably and economically and economically.

[Brief description of drawings]

FIG. 1 is a block diagram of the principle of the invention.

FIG. 2 is a circuit diagram according to an embodiment.

FIG. 3 is a circuit diagram according to another embodiment.

FIG. 4 is a circuit diagram according to another embodiment.

FIG. 5 is a circuit diagram according to a conventional example.

[Explanation of symbols]

 10, 1 Transmission side integrated circuit section 20, 2 Transmission line 30, 3 Reception side integrated circuit section 40, 4 Termination resistor 50, 5, 60, 6 Logic section 70, 7 Diode 80, 8, 120, 12 pin Scan gate 90 , 9 High-potential power supply 100,14 Low-potential power supply

Claims (4)

[Claims] 1. A transmission side integrated circuit section (10) for transmitting a signal expressed by two levels, high and low, in a potential region sandwiched between a high potential V ₁ and a low potential V _2, and reception of the signal. A receiving side integrated circuit section (30), a transmission line (20) connecting these circuit sections, and a transmitting side integrated circuit section (1)
0) includes a logic unit (50) formed by logic elements.
, A terminating resistor (40), and a pin scan gate (12) for outputting a test signal before transmission through the transmission line (20).
0) and the receiving side integrated circuit section (30) includes a logic section (60) formed of logic elements, a high potential power supply section (90) having a high potential V ₁ , and a low potential V ₂ A low-potential power supply section (100), a diode (70) for protection from a predetermined current, and a pin scan gate (80) for outputting a test signal transmitted via the transmission line (20). The test signal transmitted from the transmitting side integrated circuit section (10) to the receiving side integrated circuit section (30) through the transmission line (20) is output from the pin scan gates (80, 120) to perform a transmission test. In the transmission test method of the sending termination method of the logic circuit, a switch unit (110) is provided for electrically connecting or insulating the transmission line (20) and the low potential power supply unit (100) according to an instruction from the outside. Of the transmission termination method of the logic circuit characterized by Test methods. 2. The switch section uses a transistor which is provided between the transmission line (20) and the low potential power supply section (100) and which forms a die auto for protection from a predetermined current. Item 1. A transmission test method of a sending termination method for a logic circuit according to Item 1. 3. The switch section is provided between the transmission line (20) and the low-potential power supply section (100), and a transistor is provided instead of the diode for protection from a predetermined current. Item 1. A transmission test method of a sending termination method for a logic circuit according to Item 1. 4. The switch section is provided between the transmission line (20) and the low-potential power supply section (100) and is connected in parallel with a diode for protection from a predetermined current. Item 1. A transmission test method of a sending termination method for a logic circuit according to Item 1.