JPH0547970B2 - - Google Patents

Info

Publication number
JPH0547970B2
JPH0547970B2 JP58093769A JP9376983A JPH0547970B2 JP H0547970 B2 JPH0547970 B2 JP H0547970B2 JP 58093769 A JP58093769 A JP 58093769A JP 9376983 A JP9376983 A JP 9376983A JP H0547970 B2 JPH0547970 B2 JP H0547970B2
Authority
JP
Japan
Prior art keywords
electrode
roll
susceptor
reaction chamber
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58093769A
Other languages
Japanese (ja)
Other versions
JPS59219927A (en
Inventor
Shinji Nishiura
Yoshuki Uchida
Kazumi Maruyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Corporate Research and Development Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Corporate Research and Development Ltd filed Critical Fuji Electric Corporate Research and Development Ltd
Priority to JP58093769A priority Critical patent/JPS59219927A/en
Publication of JPS59219927A publication Critical patent/JPS59219927A/en
Publication of JPH0547970B2 publication Critical patent/JPH0547970B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium

Description

【発明の詳細な説明】 〔発明の属する技術分野〕 本発明は基板の支持体を兼ねる第一電極とそれ
に対向して配置される第二電極との間に電圧を印
加してグロー放電を発生させ、反応ガスを分解し
て基板上に非晶質半導体あるいは絶縁物などの薄
膜を堆積させるプラズマCVD装置に関する。
[Detailed Description of the Invention] [Technical Field to Which the Invention Pertains] The present invention involves generating a glow discharge by applying a voltage between a first electrode that also serves as a support for a substrate and a second electrode that is placed opposite to the first electrode. This invention relates to a plasma CVD device that decomposes a reactive gas to deposit a thin film of an amorphous semiconductor or insulator on a substrate.

〔従来技術とその問題点〕[Prior art and its problems]

非晶質半導体、特に非晶質シリコンを用いる非
晶質半導体太陽電池は、光を直接電気エネルギー
に変換する太陽電池の低コスト化の有力な候補者
として研究開発が進められている。非晶質シリコ
ン(以下a−Si)太陽電池は、金属等の導電性基
板又は上面に透明導電膜を備えたガラス等の透明
絶縁基板上に、例えばp型a−Si層、ノンドープ
a−Si層、n型a−Si層をそれぞれ数百Å、数
μm、数百Å形成することにより、pin接合を有す
るa−Si層を光起電力層として形成したものであ
る。これらの各層において、p型層、n型層に光
透過性のよいa−SiC層、又は伝導性の高い微結
晶化a−Si層を用いて効率を向上させる技術につ
ていも周知である。
Amorphous semiconductor solar cells using amorphous semiconductors, particularly amorphous silicon, are being researched and developed as a promising candidate for reducing the cost of solar cells that directly convert light into electrical energy. Amorphous silicon (hereinafter referred to as a-Si) solar cells are made of a p-type a-Si layer, a non-doped a-Si layer, etc. The a-Si layer having a pin junction is formed as a photovoltaic layer by forming an n-type a-Si layer of several hundred Å, several μm, and several hundred Å, respectively. In each of these layers, there is also a well-known technology to improve efficiency by using a highly transparent a-SiC layer or a highly conductive microcrystalline a-Si layer as the p-type layer and n-type layer. .

このa−Si層を形成する装置として第1図に示
す容量結合型グロー放電装置が知られている。容
量結合型グロー放電装置は、大面積太陽電池の製
造に適している。ベルジヤ1の内部に、ヒータ2
を備えた電極3がとりつけられておりその下面に
対向して電極4が配置されている。a−Si層が形
成される基板5は、上部電極3にとりつけられて
おり、ヒータ2によつて200〜300℃の温度に保た
れる。ベルジヤ1の内部空間はガス導入管6を介
してガス供給ラインに、排気管7を介して排気系
に接続されている。例えばp型a−Si層を形成す
る場合、シランガスとジボランガスを適当な分量
混合し、管6を通じてベルジヤに導入し、排気系
とつりあわせて1〜10Torrに保持する。外部か
ら高周波電源8を用いて、両対向電極3,4間に
高周波電力を印加し、内部のガスを分解して、p
型a−Si層を基板5の上に堆積する。ノンドープ
層、n型a−Si層の形成においても同様な形で適
当な組成のガスをグロー放電分解して堆積する。
A capacitively coupled glow discharge device shown in FIG. 1 is known as a device for forming this a-Si layer. Capacitively coupled glow discharge devices are suitable for manufacturing large area solar cells. Heater 2 is installed inside bell gear 1.
An electrode 3 is attached to the electrode 3, and an electrode 4 is arranged opposite to the lower surface of the electrode 3. The substrate 5 on which the a-Si layer is formed is attached to the upper electrode 3, and is maintained at a temperature of 200 to 300°C by the heater 2. The internal space of the bell gear 1 is connected to a gas supply line via a gas inlet pipe 6 and to an exhaust system via an exhaust pipe 7. For example, when forming a p-type a-Si layer, appropriate amounts of silane gas and diborane gas are mixed, introduced into the bell gear through pipe 6, and maintained at 1 to 10 Torr in balance with the exhaust system. Using a high frequency power source 8 from the outside, high frequency power is applied between both opposing electrodes 3 and 4 to decompose the internal gas and p
A type a-Si layer is deposited on the substrate 5. In the formation of a non-doped layer and an n-type a-Si layer, a gas of an appropriate composition is decomposed by glow discharge and deposited in a similar manner.

第2図a,bに上部電極の拡大図を示す。aは
基板5を保持した上部電極3を下から見た図であ
る。電極3は支持爪9によりaおよび断面図bに
示すように、ヒータ2を内蔵した支持体10にと
りつけられており、電極3は支持体10にはめこ
まれて、支持爪9によつて支えられるようになつ
ている。基板5は電極3につくられた穴にはめこ
まれており、基板5と電極3の電気的接触、熱的
接触を向上させるために、基板の上側から金属製
の板でおさえられ、固定されている。基板の表面
は電極4に対向し、又電極4に対して露出してい
る。電極3と電極4の間に高周波電圧を印加して
グロー放電を発生させると、電極3、基板5さら
に対向電極4をはじめとして器壁等にa−Siが付
着する。このa−Siが基板以外の部分に付着する
と、膜生成を重ねるにつれて、この部分からの膜
はがれが生じ、グロー放電装置内がよごれ、a−
Si膜にピンホールができたり、またa−Si膜の膜
質が低下して太陽電池の効率が低下した。電極3
は一回の成長工程終了毎にとり出し清浄化等の処
置をとるので問題ないが、電極4、支持体10、
支持爪9あるいは器壁等は頻繁に付着a−Siを除
去し、また清浄化の作業をする必要がある。その
際、膜成長作業を中断するのみならず、炉の温度
を低くするために時間を要したり、ふきとり作
業、空気ばく露等炉自体にとつて好ましくない条
件におかれ、さらに清浄作業後も空焼き等の処置
をとる必要があり、装置の安定性、稼働率という
点でも問題が多かつた。
Figures 2a and 2b show enlarged views of the upper electrode. 1A is a view of the upper electrode 3 holding the substrate 5 viewed from below. As shown in a and cross-sectional view b, the electrode 3 is attached to a support 10 with a built-in heater 2 by a support claw 9, and the electrode 3 is fitted into the support 10 and supported by the support claw 9. It is becoming more and more popular. The substrate 5 is fitted into a hole made in the electrode 3, and in order to improve electrical contact and thermal contact between the substrate 5 and the electrode 3, a metal plate is held down and fixed from the top of the substrate. ing. The surface of the substrate faces the electrode 4 and is exposed to the electrode 4. When a high frequency voltage is applied between the electrodes 3 and 4 to generate a glow discharge, a-Si adheres to the electrode 3, the substrate 5, the counter electrode 4, and the vessel wall. If this a-Si adheres to parts other than the substrate, the film will peel off from this part as the film continues to be formed, and the inside of the glow discharge device will become dirty.
Pinholes were formed in the Si film, and the quality of the a-Si film deteriorated, resulting in a decrease in the efficiency of the solar cell. Electrode 3
There is no problem because the electrodes 4, the support 10,
It is necessary to frequently remove adhering a-Si from the supporting claws 9 or the vessel wall, and to perform cleaning work. In this case, not only the film growth operation is interrupted, but also it takes time to lower the temperature of the furnace, the furnace itself is subjected to unfavorable conditions such as wiping work, air exposure, etc. However, it was necessary to take measures such as dry firing, which caused many problems in terms of equipment stability and operation rate.

第3図に他の装置の例を示す。この装置は、p
型、ノンドープ、n型a−Si層を異つた反応室で
形成し、各層の成長時において他の層を形成した
時の影響を抑えて、膜の制御性を向上させようと
いうものである。三つの反応室11,12,13
の前後に、基板をサセプタ3に装着するための前
室11と、pin層を形成した基板を取り出すため
の後室15があり、各室11〜15はバルブ16
を介して排気系に接続されている。サセプタ3は
第4図に拡大して示したように穴31を有し、そ
の中に基板5が落し込まれている。この穴31は
下から見ると第2図aに示すように配置されてい
る。基板5を装着したサセプタ3を前室14に図
示しない仕切り弁を開いて入れる。サセプタ3の
搬入は並んでいる車輪17の上を動かすことによ
つて行なわれる。サセプタ3が前室14の所定の
位置へ達すると仕切り弁を閉じ、バルブ16を介
して室14を排気する。ついでサセプタ3を前室
14内で基板の温度が200〜300℃になるように加
熱する。温度が200〜300℃で安定した後、前室1
4と反応室11の間の仕切り弁(図示せず)を開
き、サセプタ3を車輪17の駆動に伴なつて室1
1内に搬入する。所定の位置に来ると室14,1
1の間の仕切り弁を閉じ、反応室11内にシラン
とジボランの混合ガスを導入し、1〜10Torrの
状態でサセプタ3と対向電極4との間に加えられ
た高周波電界によりグロー放電分解を行ない、p
型a−Si層をサセプタ3に装着された基板5の上
に堆積させる。所定の膜厚の堆積が終了すると反
応室11を排気し、反応室11,12間の仕切り
弁を開けてサセプタ3を反応室12へ移動する。
以降は同様にして各a−Si層が堆積される。室1
3でn層a−Siが形成されると、サセプタ3は反
応室13と後室15の間の仕切り弁を通じて室1
5に入れる。ここでサセプタ3を一定温度、例え
ば100℃以下に冷却した後、室15にN2ガスを導
入して常圧とし、仕切り弁を開いてサセプタ3を
取り出す。
FIG. 3 shows an example of another device. This device has p
The purpose is to improve controllability of the film by forming type, non-doped, and n-type a-Si layers in different reaction chambers, suppressing the influence of forming other layers during the growth of each layer. Three reaction chambers 11, 12, 13
There are a front chamber 11 for mounting the substrate on the susceptor 3 and a rear chamber 15 for taking out the substrate on which the pin layer has been formed, and each chamber 11 to 15 has a valve 16.
Connected to the exhaust system via. The susceptor 3 has a hole 31, as shown enlarged in FIG. 4, into which the substrate 5 is dropped. The holes 31 are arranged as shown in FIG. 2a when viewed from below. The susceptor 3 with the substrate 5 mounted thereon is placed into the front chamber 14 by opening a gate valve (not shown). The susceptor 3 is carried in by moving it on the wheels 17 that are lined up. When the susceptor 3 reaches a predetermined position in the front chamber 14, the gate valve is closed and the chamber 14 is evacuated via the valve 16. Next, the susceptor 3 is heated in the front chamber 14 so that the temperature of the substrate is 200 to 300°C. After the temperature stabilizes at 200-300℃, the front chamber 1
4 and the reaction chamber 11 is opened, and the susceptor 3 is moved into the chamber 1 as the wheel 17 is driven.
1. When it comes to the designated position, chamber 14,1
1 is closed, a mixed gas of silane and diborane is introduced into the reaction chamber 11, and glow discharge decomposition is caused by a high-frequency electric field applied between the susceptor 3 and the counter electrode 4 at 1 to 10 Torr. conduct, p
A type a-Si layer is deposited on a substrate 5 mounted on a susceptor 3. When the deposition of a predetermined film thickness is completed, the reaction chamber 11 is evacuated, the gate valve between the reaction chambers 11 and 12 is opened, and the susceptor 3 is moved to the reaction chamber 12.
Thereafter, each a-Si layer is deposited in the same manner. Room 1
When the n-layer a-Si is formed in step 3, the susceptor 3 is connected to the chamber 1 through the gate valve between the reaction chamber 13 and the rear chamber 15.
Put it in 5. After the susceptor 3 is cooled to a certain temperature, for example, 100° C. or lower, N 2 gas is introduced into the chamber 15 to bring it to normal pressure, the gate valve is opened, and the susceptor 3 is taken out.

反応室11〜13においては、3次元的にみる
とサセプタ3と対向電極4の間の距離が最も近
く、40〜100mmである。他の距離、例えばサセプ
タ3と反応室の壁、車輪17と室壁、車輪17と
対向電極4との間の距離はサセプタ3と対向電極
4の距離に比較して大きな距離、例えば1.5倍の
距離を有している。このためサセプタ3と対向電
極4との間に高周波電界を加えて放電させても電
界はこの両極間に集中し、分解したa−Siの大部
分がサセプタ3に装着された基板5の上に付着す
る。サセプタ3は基板5と共にとり出されるの
で、その際洗浄等の処理を行うことができるが、
反応室内の対向電極4はa−Siが多く堆積するこ
とになり、量が多くなるとはがれてグロー放電時
に飛散し、基板上にとりこまれたりしてピンホー
ル形成または膜質低下の原因となる。従つてこれ
まで対向電極への堆積量がある量を越えると洗浄
のために膜生成作業を中断してa−Siの除去を行
い、次いでCF4等のガスを導入し、プラズマエツ
チング等の手段により、反応室内の清浄化を行つ
ていた。しかし当初からプラズマエツチングする
試みは長時間を必要とすると共に、除去された部
分にばらつきが生じ、効率的な清浄作業を行うこ
とができなかつた。また反応室を開くと反応室の
内壁が外気等で汚染される等の問題があり、また
作業が長く中断されるので稼働率の点からも問題
があつた。
In the reaction chambers 11 to 13, the distance between the susceptor 3 and the counter electrode 4 is the shortest when viewed three-dimensionally, and is 40 to 100 mm. Other distances, such as the distance between the susceptor 3 and the wall of the reaction chamber, the distance between the wheel 17 and the chamber wall, and the distance between the wheel 17 and the counter electrode 4, are larger than the distance between the susceptor 3 and the counter electrode 4, for example, 1.5 times. It has distance. Therefore, even if a high-frequency electric field is applied between the susceptor 3 and the counter electrode 4 to cause a discharge, the electric field is concentrated between these two poles, and most of the decomposed a-Si is deposited on the substrate 5 attached to the susceptor 3. adhere to. Since the susceptor 3 is taken out together with the substrate 5, processing such as cleaning can be performed at that time.
A large amount of a-Si will be deposited on the counter electrode 4 in the reaction chamber, and if the amount is large, it will peel off, scatter during glow discharge, and be trapped on the substrate, causing pinhole formation or film quality deterioration. Therefore, until now, when the amount of deposition on the counter electrode exceeds a certain amount, the film formation operation is interrupted for cleaning to remove the a-Si, and then a gas such as CF 4 is introduced, and a method such as plasma etching is performed. The inside of the reaction chamber was cleaned by However, initial attempts to perform plasma etching required a long time, and the removed portions varied, making it impossible to perform an efficient cleaning operation. Furthermore, when the reaction chamber was opened, there were problems such as the inner walls of the reaction chamber being contaminated with outside air, etc., and there were also problems in terms of operating efficiency because the work was interrupted for a long time.

〔発明の目的〕[Purpose of the invention]

本発明は、反応室内の対向電極上に付着した反
応生成物を、反応室を開くことなく、しかも短い
時間で除去することのできるプラズマCVD装置
を提供することを目的とする。
SUMMARY OF THE INVENTION An object of the present invention is to provide a plasma CVD apparatus that can remove reaction products deposited on a counter electrode in a reaction chamber in a short time without opening the reaction chamber.

〔発明の要点〕[Key points of the invention]

反応室内において、基板の支持体を兼ねる第一
電極とそれに対向して配置される第二電極との間
に電圧を印加してグロー放電を発生させて反応ガ
スを分解し、第一電極に支持される基板に薄膜を
堆積させる装置において、第一電極及び第二電極
と電気的に絶縁状態となる薄帯と、薄帯の送り出
しロール及び巻取りロールとを反応室に内蔵し、
薄帯が第二電極の第一電極側の第二電極近傍を通
つて第二電極を第一電極より遮蔽するように送り
出しロールと巻取りロールとを第二電極の一方端
とこれに対向する他方端の両側方向にそれぞれ配
置することによつて上記の目的を達成する。
In the reaction chamber, a voltage is applied between a first electrode that also serves as a support for the substrate and a second electrode placed opposite to it to generate a glow discharge to decompose the reactant gas, which is then supported by the first electrode. In an apparatus for depositing a thin film on a substrate, a reaction chamber includes a thin ribbon that is electrically insulated from the first electrode and the second electrode, and a feeding roll and a take-up roll for the ribbon;
A delivery roll and a take-up roll are arranged at one end of the second electrode and opposite to this so that the ribbon passes near the second electrode on the first electrode side of the second electrode and shields the second electrode from the first electrode. The above object is achieved by arranging them on both sides of the other end.

〔発明の実施例〕[Embodiments of the invention]

第5図に本発明の第一の実施例を示す。サセプ
タを兼ねる第一電極3と対向電極4の間を通つ
て、ロール21に巻かれている。例えばフツ素樹
脂、ポリイミド、ポリアミドイミド、ポリビスマ
レインイミド等の高分子フイルムからなる薄帯2
0がロール22に巻きとられるように構成したも
のである。この両ロール間の張力により高分子薄
帯20の平面が形成される。電極3と電極4の距
離が40〜100mmのとき薄帯20と対向電極4との
距離を30mm以内とした。第5図は第4図のような
装置においては紙面と垂直の方向における断面図
である。従つて、サセプタ3は第5図の紙面に垂
直方向に移動する。ロール21,22は、金属又
は絶縁体のいずれに構成してもよく対向電極8と
同電位になるようにした。反応室内で1〜
10Torrのガス雰囲気で高周波電源8を用いて電
圧印加を行い、グロー放電分解した。a−Siはサ
セプタとサセプタに搭載された基板さらに対向電
極4及び絶縁帯20上に形成された。対向電極4
と薄帯20の距離が小さいので対向電極4の面上
に堆積された量は、薄帯20の上に堆積された量
に比較すると少ない量であつた。対向電極4上に
堆積される量を減らすために絶縁帯20をできる
だけ電極4に近付ける必要がある。薄帯20上に
堆積したa−Siが所定の膜厚を越えた時ロール2
2を巻いて新鮮な表面の絶縁帯を供給した。この
巻きとりによつて堆積したa−Siは一緒にロール
22内に巻き込まれる。薄帯20のロール長さ方
向の幅は電極4の幅より大きいことが望ましく、
5cm以上大きくすることにより対向電極4に付着
するa−Siの量を減少させることができた。ロー
ル22による巻き取りの後、CF4等のガスを用い
て反応室のプラズマエツチングを行うことによ
り、反応室を外気にさらすことなくクリーニング
を行うことができた。
FIG. 5 shows a first embodiment of the present invention. It is wound around a roll 21 passing between a first electrode 3 which also serves as a susceptor and a counter electrode 4. For example, a thin strip 2 made of a polymer film such as fluororesin, polyimide, polyamideimide, polybismaleimide, etc.
0 is wound onto a roll 22. A flat surface of the polymer ribbon 20 is formed by the tension between the two rolls. When the distance between the electrode 3 and the electrode 4 was 40 to 100 mm, the distance between the ribbon 20 and the counter electrode 4 was set to within 30 mm. FIG. 5 is a sectional view of the apparatus shown in FIG. 4 in a direction perpendicular to the plane of the paper. Therefore, the susceptor 3 moves in a direction perpendicular to the paper plane of FIG. The rolls 21 and 22 may be made of metal or an insulator and have the same potential as the counter electrode 8. 1~ in the reaction chamber
A voltage was applied using a high frequency power source 8 in a gas atmosphere of 10 Torr to perform glow discharge decomposition. The a-Si was formed on the susceptor, the substrate mounted on the susceptor, the counter electrode 4, and the insulating band 20. Counter electrode 4
Since the distance between the ribbon 20 and the ribbon 20 was small, the amount deposited on the surface of the counter electrode 4 was small compared to the amount deposited on the ribbon 20. In order to reduce the amount deposited on the counter electrode 4, it is necessary to place the insulating band 20 as close to the electrode 4 as possible. When the a-Si deposited on the ribbon 20 exceeds a predetermined thickness, the roll 2
2 to provide a fresh surface insulation strip. The a-Si deposited by this winding is rolled into the roll 22 together. It is desirable that the width of the ribbon 20 in the roll length direction is larger than the width of the electrode 4;
By increasing the size by 5 cm or more, the amount of a-Si adhering to the counter electrode 4 could be reduced. After winding up with the roll 22, the reaction chamber was plasma etched using a gas such as CF 4 , thereby making it possible to clean the reaction chamber without exposing it to the outside air.

第6図は第二の実施例で、ロール21,22を
サセプタ3に対して対向電極4の反対側に配置し
たものである。これは方向変換ロール23,24
を用いて図のように構成される。この構成によつ
て清浄な帯20が巻いてあるロール21に付着す
るa−Siを低減することができる。そして、ロー
ル22による巻きとりの際にa−Si付着の少ない
絶縁帯20をロール21より送り出すことができ
た。
FIG. 6 shows a second embodiment in which rolls 21 and 22 are arranged on the opposite side of the counter electrode 4 with respect to the susceptor 3. This is the direction change roll 23, 24
It is configured as shown in the figure. With this configuration, it is possible to reduce a-Si adhering to the roll 21 around which the clean band 20 is wound. Then, during winding by the roll 22, the insulating band 20 with less a-Si adhesion could be sent out from the roll 21.

第7図は第三の実施例で、反応室18内にサセ
プタ3と対向電極4を図のように構成し、絶縁帯
20の巻きとりロール22を排気系につながる排
気口7内に設置したものである。このため巻きと
りのためa−Si膜が少々とびちつても反応室18
内を汚染することがなくなつた。
FIG. 7 shows a third embodiment, in which a susceptor 3 and a counter electrode 4 are configured in a reaction chamber 18 as shown in the figure, and a take-up roll 22 of an insulating band 20 is installed in an exhaust port 7 connected to an exhaust system. It is something. Therefore, even if the a-Si film is slightly blown away due to winding, the reaction chamber 18
No more contamination inside.

第8図は第四の実施例で、第三の実施例では二
つの方向変換ロール24,25を通る毎に多少a
−Siがはがれるので方向変換ロールを減らし、さ
らにロール24と巻きとりロール22を共に、排
気口7内に設置したものである。また、新しい絶
縁帯を巻いてあるロール21についても引き出し
穴27を除き全体をカバー26でおおい、カバー
26をロール21と共に電極4と同電位に保持し
た。このため新しく引き出される絶縁帯20にa
−Siが付着しているということがなくなつた。
FIG. 8 shows a fourth embodiment, and in the third embodiment, a certain amount of a
-Since the Si is peeled off, the number of direction changing rolls is reduced, and both the roll 24 and the take-up roll 22 are installed inside the exhaust port 7. Further, the roll 21 wrapped with a new insulating band was covered entirely with a cover 26 except for the pull-out hole 27, and the cover 26 and the roll 21 were held at the same potential as the electrode 4. Therefore, a
-Si is no longer attached.

以上いずれの場合も、サセプタ3と対向電極4
の距離を最低とし、対向電極4と同電位である各
ロール等はサセプタ又は室壁から十分距離を離し
て(サセプタ3と対向電極4の間の1.5倍以上)
構成された。
In any of the above cases, the susceptor 3 and the counter electrode 4
The distance between the rolls and the like that are at the same potential as the counter electrode 4 should be kept at a sufficient distance from the susceptor or the chamber wall (at least 1.5 times the distance between the susceptor 3 and the counter electrode 4).
Configured.

第9図は第五の実施例で、サセプタ3を搬送す
る車輪17が存在する場合のサセプタ3と対向電
極4、さらにロール等の関係を示し、車輪17と
対向電極4、ロール23,24等との距離を、す
べてサセプタ3と対向電極4との間の距離の1.5
倍以上とした。
FIG. 9 shows a fifth embodiment, and shows the relationship between the susceptor 3, the counter electrode 4, rolls, etc. when there is a wheel 17 for transporting the susceptor 3. All distances are 1.5 of the distance between the susceptor 3 and the counter electrode 4.
It was more than doubled.

第10図は方向変換ロール28,29を対向電
極4に固定して形成したものである。この場合も
絶縁帯20が対向電極4に密着しないようにロー
ル28,29の位置を構成することが望ましい。
In FIG. 10, direction changing rolls 28 and 29 are fixed to the opposing electrode 4. In this case as well, it is desirable to configure the positions of the rolls 28 and 29 so that the insulating band 20 does not come into close contact with the counter electrode 4.

以上の実施例では薄帯20に高分子フイルムを
用いているが、高分子フイルムの代りに導体箔を
用いても同じ効果を得た。ただしこの場合、導体
箔およびそれを支持するロールなどの導体部分
は、第一電極および対向電極から絶縁状態にして
おくことが必要であつた。
In the above embodiments, a polymer film is used for the ribbon 20, but the same effect could be obtained even if a conductor foil was used instead of the polymer film. However, in this case, it was necessary to keep the conductor parts such as the conductor foil and the roll supporting it insulated from the first electrode and the counter electrode.

〔発明の効果〕〔Effect of the invention〕

本発明はプラズマCVD装置のグロー放電発生
のための二つの電極のうち、基板を支持しない対
向電極の表面を、その電極に絶縁されてその電極
の近傍を通る薄帯により覆い、その薄帯は送り出
しロールから出て巻き取りロールに巻き取られる
ようにしたものである。これによりa−Siのよう
な反応生成物を対向電極でなく薄帯上に付着さ
せ、薄帯を巻き取ることにより反応生成物を反応
室を開くことなく迅速に除去することができ、反
応室内を外気にさらすことなくクリーニングする
ことが可能となつた。この結果、特に太陽電池に
用いるa−Si膜の形成を安定して行うことがで
き、太陽電池の特性、製造歩留りの向上、あるい
はプラズマCVD装置の稼働率の向上が達成され
るので、本発明の効果は極めて大である。
The present invention covers the surface of the opposing electrode, which does not support the substrate, among the two electrodes for generating glow discharge in a plasma CVD apparatus, with a thin strip that is insulated from the electrode and passes near the electrode. It comes out from a delivery roll and is wound up on a take-up roll. This allows reaction products such as a-Si to adhere to the ribbon rather than the counter electrode, and by winding up the ribbon, the reaction products can be quickly removed without opening the reaction chamber. It is now possible to clean the product without exposing it to the outside air. As a result, it is possible to stably form an a-Si film used particularly in solar cells, and the characteristics of solar cells, the manufacturing yield, and the operating rate of plasma CVD equipment are improved, so the present invention The effect is extremely large.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のプラズマCVD装置の断面図、
第2図a,bはサセプタおよびヒータ部を示し、
aは平面図、bは断面図、第3図は別の従来のプ
ラズマCVD装置の断面図、第4図はその要部拡
大図、第5図は本発明の一実施例の断面図、第6
図ないし第10図はそれぞれ異なる実施例の断面
図である。 3……サセプタ、4……対向電極、18……反
応室、20……薄帯、21……送り出しロール、
22……巻き取りロール。
Figure 1 is a cross-sectional view of a conventional plasma CVD device.
Figures 2a and b show the susceptor and heater part,
3 is a sectional view of another conventional plasma CVD apparatus, FIG. 4 is an enlarged view of its essential parts, and FIG. 5 is a sectional view of an embodiment of the present invention. 6
Figures 1 through 10 are cross-sectional views of different embodiments. 3... Susceptor, 4... Counter electrode, 18... Reaction chamber, 20... Thin strip, 21... Delivery roll,
22... Winding roll.

Claims (1)

【特許請求の範囲】[Claims] 1 反応室内において、基板の支持体を兼ねる第
一電極とそれに対向して配置される第二電極との
間に電圧を印加してグロー放電を発生させて反応
ガスを分解し、該第一電極に支持される基板に薄
膜を堆積させる装置において、前方第一電極及び
第二電極と電気的に絶縁状態となる薄帯と、該薄
帯の送り出しロール及び巻取りロールとを前記反
応室に内蔵し、該薄帯が前記第二電極の第一電極
側の第二電極近傍を通つて該第二電極を第一電極
より遮蔽するように送り出しロールと巻取りロー
ルとを前記第二電極の一方端とこれに対向する他
方端の両側方向にそれぞれ配置することを特徴と
するプラズマCVD装置。
1 In the reaction chamber, a voltage is applied between a first electrode that also serves as a support for the substrate and a second electrode placed opposite thereto to generate glow discharge and decompose the reaction gas, and the first electrode In the apparatus for depositing a thin film on a substrate supported by the reaction chamber, a thin strip electrically insulated from the first front electrode and the second electrode, and a delivery roll and a take-up roll for the thin strip are built into the reaction chamber. The feed roll and the take-up roll are connected to one side of the second electrode so that the ribbon passes near the second electrode on the first electrode side of the second electrode and shields the second electrode from the first electrode. A plasma CVD apparatus characterized in that the plasma CVD apparatus is arranged on both sides of one end and the other end opposite thereto.
JP58093769A 1983-05-27 1983-05-27 Plasma cvd device Granted JPS59219927A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58093769A JPS59219927A (en) 1983-05-27 1983-05-27 Plasma cvd device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58093769A JPS59219927A (en) 1983-05-27 1983-05-27 Plasma cvd device

Publications (2)

Publication Number Publication Date
JPS59219927A JPS59219927A (en) 1984-12-11
JPH0547970B2 true JPH0547970B2 (en) 1993-07-20

Family

ID=14091630

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58093769A Granted JPS59219927A (en) 1983-05-27 1983-05-27 Plasma cvd device

Country Status (1)

Country Link
JP (1) JPS59219927A (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63246814A (en) * 1987-04-02 1988-10-13 Matsushita Electric Ind Co Ltd Thin film formation apparatus
WO2004087991A1 (en) * 2003-03-31 2004-10-14 Konica Minolta Holdings, Inc. Thin film forming apparatus and method for forming thin film
JP4817313B2 (en) * 2006-09-01 2011-11-16 株式会社アルバック Winding type plasma CVD equipment
DK2590802T3 (en) * 2010-07-09 2014-10-06 Vito Nv Process and apparatus for atmospheric pressure plasma treatment

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5678416A (en) * 1979-11-29 1981-06-27 Sumitomo Electric Ind Ltd Preparation of thin film
JPS5681923A (en) * 1979-12-06 1981-07-04 Sumitomo Electric Ind Ltd Manufacture of thin film

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5678416A (en) * 1979-11-29 1981-06-27 Sumitomo Electric Ind Ltd Preparation of thin film
JPS5681923A (en) * 1979-12-06 1981-07-04 Sumitomo Electric Ind Ltd Manufacture of thin film

Also Published As

Publication number Publication date
JPS59219927A (en) 1984-12-11

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