JPH0541347U - Limiter circuit of current tracking type inverter - Google Patents

Abstract

(57) [Summary] [Purpose] If the input signal for the current command value exceeds the specified level even for one phase, the current command values for the three phases are simultaneously changed within the specified level at the same ratio. [Structure] Variable gain amplifiers 1 _R to 1 _T that output the input signals as the current command values of the respective phases of the three-phase current tracking type inverter are provided as current command values, while the absolute value calculation circuit 2 _R is provided.
The absolute value signal of the input signal is generated by ˜2 _T, the instantaneous value of the absolute value signal is peak-held by the peak hold circuit 3, and when the peak hold value exceeds the predetermined level by the gain setter 4, the variable gain amplifier 1 The gains of _R to 1 _T are simultaneously reduced to control the current command value of each phase within a predetermined level range.

Description

[Detailed description of the device]

[0001]

[Industrial applications]

 The present invention relates to a limiter circuit of a current tracking type inverter used in a harmonic suppression device or the like.

[0002]

[Prior Art]

 In the current follow-up type inverter as shown in FIG. 4 used in the harmonic suppression device, the inverter output signal is used as the current command value, and when the current command value becomes excessive, a large current flows through the switch element T of the inverter 11. The withstand capability of the device may be exceeded. Therefore, the inverter output signal is passed through the limiter circuit L. The limiter circuit L has the characteristics shown in FIG. 5 (a), and as shown in FIG. 5 (b), the peak exceeding the limiter level of the input waveform is cut and its output is used as the current command value.

Reference numeral 12 in FIG. 4 indicates an inverter control circuit to which the deviation between the current command value and the inverter output current is input, ACL indicates an AC reactor connected between the AC power source and the inverter, and C T detects the output current of the inverter. Current transformer, C indicates a DC capacitor connected to the DC side of the inverter.

[0004]

[Problems to be solved by the device]

 When the current command signal is passed through the limiter circuit, the instantaneous values of the three-phase current command values are different for each phase, so when the signal of one phase is applied to the limiter, the sum of the three-phase signals becomes zero. It will not happen.

On the other hand, in a three-phase inverter having a six-arm configuration, the total sum of the output currents of the three phases must be zero. For this reason, the output current of the inverter differs from the current command value, and a current that exceeds the limiter level of the command value may flow.

The present invention has been made in view of the above-mentioned conventional problems, and an object of the present invention is to obtain a three-phase current when the input signal serving as the current command value exceeds a predetermined level even if the input signal is one phase. It is an object of the present invention to provide a limiter circuit for a current tracking type inverter that simultaneously changes the command value within a predetermined level at the same ratio so that the output current of the current command value can be obtained from the inverter.

[0007]

[Means for Solving the Problems]

 In order to achieve the above object, a limiter circuit of a current tracking type inverter according to the present invention includes a variable gain amplifier that outputs an input signal as a current command value for each phase current command value of a three-phase current tracking type inverter, and a variable gain amplifier. Each absolute value calculation circuit that outputs the input signal that becomes the phase current command value as an absolute value signal, a peak hold circuit that peak-holds the instantaneous value of each absolute value signal, and this peak-hold output has a predetermined level. When exceeding, the gain of each of the variable gain amplifiers is simultaneously lowered to control each phase current command value within a predetermined level range.

[0008]

[Action]

 Each absolute value calculation circuit changes each phase current command value signal of the three-phase current tracking type inverter into an absolute value signal (full-wave rectified wave), and the peak hold circuit changes the large instantaneous value of this absolute value signal. Hold the peak.

When the peak hold output exceeds a predetermined level, the gain setter simultaneously lowers the gains of the variable gain amplifiers to which the signals of the respective phase current command values are input and outputs the respective phase current command values of the variable gain amplifiers. Is controlled within a predetermined level range.

Therefore, even if the signal as the current command value becomes excessive, the current flowing through the switch element of the inverter does not exceed the withstand capacity of the element. Further, even if the current command value for one phase becomes excessive, the gains of the variable amplifiers are simultaneously reduced and the total sum of the current command values for the three phases is always zero, so an output current corresponding to the command value can be obtained.

[0011]

Embodiments of the present invention will be described with reference to the drawings.

FIG. 1 shows a limiter circuit for controlling a current command of a current tracking type inverter. In FIG. 1, 1 _R to 1 _T are variable gain amplifiers for amplifying input signals (inverter output signals) that are current command values and outputting current command values, and 2 _R to 2 _T are absolute value signals for the input signals. The absolute value calculation circuit 3 including a full-wave rectification circuit is a peak hold for peak-holding the largest instantaneous value of the absolute value signal input from each absolute value calculation circuit via the interference prevention diode D. circuit.

Reference numeral 4 denotes a gain setting circuit that simultaneously changes the gain G of the variable gain amplifiers 1 _R to 1 _{T when} the peak hold value S of the peak hold circuit exceeds a predetermined value. As shown in FIG. When S is equal to or lower than the constant level S _1, the gain G of the variable gain amplifiers 1 _R to 1 _T is set to 1 and output as the current command value without changing the input signal.

When an excessive input signal is given, the peak hold output S becomes larger than S _{1, and} a gain G of 1 or less preset in the gain setter 4 is selected according to the magnitude. Then, the amplification factors of the variable gain amplifiers 1 _R to 1 _T are changed to 1 or less.

The operation of the circuit of the above embodiment will be described with reference to the waveform chart of FIG.

Now, assuming that the input signal changes as shown in (a), the output of the absolute value calculation circuit 2 becomes a full-wave rectified waveform as shown in (b), and the peak hold circuit 3 shows as shown in (c). Absolute value signals for 3 phases are input. The peak hold circuit 3 outputs the peak hold output S as shown in (c) with high response to the increase of the peak of the input signal.

When the peak hold output S exceeds a predetermined level S ₁ (FIG. 2), a gain G of 1 or less is output with high response, so that when the input signal of the variable gain amplifiers 1 _R to 1 _T exceeds a predetermined level. The current command value is controlled so as not to exceed the predetermined level without delay.

On the other hand, the peak hold circuit 3 gradually lowers its output as the input signal decreases, so that the gain is gradually changed as the input signal decreases, and switching of unnecessary gains is prevented. ..

[0019]

[Effect of the device]

 Since the present invention is configured as described above, it has the following effects.

(1) When the instantaneous value of the signal that becomes the current command value for each phase becomes larger than the predetermined level even for one phase, the gains of the variable gain amplifiers are simultaneously changed in the same ratio, so that they are added to the inverter. The sum of the three phases of the current command value is zero, and the output current is obtained according to the current command value.

(2) The peak hold circuit allows the gain to be narrowed by following a large signal at high speed.

(3) Even in an inverter device that requires a high-speed response such as a harmonic suppressor, it is possible to operate within the device capacity with respect to an excessive input.

[Brief description of drawings]

FIG. 1 is a block circuit diagram showing a limiter circuit according to an embodiment.

FIG. 2 is a characteristic diagram of a gain setting device in the embodiment.

FIG. 3 is a signal waveform diagram of each part in the embodiment.

FIG. 4 is a structural explanatory view showing a conventional current tracking type inverter circuit.

5A is a characteristic diagram of a conventional limiter circuit, and FIG. 5B is a waveform diagram for explaining input / output of the circuit.

[Explanation of symbols]

1 _R to 1 _T ... Variable gain amplifier, 2, 2 _R to 2 _T ... Absolute value calculation circuit, 3 ... Peak hold circuit, 4 ... Gain setter,
11 ... Inverter, 12 ... Inverter control circuit, ACL
... AC reactor, CT ... Current transformer, L ... Limiter, T ...
Switch element.

Claims (1)

[Scope of utility model registration request] 1. A variable gain amplifier that outputs an input signal that becomes a current command value for each phase of a three-phase current follow-up type inverter, and an input signal that becomes a current command value for each phase as an absolute value signal. Each absolute value calculation circuit, a peak hold circuit that peak-holds the instantaneous value of each absolute value signal, and when the peak hold output exceeds a predetermined level, the gains of the variable gain amplifiers are simultaneously decreased to reduce the phase current. A limiter circuit for a current tracking type inverter, comprising a gain setting device for controlling a command value within a predetermined level range.