JPH0540780A - Vectorizing processing system - Google Patents

Abstract

PURPOSE:To shorten the execution time of a program in a vector processor by vectorizing a character relation formula which is not vectorized in a conventional system. CONSTITUTION:In a vectorizing part 22, a condition discriminating part 221 discriminates whether the character relation formula satisfies the condition or parallel execution or not. When it is discriminated by the condition discriminating part 221 that the character relation formula can be executed in parallel, a loop constituting part 222 regards character type elements of this formula as an integer type array and makes a loop, where the relation formula is executed by repeated comparison of individual elements of the integer type array, to constitute a second intermediate text 25.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a vectorization processing system.

[0002]

2. Description of the Related Art Conventionally, a vector processor having a vector operation function is not provided with a vector instruction for directly executing a character type operation, and a character relational expression is executed by a scalar instruction.

[0003]

In a vector processor having a vector operation function, generally, the larger the ratio of the portion of the object program executed by the vector instruction, the shorter the execution time can be made. However, in the above-described conventional technique, the character relational expression cannot be vectorized and is executed by the scalar instruction, so that the execution time cannot be shortened.

It is also possible to vectorize the character relational expression by manually rewriting it so as to be suitable for parallel execution, but it takes a lot of time to find a rewritable character relational expression and rewrite a program. And Furthermore, there is a risk of making an error when rewriting.

[0005]

According to a vectorization processing method of a compiler of the present invention, a vector processor having a vector operation function is loaded with a source program written in a high-level language and a syntax analysis is performed to perform the first processing. A syntactic analysis unit that generates an intermediate text, a vectorization unit that recognizes a parallel executable portion from the first intermediate text, and generates a second intermediate text, and an object program from the second intermediate text. A code generation unit for generating and outputting, wherein the vectorization unit determines whether or not a condition for parallel execution of a character relational expression is satisfied, and the condition determination unit enables parallel execution. Regarding the determined character relational expression, the character type element is regarded as an integer type array, and the relational expression is executed by repeating the comparison for each element of the integer type array. That by configuring the second intermediate text as a loop, and a loop configuration unit for vectorizing the character relational expression.

[0006]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, a more detailed description will be given with reference to the drawings showing an embodiment of the present invention.

Referring to FIG. 1, in one embodiment of the present invention, a compiler 2 reads a source program 1 written in a high-level language and performs a syntax analysis to generate a first intermediate text 24. 21, a vectorization unit 22 that recognizes a parallel executable portion from the first intermediate text 24 and generates a second intermediate text 25;
The second intermediate text 25 is composed of a code generator 23 for generating and outputting the target program 3.

The vectorization unit 22 determines a condition determining unit 221 that determines whether or not a condition for parallel execution of a character relational expression is satisfied, and a character relational expression that the condition determining unit 221 determines that parallel execution is possible. A loop configuration unit 222 that configures the second intermediate text 25 as a loop that regards the character type element as an integer type array and executes the relational expression by repeating the comparison of each element of the integer type array is provided. ..

The syntax analysis section 21 in the compiler 2 reads the source program 1 and generates a first intermediate text 24. For example, the first intermediate text shown in FIG. 3 is generated for the source program shown in FIG. The vectorization unit 22 changes the first intermediate text to generate the second intermediate text 25 as shown in FIG. The code generator 3 generates the target program 3 from the second intermediate text and outputs it.

A compiler for a vector processor having a vector operation function is constructed as shown in FIG. 1, and it is desired to convert a given source program into a target program in a form capable of parallel execution as much as possible. .. However, if a source program as shown in FIG. 5 is given, since this is an assignment statement whose right side is a character relational expression, parallel execution is prohibited and sequential execution by scalar instructions is forced.

In this embodiment, even when a source program including a character relational expression as shown in FIG. 5 is given, the character type element is regarded as an integer type array, and the relational expression is expressed as an integer type array. By making the loop to be executed by repeating the comparison for each element, it is possible to process in a parallel executable form. For example, in the program shown in FIG. 5, as shown in FIG. 6, character type variables CH1 * 256 and C
H2 * 256 is an integer array 1A (64) and 1B (64)
And the relational expression determines whether 1A (I) and 1B (I) match, a loop of the number of repetitions 63, and an integer type whose subscript is the number of repetitions for which it is determined whether they match. By replacing the character relational expression, the loop portion can be executed in parallel with the vector length 62 by replacing the character relational expression.

When the first intermediate text shown in FIG. 7 is obtained from the source program of FIG. 5 and is input to the vectorization unit 22 and the character relational expression is recognized, the condition determination unit 221 performs the following processing.

(1) The lengths of the character type elements of the operand 1 and the operand 2 of the relational expression are extracted from the first intermediate text for the character relational expression. If the lengths of the character type elements of operand 1 and operand 2 are equal and the lengths are divisible by the length of the integer type element, it is determined that parallel execution is possible. If the length does not satisfy the above condition, it is determined that parallel execution is not possible. In this embodiment, the length of one element of the integer type element is “4”.
It is assumed that parallel execution is possible.

(2) The relational operator of the relational expression is extracted from the first intermediate text for the character relational expression. When the relational operators are “.EQ.” And “.NE.”, It is determined that parallel execution is possible. Relational operators are ".GT.", ".G.
E. , ". LT." And ".LE." For relational operators that perform size comparison, in a system that uses a character code system that can perform character size comparison with one element length of integer type, parallel execution Judge as possible. It is determined that parallel execution is not possible in a system that uses a character code system that cannot compare the size of characters with an integer type element length. In this example,
It is assumed that the system uses a character code system that can compare the size of characters with one element length of integer type.
The relational operator “.GT.” Determines that parallel execution is possible.

In the condition determination unit 221, the loop construction unit 222 performs the following processing on the character relational expression determined to be executable in parallel.

(1) A first integer type array and a second integer type array are created for the character type elements of operand 1 and operand 2 and are combined with the character type elements. The number of dimensions of the integer type array created here is "the number of dimensions of the character type element + 1", and the dimension of the added dimension is "the length of the character type element / the length of one element of the integer type element". Is. In this embodiment, the number of dimensions of the integer type array is "1" and the dimension is "64."

(2) The part for determining whether or not the integer type arrays match is determined so that the vector length becomes "(length of integer type element) / length of integer type element-1". Create the second intermediate text. In this embodiment, the vector length is "63".

(3) A first integer type variable is created, and a second intermediate text for storing the number of repetitions with a judgment as to whether or not the integer type arrays match is created.

(4) The first logical type variable is created, and the result of the relational expression in which the character type element of the original character relational expression is replaced by the integer type array whose subscript is the first integer type variable is Create a second intermediate text to store in a boolean variable.

(5) A second intermediate text is created by replacing the original relational expression with the first logical variable.

In the present embodiment, the loop construction unit 222 obtains the second intermediate text shown in FIG. 8, and the portion for determining whether or not the integer type arrays of the character relational expression match is the vector length "63". It is executed by vector instructions.

As described above, in this embodiment, the character relational expression can be vectorized.

[0023]

As described above, according to the present invention, the character relational expression which has not been vectorized can be vectorized, so that the execution time of the program can be shortened in the vector processor.

[Brief description of drawings]

FIG. 1 is a functional block diagram of a compiler used in an embodiment of the present invention.

FIG. 2 is a diagram showing an example of a source program.

FIG. 3 is a diagram showing a first intermediate text for the source program shown in FIG.

FIG. 4 is a diagram showing a second intermediate text for the source program shown in FIG.

FIG. 5 is a diagram showing another example of a source program.

6 is a diagram showing that the relational expressions can be executed in parallel by modifying the source program shown in FIG.

FIG. 7 is a diagram showing a first intermediate text for the source program shown in FIG. 5;

8 is a diagram showing a second intermediate text for the source program shown in FIG. 5. FIG.

[Description of Codes] 1 source program 2 compiler 3 target program 21 syntax analysis unit 22 vectorization unit 23 code generation unit 24 first intermediate text 25 second intermediate text 221 condition determination unit 222 loop configuration unit

Claims (3)

[Claims] 1. A syntax analysis unit for reading a source program written in a high-level language and performing syntax analysis to generate a first intermediate text for a vector processor having a vector operation function; Vectorization by a compiler having a vectorization unit that recognizes parallel executable parts from text and generates a second intermediate text, and a code generation unit that generates and outputs an object program from the second intermediate text In the processing method, the vectorization unit is a condition determination unit that determines whether or not a condition for parallel execution of a character relational expression is satisfied, and a character relational expression that is determined to be parallel executable by the condition determination unit. As a loop that regards the type element as an integer type array and executes the relational expression by repeating the comparison of each element of the integer type array By configuring the second intermediate text, vector processing method characterized by having a loop configuration unit for vectorizing the character relational expression. 2. The condition determination unit extracts the lengths of the character-type elements of the first operand and the second operand of the relational expression from the first intermediate text for the character relational expression, 2. The vectorization processing method according to claim 1, wherein if the lengths of the character type elements of the operands are equal and the lengths are divisible by the lengths of the integer type elements, it is determined that parallel execution is possible. 3. The condition comparison unit extracts the relational operator of the relational expression from the first intermediate text for the character relational expression, and if the relational operator is a relational operator performing a magnitude comparison, character size comparison is performed. In a system that uses a character encoding system that can perform
3. A system that uses a character code system that determines that parallel execution is possible and does not compare the size of characters with an integer type element length, determines that parallel execution is not possible.
The described vectorization method.