JPH053487A - Atm cell passing number measurement circuit - Google Patents

Abstract

PURPOSE:To allow the ATM cell passing number measurement circuit in an ATM exchange to reduce number of gates and the power consumption is reduced. CONSTITUTION:Each of registers 1-5 of n-sets is provided with an input port 8 (9-12) and an output port 13 (14-17) to count and latch an ATM cell passing number data. A time division multiplexer circuit 6 applies time division multiplexing to the ATM cell passing number data inputted from the input ports 8-12 of the registers 1-5 respectively. An incrementer 7 receives an enable signal from a control circuit 18, increments '1' to its count and outputs the result to a relevant register among the registers 1-5 every time an ATM cell passing in an ATM switch takes place with respect to the multiplexed data. The relevant register receives it to make counting.

Description

Detailed Description of the Invention

[0001]

The present invention relates to an asynchronous transfer mode (A
synchronous TransferMode; A
The present invention relates to an ATM cell passage number measuring circuit for observing the number of ATM cell passages in an ATM switch using the TM) exchange system.

[0002]

2. Description of the Related Art Conventionally, in this kind of ATM cell passage number measuring circuit, a counter that counts the number of ATM cells, a period timer that can arbitrarily set the value, and a timeout signal of this period timer And a register for loading a value. Then, a counter that counts the number of cells is composed of n registers and n incrementers, and the AT is input from n input ports.
The counter operation is performed by adding 1 to the M cell passage number data each time the ATM switch passes through the ATM switch by the corresponding incrementer and holding it in the corresponding register.

[0003]

As described above, in the conventional ATM cell passage number measuring circuit, the counter for counting the number of ATM cells is composed of n registers and n incrementers. Since the ATM cell passage number data from the input port is counted by the corresponding register and incrementer, there is a drawback that the number of gates increases and the power consumption increases in proportion thereto.

An object of the present invention is to provide an ATM cell passage number measuring circuit which can reduce the number of gates and the power consumption accompanying this.

[0005]

SUMMARY OF THE INVENTION An ATM cell passage number measuring circuit of the present invention has an input port and an output port.
Equipped with n registers for counting and holding cell passage number data, outputs a plurality of ATM cell data input from a plurality of incoming lines in the ATM switching system to any of a plurality of outgoing lines based on the address information of the ATM cell data. AT
In an ATM cell passage number measuring circuit for measuring the number of ATM cell passages of the M switch, a time division multiplexing unit for time division multiplexing the ATM cell passage number data inputted from the respective input ports of the n registers, An incrementer that adds "1" to the data multiplexed by the time division multiplexing unit by a control signal every time an ATM cell passes through the ATM switch and outputs the added data to a corresponding register of the n registers. It is a configuration provided with.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the present invention.
The ATM cell passage number measuring circuit is input from registers 1 to 5 each having an input port and an output port for counting and holding ATM cell passage number data, and input ports 8 to 12 of the registers 1 to 5, respectively. A time-division multiplexing circuit 6 for time-division-multiplexing ATM cell passage number data, and a control signal is received and arithmetic operation is performed for each ATM cell passage in an ATM switch (not shown) for the multiplexed data. It includes an incrementer 7 for outputting to a corresponding register therein, and a control circuit 18 for controlling these.

The operation will be described below. Input port 8,
The ATM cell passage number data respectively inputted from 9, 10, 11, 12 are time division multiplexed by the time division multiplexing circuit 6 by a signal from the control circuit 18. The time-division-multiplexed ATM cell passage number data from the respective input ports is set to "1" by the enable signal sent from the control circuit 18 every time the incrementer 7 causes an ATM switch to pass an ATM cell. The values are added and held in the respective registers 1, 2, 3, 4, 5. Then, the registers 1 to 5 count the number of passing ATM cells and output the measurement results from the outgoing lines 13, 14, 15, 16, and 17.

[0008]

As described above, according to the present invention, n registers having an input port and an output port for counting and holding ATM cell passage number data, and input from each of the input ports of the n registers are provided. The time division multiplexing unit for time division multiplexing the ATM cell passing number data, and "1" is added by the control signal to the multiplexed data every time an ATM cell passes in the ATM switch, and the number of n registers It has an incrementer output from the corresponding register in the inside, and is configured to perform the counting operation to measure the number of ATM cell passages. Therefore, there is an effect that the number of gates can be reduced and the power consumption can be reduced accordingly. ..

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

[Explanation of symbols]

 1 to 5 register 6 time division multiplexing circuit 7 incrementer 8 to 12 input port 13 to 17 output port 18 control circuit

Claims (1)

Claims: 1. An ATM having an input port and an output port.
Equipped with n registers for counting and holding cell passage number data, outputs a plurality of ATM cell data input from a plurality of incoming lines in the ATM switching system to any of a plurality of outgoing lines based on the address information of the ATM cell data. AT
In an ATM cell passage number measuring circuit for measuring the number of ATM cell passages of the M switch, a time division multiplexing unit for time division multiplexing the ATM cell passage number data inputted from the respective input ports of the n registers, An incrementer that adds "1" to the data multiplexed by the time division multiplexing unit by a control signal every time an ATM cell passes through the ATM switch and outputs the added data to a corresponding register of the n registers. An ATM cell passage number measuring circuit, comprising: