JPH05344418A - Clamping circuit for digital camera - Google Patents

Abstract

PURPOSE:To improve the quantization accuracy of analog/digital conversion and to efficiently utilize the quantization range by setting a setting value in a comparator set for converging a reference black level signal in relation to an AGC gain. CONSTITUTION:An analog video signal outputted from an amplifier 203 is supplied to an inverting amplifier 208, in which a DC voltage is added to the signal and the sum is fed to an A/D converter 209. The reference black level signal of a digital video signal and a setting value in terms of a DC voltage are compared by a comparator 221, its error is integrated by an integration circuit 222 and adjusted by a potential converter 223. Then the setting value in the comparator 221 is selected or varied in response to a control signal controlling the gain of an amplifier 203. Thus, when the gain of the amplifier 203 is especially suppressed, the quantization range of the A/D converter 209 is efficiently used.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device and a clamp circuit for a digital camera using an analog-digital converter as a feedback clamp circuit.

[0002]

2. Description of the Related Art Video cameras using a solid-state image sensor have been developed. FIG. 4 shows a conventional video camera. 1
01 is a solid-state image sensor, 102 is a drive circuit for transfer pulse,
Reference numeral 103 is various pulse generators. Pulse generator 103
The transfer pulse generated by the above becomes a drive pulse via the drive circuit 102, and drives the solid-state imaging device 101.
The charges photoelectrically converted and accumulated in the solid-state image sensor 101 are sequentially transferred by a drive pulse and output as an analog output signal. The analog output signal is input to the noise reduction processing circuit 104, and unnecessary noise components are removed. In this process, a method called CDS (correlated double sampling) is currently the mainstream. A sample hold pulse generated by the pulse generator 103 is supplied to the noise reduction processing circuit 104. The analog signal that has passed through the noise reduction processing circuit 104 is input to the amplifier 105. As the amplifier 105, an AGC (gain control type amplifier) is usually used, and it is set so as to automatically increase the gain and raise the sensitivity when photographing in a dark place, but here it is simplified and variable. It is shown that the voltage generated by the resistor 106 can be used to determine the gain.

The signal output from the amplifier 105 is input to the clamp circuit 107, and the reference black signal included in the signal is clamped and output so as to have a substantially constant voltage. The clamp pulse indicating the position of the reference black signal is output from the pulse generator 103. Clamp circuit 1
The analog signal whose direct current (DC) level of the reference black signal is substantially equalized by 07 is input to the inverting amplifier 108, inverted, and then converted into an n-bit digital signal by the analog-digital (A / D) converter 109 and latched. Circuit 110
Is supplied to. The latch circuit 110 aligns the rising edges and the falling edges of the n pieces of digital data.
It may be included in the converter 109. Latch circuit 110
The digital signal output from is input to the comparator 111 and compared with an arbitrary digital value (setting value). The digital signal output from the latch circuit 110 is input to the signal processing circuit 112, arranged in a predetermined format (for example, NTSC system), and output to the output terminal 113.

The comparator 111 compares an arbitrary digital value with the digital signal from the latch circuit 110 and outputs the comparison results A1 and A2. If an ideal set value of the reference black signal is set in the comparator 111, a comparison result with the ideal set value is obtained while the reference black signal portion of the digital signal is input to the comparator 111. .. Therefore,
The comparison result from the comparator 111 is supplied to each one of the AND circuits 121 and 122, and the comparison result with the set value can be taken out only during the period of the reference black signal. Timing pulses matching the timing of the reference black signal are supplied to the other input terminals of the AND circuits 121 and 122 via the delay circuit 123. Pulse delay circuit 123
Generates a timing pulse using a clamp pulse. This is because the clamp pulse is a pulse indicating the position of the reference black signal, but there is a time lag occurring in the A / D converter 109 and the latch circuit 110 on the input side of the AND circuits 121 and 122. is there.

The comparison result extracted from the AND circuit 121 controls ON / OFF of the switch 124, and the AND circuit 1
The comparison result output from 22 controls ON / OFF of the switch 125. The outputs of the switches 124 and 125 are
It is integrated by an integrating circuit composed of resistors 126 and 127 and a capacitor 128. That is, the comparator 111 compares the set value with the reference black signal, and the comparison result is integrated by the integrating circuit including the resistors 126 and 127 and the capacitor 128, so that an error from the ideal value is obtained. Become. This error component (DC) is supplied to the positive input terminal of the inverting amplifier 108 via the potential converter 129.

As a result, the level of the reference black signal is controlled so as to always approach the ideal set value, and the signal processing circuit 11
2 will be input. The clocks to the A / D converter 109, the latch circuit 110, and the signal processing circuit 112 are output from the pulse generator 103 and given via the buffer circuit 131.

By the way, the reason why the feedback clamp circuit using the comparator 111, the integrating circuit, the inverting amplifier 108 and the like is used is to stabilize the level of the reference black signal when the A / D conversion process is performed. Further, the clamp circuit 107 at the preceding stage is used because the reference black signal is once set to a predetermined level with a quick response.

The feedback clamp circuit will be further described as follows. Now the A / D converter 10
It is assumed that the quantizing ability in No. 9 is from F1 (minimum value) to F2 (maximum value) shown in FIG. Here, the set value of the comparator 111 is set to a value E larger than the minimum value F1 instead of the minimum value F1.

Next, the reason for this will be described. Now, considering the case where the gain of the amplifier 105 is minimized using the variable resistor 106, the noise component superimposed on the reference black signal (DC component) has an amplitude as shown in FIG. Is also small. At this time, the A / D converter 109 can also quantize the noise component and express it as a digital value. That is, when digitized by the A / D converter 109, the negative component of noise is always a certain digital value. This is because there is the set value F.

Next, since the subject is dark, the amplifier 105
If the gain is maximized, the noise component superimposed on the reference black signal (DC component) also has a large amplitude, as shown in FIG. 5 (C). In the example of the figure, the negative amplitude level of the noise component is within the quantizable range. This is also because the set value E is set sufficiently far from the minimum value F1.

If the set value E is smaller than the example shown in the figure and is close to the minimum value F1, the beginning of the negative noise component cannot be quantized. When such a situation occurs, when performing signal processing and noise cancellation after that,
Accurate information on the noise component cannot be obtained. That is, noise cancellation cannot be accurately obtained.

Due to such circumstances, in the conventional digital camera, the negative component of noise when digitized by the A / D converter 109 is shown as an accurate digital value even after the n-bit digital signal. Then, the set value of the comparator 111 is determined.

However, when the gain of the amplifier 105 is minimized by using the variable resistor 106 (see FIG. 5).
(B)), it can be seen that the quantization capability of the A / D converter 109 is wasted. Since the set value of the comparator 111 cannot be changed by a conventional circuit, there are a wide range of values that never appear as a signal among the digital values that can be represented by n bits. In other words, the quantization precision of the n-bit analog-digital converter cannot be used up.

[0014]

As described above, in the case of the conventional digital camera, when the feedback type clamp circuit using the comparator is used to realize the digital camera having the AGC function, the A / D converter is used. Since the quantization precision of can not be used up, invalid digital values exist over a wide range.

Therefore, according to the present invention, the set value in the comparator, which is set to converge the reference black signal, can be set in association with the AGC gain, and the quantization accuracy of analog-digital conversion can be improved and efficiently. It is an object of the present invention to provide a digital camera that can be used and that can also make the level of a final reference black signal a constant value regardless of the AGC.

[0016]

According to the present invention, a video signal obtained from a solid-state image pickup device is amplified by an analog amplifier and then supplied to an analog-digital (A / D) converter to be digitized for digital signal processing. In a video camera, a comparator compares a reference level of an output signal of the A / D converter for a predetermined period with a set value, and immediately before a DC voltage corresponding to the error is input to the A / D converter. When it is added to the video signal of, the setting value in the comparator can be arbitrarily switched in order to make the quantization range of the A / D converter effective.

[0017]

By the above means, the DC voltage supplied to the A / D converter is supplied so that the quantization capability of the A / D converter is maximized.

[0018]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows an embodiment of the present invention. 201
Is a solid-state image pickup device, in which an optical image from a subject is formed on an image pickup surface, photoelectrically converted, and stored. This charge signal is read out by the drive pulse, transferred, and input to the noise reduction processing circuit 202 to reduce noise,
It is input to the amplifier 203. The gain control terminal of the amplifier 203 is supplied with the digital control signal of the input terminal 204 through the D / A converter 205. The digital control signal is
The signal may be a signal for automatic sensitivity adjustment that is variable according to the imaging condition of the subject, or may be a manual input.
The output of the amplifier 203 is input to the clamp circuit 206, and the black level position of the video signal is clamped. The clamp pulse is output from the pulse generator (not shown) at terminal 2
It is given to 07. The video signal output from the clamp circuit 206 is input to the inverting amplifier 208. The inverting amplifier 208 constitutes a feedback clamp circuit, and its output is input to the A / D converter 209 and digitized. The digitized video signal is input to the signal processing circuit 212 via the latch circuit 211.
In the signal processing circuit 212, noise cancellation, encoding processing to a predetermined system, synchronization signal addition processing, etc. are performed,
The output video signal is output to the output terminal 213.

The output of the latch circuit 211 is input to the comparator 221. The comparator 221 includes the latch circuit 21.
The value of the reference black signal of the output of 1 is compared with the stored set value, and the error component is given to the time constant circuit 222. The timing of the comparison operation at this time is given by a clamp pulse. The voltage smoothed by the time constant circuit 222 is
It is supplied to the positive side input terminal of the inverting amplifier 208 via the potential converter 223. As a result, the level of the reference black signal output from the latch circuit 211 is controlled to be equal to the set value.

Here, when the digital control signal is changed, this digital control signal is also given to the address of the memory 224, and the value read from the memory 224 is also used as a set value in the comparator 221. To be done.

As described above, when the set value of the comparator 221 is variable, the operation shown in FIGS. 2A and 2B can be obtained. That is, in FIG. 2, F1 and F2 are A /
The minimum value and the maximum value of the quantization range in the D converter 209 are shown. FIG. 9A shows the state of the noise component of the reference black signal when the gain of the amplifier 208 is suppressed. At this time, since the gain of the amplifier 203 is suppressed, the amplitude of the noise component is also small. Therefore, the set value of the comparator 221 is the A / D converter 209.
Even if it is set to a value close to the minimum value F1 of the quantization range of, the negative side of the noise can be sufficiently expressed as a digital value.
Next, when the gain of the amplifier 203 increases, the amplitude of the noise component of the reference black signal increases as shown in FIG. However, even if the amplitude becomes large, the set value of the comparator 221 also becomes large, so that the signal input to the A / D converter 209 is controlled to a reference level at which the negative component of noise can be digitized. The variable ratio of this set value can be adjusted by the data stored in the memory 224.

In the conventional system, the set value as shown in FIG. 2 (B) is always fixed, which means that A /
The quantization ability of the D converter 209 could not be fully utilized. However, according to this embodiment, as shown in FIG. 2 (A), when the amplitude of the noise component is small, the setting value is made small so that the quantizing ability of the A / D converter 209 is sufficient. I am making it available. When the amplitude of the noise component is small, the environment for imaging the subject is often bright and in good condition. In such a case, it is preferable to effectively utilize the number of bits of A / D conversion to acquire a signal sufficiently expressing gradation, and this system can meet such a demand. The present invention is not limited to the above embodiments.

FIG. 3 shows another embodiment of the present invention. Figure 1
The same parts as those of the circuit are given the same reference numerals. A part different from the circuit of FIG. 1 will be described. A subtractor 234 is provided between the latch circuit 211 and the signal processing circuit 212. As the subtraction element supplied to the subtractor 234,
It can be supplied from two systems. The first system is a system that supplies the output of the memory 224 via the switch 233, and the second system is the voltage converter 2
In this system, the output of 23 is amplified by the buffer amplifier 231, digitized by the D / A converter 232, and selected by the switch 233 to be supplied. Further, in this embodiment, for example, image average level information of the signal processing circuit 212, for example, spatial level or temporal level is used as gain control information for giving to the amplifier 203.

In this embodiment, the level of the reference black signal input to the signal processing circuit 212 can be kept substantially constant. Therefore, the subtractor 234 subtracts the amount of change in the level of the reference black signal by the set value changed in the comparator 221. In this way, even if the gain of the amplifier 203 changes, the value of the reference black signal portion input to the signal processing circuit 212 is always constant, and the signal processing in the signal processing circuit 212 becomes easy. In this embodiment, the subtraction element to be given to the subtractor 234 is brought in from two systems. However, when the response is quick, the information from the memory 224 may be used, and when the response may be slow, the D / A may be used. Information from the converter 232 may be used. Switching of the switch 233 may be manually switched depending on the imaging condition or environment, and when there is a change in the AGC voltage, it switches to a system with a quick response, and when the AGC voltage is stable, it switches to a system with a slow response. May be automated.

As described above, according to this system, A
The DC voltage that needs to be added to the analog signal during D / D conversion
It can be changed according to the AGC amplifier in the previous stage. This allows
It is possible to effectively utilize the quantization capability of the A / D converter. Further, even in the case of such control, the reference black signal level of the video signal finally input to the signal processing circuit can be always set to a constant value.

The basic idea of the present invention is that the setting value in the comparator 221 that was conventionally fixed can be changed arbitrarily, and the quantization range of the A / D converter 209 is expanded to be effective. It can be used for.
Therefore, in a simple device, the set value may be manually switched according to the brightness.

[0028]

As described above, according to the present invention, according to the first embodiment, the set value in the comparator set to converge the reference black signal can be set in association with the AGC gain. To improve the quantization accuracy of analog-digital conversion and to use it efficiently.
Further, according to the second embodiment, the final level of the reference black signal can be set to a constant value regardless of the AGC.

In the above embodiment, when the gain of the amplifier 203 is reduced and the gain is increased when the gain of the amplifier 203 is approached to the lower limit of the quantization range as the direction of changing the set value. Is moved to the upper limit of the quantization range, but it may be controlled toward or away from the upper limit of the quantization range depending on the polarity of the video signal.

[Brief description of drawings]

FIG. 1 is a circuit block diagram showing an embodiment of the present invention.

FIG. 2 is a signal explanatory diagram shown for explaining the operation of the circuit of FIG.

FIG. 3 is a circuit block diagram showing another embodiment of the present invention.

FIG. 4 is a circuit block diagram showing a configuration of a conventional digital video camera.

FIG. 5 is a signal explanatory view shown for explaining a problem of the circuit of FIG.

[Explanation of symbols]

201 ... Solid-state image sensor, 202 ... Noise reduction circuit, 20
3 ... Amplifier, 205, 232 ... D / A converter, 206 ...
Clamp circuit, 208 ... Inversion amplifier, 209 ... A / D converter, 211 ... Latch circuit, 212 ... Signal processing circuit, 2
21 ... Comparator, 222 ... Time constant circuit, 223 ... Potential converter, 224 ... Memory, 233 ... Switch, 234 ... Subtractor.

Claims (3)

[Claims] 1. A video signal obtained from a solid-state image sensor,
After being amplified by an analog amplifier, analog digital (A
/ D) In a video camera which supplies a digital signal to a converter to perform digital signal processing, a comparator compares a reference level of an output signal of the A / D converter for a predetermined period with a set value, and Means for adding a DC voltage corresponding to an error to the video signal immediately before being input to the A / D converter; and a setting value in the comparator arbitrarily for enabling the quantization range of the A / D converter. A clamp circuit for a digital camera, comprising a switchable means. 2. A video signal obtained from a solid-state image sensor,
After being amplified by an analog amplifier, analog digital (A
/ D) In a video camera which supplies a digital signal to a converter to perform digital signal processing, a comparator compares a reference level of an output signal of the A / D converter for a predetermined period with a set value, and Means for adding a DC voltage corresponding to an error to the video signal immediately before being input to the A / D converter; and gain control information for the analog amplifier in order to make the quantization range of the A / D converter effective. Accordingly, when the gain of the analog amplifier is reduced by changing the set value, the set value is controlled to approach the lower limit (or upper limit) of the quantization range to obtain the gain of the analog amplifier. And a means for controlling the set value in a direction away from the lower limit (or the upper limit) of the quantization range when the digital camera clamp circuit is increased. 3. The clamp circuit for a digital camera according to claim 2, further comprising means for subtracting a change amount of the set value from a digital video signal obtained from the A / D converter.