JPH05335857A - Radio communication equipment - Google Patents

Abstract

PURPOSE:To make the radio equipment smaller in size and lighter in weight and to improve the reception characteristic by suppressing the production of cross modulation due to a disturbing wave even when the disturbing wave with a large reception electric field strength is received in the reception circuit system of the direct conversion reception system. CONSTITUTION:A variable attenuator 33 to vary a level of a received radio signal and to output the result is provided to a signal line of the received radio signal and a control circuit 50 discriminates whether or not a prescribed frame synchronizing signal is detected from base band data DT demodulated by a detector 41. When it is discriminated that no frame synchronizing signal is detected by the control circuit 50, a prescribed gain control voltage is generated by a gain control circuit 60 to increase the attenuation of the variable attenuator 33.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a radio communication device such as a selective call receiver, a portable radio telephone and a cordless telephone, and more particularly to a device adopting a direct conversion receiving system as a reception demodulation system.

[0002]

2. Description of the Related Art A double superheterodyne receiving system is generally adopted as a receiving and demodulating system for mobile radios such as selective call receivers and portable radio telephones. FIG. 7 shows an example of the configuration of a receiving circuit system of this type of mobile radio device.

In FIG. 1, a received high frequency signal received by an antenna 11 passes through a variable attenuator (ATT) 12, is amplified by a high frequency amplifier 13, and then passes through a high frequency band pass filter 14 to a first frequency mixer 15. Entered in. In the first frequency mixer 15, the received high frequency signal is mixed with the first local oscillation signal output from the first local oscillation circuit (LO1) 16 and thereby frequency-converted into a first intermediate frequency signal. The first local oscillation circuit 16 is composed of a frequency synthesizer. First above
The intermediate frequency signal is input to the second frequency mixer 18 after passing through the first intermediate frequency filter 17. In the second frequency mixer 18, the first intermediate frequency signal is mixed with the second local oscillation signal generated from the second local oscillation circuit (LO2) 19 and frequency-converted into a second intermediate frequency signal. The second intermediate frequency signal is passed through the second intermediate frequency filter 20 and then input to the detection circuit 21. In the detection circuit 21, the second intermediate frequency signal is amplified by the intermediate frequency amplifier 21a, detected by the detector 21b, and the detected output is filtered by the data filter 21c and then output as a demodulated signal.

By the way, recently in the metropolitan areas,
A plurality of carriers have entered the common service area to provide mobile radio communication services such as a selective call service and a car / mobile radio telephone service.
In such an area, a base station is installed for each carrier in a common service area for transmission. Therefore, for example, when a mobile radio device receiving the service of the company A moves near a base station of another company, the reception level of the interfering wave becomes higher than the reception level of the desired wave.
U Reverse rotation may occur. In such a case, in the receiving circuit system of the mobile wireless device, the high frequency amplifier 13 and the mixer 15
In this case, intermodulation of the interfering wave with respect to the desired wave occurs, and the desired wave may not be correctly received even if the reception level of the desired wave is sufficiently high.

Therefore, a variable gain control circuit is generally provided in a receiving circuit system of a mobile radio used in such an area. That is, as shown in FIG. 7, the second intermediate frequency signal output from the second intermediate frequency filter 20 is amplified by the amplifier 22 and then rectified by the rectifier circuit 23 to become a DC voltage. The signal is supplied to the variable attenuator 12. As a result, variable attenuator 1
The attenuation amount of 2 is controlled, so that the signal level of the received high frequency signal is changed. According to this structure, when an interfering wave with a high received electric field strength is received, the signal level of the second intermediate frequency signal becomes high and the DC voltage of the gain control signal becomes high accordingly, which causes the variable voltage. Attenuator 1
The attenuation amount of 2 increases. Therefore, the signal level of the received high-frequency signal is reduced, which suppresses the occurrence of intermodulation due to the interfering wave.

On the other hand, mobile radio equipment is required to be further reduced in size and weight in order to further improve portability. However, in the above-mentioned double-super heterodyne reception type radio, the configuration of the reception circuit system tends to be complicated and large. Therefore, recently, the direct conversion receiving system has been attracting attention as a means for simplifying the structure of the receiving circuit system. This direct conversion reception system is a type of single superheterodyne reception system, and is a system for performing frequency conversion of a received high frequency signal into a baseband signal at once without passing through an intermediate frequency stage and demodulating it.

[0007]

However, in mobile radio equipment adopting such a direct conversion receiving system, an effective countermeasure for suppressing the occurrence of intermodulation due to an interfering wave having a large received electric field strength is currently in use. However, it was not proposed yet.

The present invention has been made in view of the above circumstances, and an object of the present invention is to generate a disturbing wave having a large received electric field strength in a receiving circuit system of a direct conversion receiving system even if the disturbing wave is received. It is an object of the present invention to provide a wireless communication device capable of suppressing the occurrence of cross modulation, and thereby further reducing the size and weight of the wireless device and improving the reception characteristics.

Another object of the present invention is to effectively suppress the occurrence of intermodulation due to an interfering wave, and to ensure that the receiving operation is correctly performed even when the receiving level of the desired wave is lowered, whereby the interfering wave is obtained. Another object of the present invention is to provide a wireless communication device that is strong in reception and has high reception sensitivity to a desired wave.

[0010]

SUMMARY OF THE INVENTION In order to achieve the above object, according to the present invention, when cross-modulation occurs due to a strong input interfering wave, a predetermined synchronizing signal cannot be detected from a reception baseband signal of a desired wave. Focusing attention, a gain variable type level varying means for varying and outputting the level of the received wireless signal is provided in the signal path of the received wireless signal, and a predetermined synchronizing signal is detected from the demodulated baseband signal. A determining means for determining whether or not the gain control means is provided, and a gain control means, and when the determining means determines that the predetermined synchronization signal is not detected, the gain control means determines the gain of the level varying means. Is reduced to a predetermined value or less.

Further, in order to achieve the above-mentioned other object, another aspect of the present invention is to provide a variable gain type level varying means for varying and outputting the level of the received radio signal in the signal path of the received radio signal. At the same time, there is provided first determining means for determining whether or not a predetermined synchronizing signal is detected from the demodulated baseband signal, and whether the received electric field strength of the radio signal is higher or lower than a predetermined value. A second judging means for judging and a gain controlling means are provided, and it is judged by the first judging means that a predetermined synchronization signal is not detected, and the second judging means judges the reception electric field of the radio signal. When it is determined that the intensity is higher than a predetermined value, the gain control means reduces the gain of the variable level means to a predetermined value or less.

[0012]

As a result, according to the present invention, when an interfering wave having a large received electric field strength is input and a third-order intermodulation wave is generated thereby, an error occurs in demodulation of received data due to the influence thereof, and the frame synchronization is performed. The signal cannot be detected accurately. Then, the gain variable control means generates a gain control signal for reducing the gain of the variable level circuit, the gain control signal reduces the gain of the variable level circuit, and the level of the received radio signal is reduced. Therefore, even if an interfering wave with a large received electric field strength is received, the generation of a third-order intermodulation wave due to this is suppressed, and as a result, accurate demodulation can be performed without being greatly affected by the interfering wave. ..

That is, the direct conversion reception type enables further reduction in size and weight of the structure,
Moreover, it is possible to provide a wireless communication device with excellent reception performance in which the occurrence of intermodulation due to an interfering wave is suppressed.

According to another aspect of the present invention, the reception level of the desired wave is lowered and the amplitude level of the reception baseband signal is lowered below the threshold value in a state where a constant gain is applied to the level varying means. Then, the gain set in the level changing means is changed to a larger gain. For this reason, although the desired wave can still be received normally, the desired wave cannot be received at a sufficient reception level because the gain of the level varying means is limited to a small value. The problem is prevented, and the baseband data can be correctly received and demodulated even when the reception level of the desired wave is lowered.

[0015]

EXAMPLES The present invention will be described below based on examples.

FIG. 4 shows an example of the format of the selective calling signal. The selective call signal has a frame structure, and one frame is time-division multiplexed into a sync block into which a frame sync signal F is inserted and 15 call blocks B1 to B15 into which the address of the selective call receiver is inserted. There is. The selective call receiver has the above-mentioned call blocks B1.
One of B1 to B15 is fixedly assigned in advance, and when a call request is issued to the selective call receiver, the base station causes each of the call blocks B1 to B1 of the selective call signal.
A call address is inserted into a call block (for example, B2) assigned to the selective call receiver of B15 and transmitted.

On the other hand, the selective call receiver saves the battery during standby in order to suppress the consumption of the battery. Battery saving refers to supplying power to the receiving circuit system only during the receiving period of the synchronous block and the calling block allocated to itself in one frame period to perform the receiving operation, and supplying power to the receiving circuit system during other periods. Is turned off so that the receiving operation is not performed. For example, in the selective call receiver to which the call block B2 is assigned, power is supplied to the receiving circuit system only during the reception period of the synchronous block and the reception period of the call block B2 as shown in FIG. 4 (b).

FIG. 1 is a circuit block diagram showing the configuration of a selective call receiver according to an embodiment of the present invention. In the figure, a selective call signal transmitted from a base station (not shown) is received by an antenna 31, high-frequency amplified by a high-frequency amplifier 32, and further filtered by a high-frequency filter 34 via a variable attenuator (ATT) 33. .. The received high frequency signal output from the high frequency filter 34 is branched into two and then input to the mixers 35 and 36. In addition, two local oscillation signals, which are output from a local oscillation circuit (LO) 37 and are provided with a phase shift difference of π / 2 from each other by a phase shifter 38, are input to these mixers 35 and 36, respectively. There is. Then, in the mixers 35 and 36, the received high frequency signal is mixed with the two local oscillation signals and converted into a baseband signal. The received baseband signals output from the mixers 35 and 36 are the baseband filters 39 and
After passing 40, it is input to the detector (DET) 41,
With this detector 41, digital data D of "1", "0"
It is demodulated to T and input to the control circuit (CONT) 50.

The control circuit 50 includes a frame sync signal detection circuit 51 and an address decoding circuit (D) as shown in FIG.
EC) 52 and a synchronization protection circuit 53. The frame synchronization signal detection circuit 51 includes a shift register 51a having a number of stages corresponding to the number of bits of the frame synchronization signal F and a gate circuit 51b, and the shift register 51a has digital data DT output from the detector 41.
Are serially shifted in. The shift register 51a is
Every time the digital data DT is shifted by one bit, the data stored at that time is output in parallel to the gate circuit 51b. When the pattern of the data supplied from the shift register 51a matches the pattern of the frame synchronization signal F, the gate circuit 51b outputs the "H" level frame synchronization detection signal FS from the non-inverted output terminal.
Is output.

The address decoding circuit 52 decodes the address data serially shifted and output from the shift register 51a, and when the address data of its own selective calling receiver is detected, for example, a sound, a blinking light or a vibration is generated. The notification control signal AS for generating is generated.

The synchronization protection circuit 53 includes a counter 53a,
The AND gate 53c includes a timer (TIM) 53b that generates a time-out signal each time a period corresponding to one frame is measured. And gate 53c
Is a period during which the inverting output terminal of the gate circuit 51b is at "H" level, that is, the frame synchronization detection signal FS.
The gate is in the open state in the period in which the gate is not generated, and the time-out signal generated from the timer 53b in the gate open period is supplied to the counter 53a. Counter 53a
Counts the number of time-out signals generated from the timer 53b, and outputs an "H" level out-of-sync pulse PS when the count value reaches a number corresponding to a predetermined number of frames. The count value of the counter 53a is reset by the frame synchronization detection signal FS. That is, the synchronization protection circuit 53 generates the out-of-sync pulse PS when the frame synchronization signal F is not continuously detected in the predetermined number of frames.

By the way, the selective call receiver of this embodiment is
Variable attenuator 33 depending on whether the frame synchronization signal is received or not.
A gain control circuit 60 for controlling the amount of attenuation is provided. In FIG. 1, the baseband signal output from the baseband filter 40 is input to a rectifier circuit 62 via a buffer amplifier 61, rectified by the rectifier circuit 62, and the amplitude level of the baseband signal is detected. Then, the detected value of this amplitude level is the threshold value circuit 6
3 is compared with a preset threshold value Vth1,
When the detected value of the amplitude level is equal to or larger than the threshold value Vth1, the "H" level detection signal is generated from the non-inverting output terminal of the AND gate 64. This detection signal is sent to the delay circuit 65.
After being delayed by a certain amount by D, the D flip-flop 66 D
It is input to the input terminal. That is, the rectifying circuit 62,
Threshold circuit 63, AND gate 64 and delay circuit 6
5 constitutes a circuit for determining the presence or absence of reception of radio waves.

The D-type flip-flop 66 outputs the "H" level signal QS from the (Q-) output terminal in a steady state, and the detection signal indicating that the radio wave is being received is input to the D input terminal. In the input state, when the out-of-synchronization pulse PS is generated from the control circuit 50 (Q-), the "L" level signal QS is output from the output terminal to output the gain control signal generation circuit (V-GEN). Supply to 67.

The gain control signal generating circuit 67 is, for example, as shown in FIG.
As shown in FIG. 4, it is composed of a switching transistor Tr and output resistors R1 and R2, and is 0 when the signal QS output from the D-type flip-flop 66 is "H" level.
It outputs a V gain control signal GCS, while outputting a positive voltage gain control signal GCS determined by the output resistors R1 and R2 when the signal QS becomes "L" level. The variable attenuator 33 sets the attenuation amount to 0 when the gain control signal GCS is 0V, and sets a predetermined attenuation amount when the gain control signal GCS becomes a positive voltage.

In the gain control circuit 60, the baseband signal output from the baseband filter 40 is
The signal is input to the amplifier 68 through the buffer amplifier 61, amplified by the amplifier 68 to a constant level, and then the amplitude level thereof is detected by the rectifier circuit 69. The detected value of the amplitude level is compared with a preset threshold value Vth2 in the threshold circuit 70, and a detection signal is output when the detected value of the amplitude level is equal to or more than the threshold value Vth2. The AND gate 71 is in a gate open state when the inverted output of the AND gate 64 is not at "H" level, and in this state, the detection signal ("H" level) output from the threshold circuit 70 is output. Let it pass. This detection signal is input to the reset terminal of the D-type flip-flop 66 via the OR gate 72, whereby the (Q-) output of the D-type flip-flop 66 is reset to the "H" level. That is, the amplifier 68, the rectifier circuit 69,
The threshold circuit 70 and the AND gate 71 detect when the reception level of the selective calling signal becomes equal to or lower than the threshold value Vth1 by giving the attenuation amount to the variable attenuator 33, and detect it to detect the variable attenuator 33. The attenuation amount of is returned to 0.
The (Q-) output of the D-type flip-flop 66 is reset to "H" level even when the reset signal is generated from the control circuit 50.

Next, the operation of the selective call receiver configured as described above will be described. First, the case where the selective calling signal is received at a sufficient level and the intermodulation due to the interfering wave does not occur will be described. In this case, the baseband filter 40 outputs a reception baseband signal having a sufficiently high amplitude level, so that the amplitude level detected by the rectifier circuit 62 of the gain control circuit 60 is the threshold value of the threshold circuit 63. It is higher than Vth1. Therefore, the AND gate 64 outputs an "H" level reception detection signal, and this detection signal is supplied to the D input terminal of the D-type flip-flop 66. However, at this time, in the control circuit 50, the frame synchronization signal detection circuit 51 detects the frame synchronization signal F for each frame.
No out-of-sync pulse PS is generated from 3a. Therefore, the D-type flip-flop 66 is not triggered,
As a result, the signal QS output from the (Q-) output terminal of the D-type flip-flop 66 is held at "H" level.
Therefore, the gain control signal GCS output from the gain control signal generation circuit 67 becomes 0V, and thus the attenuation amount of the variable attenuator 33 is set to 0. Therefore, at this time, the received high-frequency signal of the selective calling signal is not attenuated by the variable attenuator 33 and is used for frequency conversion and demodulation at a sufficiently high level.

On the other hand, when an interfering wave having a large received electric field strength is received in addition to the desired wave, the following operation is performed. That is, when an interfering wave having a large received electric field strength is received in addition to the desired wave, the high frequency amplifier 32 or the mixers 35 and 36 are received.
3rd order intermodulation occurs at the mixer 3
A beat component corresponding to the difference between the desired wave frequency f0 and the intermodulation wave frequency f1 is generated in the received baseband signals output from the circuits 5 and 36. When a beat component is generated in the received baseband signal, a data error occurs when it is detected by the detector 41, and as a result, the frame synchronization signal F cannot be detected by the control circuit 50.

In such a state, in the control circuit 50, the frame sync detection signal FS is sent from the sync signal detection circuit 51.
Is not output, the counting operation of the counter 53a proceeds. Then, for example, if the frame synchronization detection signal FS is not detected even after the period corresponding to several frames elapses, the out-of-sync pulse PS is generated from the counter 53a. On the other hand, at this time, the AND gate 6 of the gain control circuit 60
4 still outputs the reception detection signal. Therefore, when the out-of-synchronization pulse PS is generated, the (Q-) output QS of the D flip-flop 66 changes from "H" level to "L" level. Therefore, the gain control signal generating circuit 67 outputs the gain control signal GCS having a constant positive voltage level, and as a result, the variable attenuator 33 generates a constant attenuation amount AT. Therefore, thereafter, the amplitude level of the received high frequency signal is reduced by the variable attenuator 33. Therefore, the intermodulation wave component due to the interfering wave is attenuated, and as a result, the occurrence of beats is reduced and normal data demodulation is possible. FIG. 5 is a diagram for explaining the variable gain control operation in this case.

In the variable attenuator 33, not only the intermodulation wave component due to the interfering wave but also the amplitude level of the received high frequency signal of the desired wave is attenuated. However, since the intermodulation wave component due to the interfering wave is a third-order intermodulation wave, its attenuation amount becomes larger than the received high frequency signal level of the desired wave as shown in FIG. For this reason, it is possible to sufficiently suppress the level of the intermodulation wave without giving a large amount of attenuation to the received high frequency signal of the desired wave.

Further, for example, as described above, the variable attenuator 33 is used.
The selective call receiver moved while a certain amount of attenuation was given to the signal, and although the influence of the interfering wave was eliminated by this, the received high frequency signal level of the desired wave fell below the receivable minimum level Vmin. And In this state, although the desired wave can normally be received sufficiently, the desired wave cannot be received at a sufficient reception level because the variable attenuator 33 is provided with the attenuation amount.

However, in the selective call receiver of this embodiment,
When the reception level of the desired wave becomes equal to or lower than the threshold value Vth1, the attenuation amount given to the variable attenuator 33 is automatically reset to 0 as follows. That is, the amplitude level of the received baseband signal output from the baseband filter 40 decreases, and the amplitude detection level output from the rectifier circuit 62 falls below the threshold Vth1 set in the threshold circuit 63. Then, AND gate 64
Instead of the detection signal output from the non-inverted output terminal of "L" level, the signal output from the inverted output terminal becomes "H" level. Therefore, the AND gate 71
Opens the gate.

At this time, the received baseband signal passes through the buffer amplifier 61 and is then amplified by the amplifier 68 to a constant level, and the amplitude level after this amplification is performed by the threshold circuit 7.
At 0, it is compared with the threshold value Vth2. At this time, the amplification level of the amplifier 68 is set according to the amount of attenuation by the variable attenuator 33. Therefore, if the reception level of the desired wave is equal to or higher than the level at which normal reception is possible, the threshold circuit 70 outputs the "H" level. Then, this "H" level signal passes through the AND gate 71 in the gate open state, and is further supplied to the reset terminal of the D-type flip-flop 66 via the OR gate 72. Therefore, the (Q-) output of the D-type flip-flop 66, which has been at the “L” level until then, returns to the “H” level, and as a result, the gain control signal GCS output from the gain control signal generation circuit 67 is It becomes 0V.

Therefore, the amount of attenuation of the variable attenuator 33 returns to zero (0), and thereafter the received high frequency signal of the desired wave is subjected to frequency conversion and demodulation without being attenuated by the variable attenuator 33, A normal reception operation becomes possible. Figure 6
Indicates the variable gain control operation in this case, and AT indicates the amount of attenuation released in the variable attenuator 33.

As described above, in the selective call receiver of the present embodiment, the variable attenuator 33 is provided in the received high frequency signal path, and in the gain control circuit 60, the amplitude level of the received baseband signal is the threshold value Vth1 or more. If the out-of-synchronization pulse PS is generated from the control circuit 50 even though the amplitude level is equal to or higher than the threshold value Vth1, the intermodulation due to the interfering wave occurs. On the other hand, the gain control signal generating circuit 67 generates a positive voltage gain control signal GCS to give a constant amount of attenuation to the variable attenuator 33. Therefore, even if an interfering wave with a high reception level is input and a third-order intermodulation wave is generated thereby, it is possible to suppress the occurrence of this intermodulation wave and correctly demodulate the baseband data. ..

Further, since the gain control signal GCS is generated based on the detection result of the frame synchronization signal to control the variable attenuator 33, the selective call adopting the direct conversion receiving system having no intermediate frequency stage. Also in the receiver, accurate and stable variable gain control can be performed.

Further, according to the present embodiment, the reception level of the desired wave is lowered and the amplitude level of the reception baseband signal is equal to or lower than the threshold value Vth1 while the constant attenuation amount is given to the variable attenuator 33. When it falls to 0, the output of the D-type flip-flop 66 is reset and the gain control signal GCS is set to 0V, whereby the attenuation amount of the variable attenuator 33 is returned to 0. The baseband data can be correctly received and demodulated even when the power consumption drops. Therefore, although the desired wave can still be received normally under normal conditions, the desired wave cannot be received at a sufficient reception level because the variable attenuator 33 is provided with an attenuation amount. You can choose not to.

The present invention is not limited to the above embodiment. For example, a variable gain amplifier is provided instead of the variable attenuator 33, and when the frame synchronization signal is not detected and the synchronization is lost, the amplification gain of this variable gain amplifier is set to, for example, zero, which is lower than that in the normal time. You may comprise. Further, the high frequency amplifier 32 may be configured by a variable gain amplifier, and when the frame synchronization signal is not detected, the amplification gain of the high frequency amplifier may be set to a value lower than that in normal time. Furthermore, a variable attenuator or an alternative variable gain amplifier may be inserted between the antenna and the high frequency amplifier, or both between the antenna and the high frequency amplifier and between the high frequency amplifier and the high frequency filter. You may do it.

In the above embodiment, the case where the detection of the frame synchronization signal, the determination of the out-of-synchronization and the like are performed by the hard circuit constituted by the shift register and the gate circuit provided in the control circuit 50 has been described. When the circuit is provided with a microcomputer, it may be performed by software by this microcomputer.

In addition, the circuit configuration of the frame synchronization signal detecting means and the gain control circuit, the type of mobile radio to be applied and the configuration thereof can be variously modified and implemented without departing from the scope of the present invention.

[0040]

As described above in detail, according to the present invention, the gain variable type level varying means for varying and outputting the level of the received radio signal is provided in the signal path of the received radio signal, and the demodulation is performed. Determination means for determining whether a predetermined synchronization signal is detected from the baseband signal,
Gain control means is provided, and when the determination means determines that the predetermined synchronizing signal is not detected, the gain control means reduces the gain of the level varying means to a predetermined value or less. ..

Therefore, according to the present invention, in the receiving circuit system of the direct conversion receiving system, even if an interfering wave having a large received electric field strength is received, it is possible to suppress the occurrence of intermodulation due to the interfering wave, and thereby the radio wave can be suppressed. It is possible to provide a wireless communication device that enables further reduction in size and weight of a machine and improvement of reception characteristics.

According to another aspect of the present invention, a variable gain type level varying means for varying and outputting the level of the received wireless signal is provided in the signal path of the received wireless signal, and the demodulated baseband signal is used. First determining means for determining whether or not a predetermined synchronization signal is detected, and second determining means for determining whether the received electric field strength of the wireless signal is higher or lower than a predetermined value. Gain control means is provided, and the first determination means determines that the predetermined synchronization signal is not detected, and the second determination means determines that the received electric field strength of the radio signal is higher than a predetermined value. In this case, the gain control means reduces the gain of the variable level means below a predetermined value.

Therefore, according to another aspect of the present invention, the occurrence of intermodulation due to an interfering wave can be effectively suppressed, and the receiving operation can be correctly performed even when the receiving level of the desired wave is lowered, whereby the interfering wave is prevented. A wireless communication device that is strong against waves and has high reception sensitivity to desired waves can be provided.

[Brief description of drawings]

FIG. 1 is a circuit block diagram showing a configuration of a receiving circuit system of a selective call receiver according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a main configuration of a control circuit shown in FIG.

FIG. 3 is a circuit diagram showing a configuration of a gain control voltage generating circuit shown in FIG.

FIG. 4 is a diagram showing an example of a format of a selective calling signal and an example of a battery saving operation.

5 is a characteristic diagram for explaining a variable gain control operation of the selective call receiver shown in FIG.

6 is a characteristic diagram for explaining another variable gain control operation of the selective call receiver shown in FIG.

FIG. 7 is a circuit block diagram showing a configuration example of a receiving circuit system of a conventional selective calling receiver including a variable gain control circuit.

[Explanation of Codes] 31 ... Antenna 32 ... High Frequency Amplifier 33 ... Variable Attenuator (ATT) 34 ... High Frequency Filter 35, 36 ... Mixer 37 ... Local Oscillator (LO) 38 ... Phase Shifter 39, 40 ... Baseband Filter 41 ... detector (DET) 50 ... control circuit (CONT) 51 ... frame synchronization signal detection circuit 51a ... shift register 51b ... gate circuit 52 ... address decoding circuit (DEC) 53 ... synchronization protection circuit 53a ... counter 53b ... timer 53c ... AND Gate 60 ... Gain control circuit 61 ... Buffer amplifier 62, 69 ... Rectifier 63, 70 ... Threshold circuit 64, 71 ... AND gate 65 ... Delay circuit 66 ... D-type flip-flop 67 ... Gain control voltage generation circuit 68 ... Amplifier 72 … Or gate

Claims (2)

[Claims] 1. A wireless communication device having a direct conversion type receiving circuit system for receiving a wireless signal having a predetermined frame structure, directly frequency-converting the received wireless signal into a baseband signal, and demodulating the baseband signal. A variable gain control type level varying means for varying and outputting the level of the received wireless signal provided in the signal path of the received wireless signal, and a predetermined synchronization signal from the demodulated baseband signal. Determining means for determining whether or not it is detected, and when the determining means determines that the predetermined synchronizing signal is not detected, the gain of the level varying means is reduced to a predetermined value or less, and in other cases And a gain control means for holding the gain of the level varying means at a value exceeding the predetermined value. 2. A wireless communication device comprising a direct conversion type receiving circuit system for receiving a wireless signal having a predetermined frame structure, frequency-converting the received wireless signal directly into a baseband signal, and demodulating the baseband signal. A variable gain control type level varying means for varying and outputting the level of the received wireless signal provided in the signal path of the received wireless signal, and a predetermined synchronization signal from the demodulated baseband signal. First determining means for determining whether or not it is detected, second determining means for determining whether the received electric field strength of the radio signal is higher or lower than a predetermined value, and the first When the determination unit determines that the predetermined frame synchronization signal is not detected and the second determination unit determines that the received electric field strength of the radio signal is higher than the predetermined value. The level the gain of the variable means lowers below a predetermined value, the wireless communication device characterized by a gain of said level variable means and and a gain control means allowed to hold a value exceeding the predetermined value otherwise.