JPH05328395A - Reproducing acc circuit - Google Patents

Abstract

PURPOSE:To absorb the large amplitude gap of a reproducing signal generated at the time of switching a head and to stabilize the amplitude of a reproducing chroma signal to keep if fixed. CONSTITUTION:The amplitude of a reproducing burst signal is detected with a current output type voltage comparing circuit 76 and a constant current source 83 in a period when a video signal is present and the amplitude of the reproducing burst signal is detected with the current output type voltage comparing circuit 77 and the constant current source 84 added in the period until the video signal is started after a vertical synchronizing signal. Detection sensitivity by the current output type voltage comparing circuit 77 and the constant current source 84 is improved so that the maximum amplitude gap expected to be generated by switching the head is absorbed by several Hs, and thereafter, the amplitude of the reproducing burst signal is detected by the extremely low detection sensitivity of the current output type voltage comparing circuit 76 and the constant current source 83.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to reproduction ACC (Automatic Chroma level) in a helical scan type magnetic recording / reproducing apparatus for recording / reproducing a color video signal.
l Control) circuit.

[0002]

2. Description of the Related Art As is well known, in a consumer magnetic recording / reproducing apparatus for recording and reproducing a color video signal, a chroma signal is separated from a signal reproduced by a magnetic head and amplified by a reproducing amplifier. Processing is taking place. An ACC circuit is provided at the first stage of this signal processing system, and the amplitude of the reproduced chroma signal is automatically adjusted so that the burst amplitude is kept constant.

FIG. 10 is a block diagram showing an example of a reproduction signal processing circuit of a conventional helical scan type magnetic recording / reproducing apparatus called 8 mm video, in which 1 is a magnetic tape, 2,
3 is a magnetic head, 4 is a head changeover switch, 5 is a reproduction amplifier, 6 is a reproduction luminance signal processing circuit, 7 is a pulse generation circuit, 8 is a low-pass filter (hereinafter referred to as LPF), 9
Is a voltage control amplifier (hereinafter, referred to as VCA), 10 is a reproduction frequency converter, 11 is a band pass filter (hereinafter, BPF).
, 12 is a burst de-emphasis circuit, 13
A comb filter, 14 is a chroma de-emphasis circuit, 15 is a current output voltage comparison circuit, 16 is a reference DC voltage source, 17 and 18 are switches, 19 is a constant current source, 20 is a detection capacitor, 21 is a reproduction ACC circuit, Reference numeral 22 is an adder circuit, 23 is an output terminal for a luminance signal, 24 is an output terminal for a composite video signal, and 25 is an output terminal for a chroma signal.

In FIG. 1, the mixed video signal of the FM (frequency modulation) luminance signal and the low frequency conversion chroma signal recorded on the magnetic tape 1 is reproduced by the magnetic heads 2 and 3, and is passed through the switch 4. And is amplified by the reproduction amplifier 5. As is well known, the output signal of the reproduction amplifier 5 is supplied to the reproduction luminance signal processing circuit 6 and the LPF 8. In the reproduction luminance signal processing circuit 6, the FM luminance signal is separated from the mixed video signal and subjected to processing such as FM demodulation to obtain a baseband luminance signal. This brightness signal is output from the output terminal 23 to the outside and is also supplied to the adding circuit 22.

On the other hand, in the LPF 8, the low frequency conversion chroma signal is separated from the reproduction mixed video signal, and the reproduction ACC circuit 21
The VCA 9 adjusts the amplitude of the burst signal so that the burst signal has a predetermined amplitude, and then the frequency conversion circuit 10 converts the burst signal into the chroma signal of the original carrier frequency. This chroma signal is
After the spurious component is removed by the BPF 11, the de-emphasis circuit 12 suppresses the amplitude of the burst signal to the original amplitude, and the comb filter 13 removes the crosstalk from the adjacent track when reproducing from the magnetic tape 1. And is processed by the chroma de-emphasis circuit 14. The reproduction chroma signal output from the chroma de-emphasis circuit 14 is output from the output terminal 25 to the outside and is also supplied to the adder circuit 22 to reproduce the reproduction luminance signal processing circuit 6.
Is added to the luminance signal output from the output terminal 24 and output as a composite color video signal from the output terminal 24 to the outside.

The chroma signal output from the chroma de-emphasis circuit 14 is also supplied to the reproduction ACC circuit 21. Further, the reproduction luminance signal processing circuit 6 separates the sync signal from the demodulated luminance signal and supplies it to the pulse generation circuit 7 to generate the burst gate pulse BGP in the burst signal period of the reproduction chroma signal. The burst gate pulse BGP is also supplied to the reproduction ACC circuit 21.

In the reproduction ACC circuit 21, the switch 17 which is turned on during the burst gate pulse BGP period
Only the burst signal is extracted from the chroma signal output from the chroma de-emphasis circuit 14 and its amplitude is detected. The detection output of the burst signal is compared with the reference voltage Vref3 of the reference DC voltage source 16 in the current output voltage comparison circuit 15, and a current having a magnitude corresponding to the difference between these is output during the burst gate pulse BGP period and the detection capacitor 20 is output.
To charge. Further, when the switch 18 is turned on during the burst gate pulse BGP period, the detection capacitor 20 is discharged by the discharge current of the constant current source 19. When the burst gate pulse BGP period ends, the charging voltage of the detection capacitor 20 is maintained as it is.

As described above, in the detection capacitor 20,
The charging by the current from the current output voltage comparison circuit 15 and the discharging to the constant current source 19 are simultaneously performed during the burst gate pulse BGP period, but when this charging current is equal to the discharging current, the charging voltage does not change. When the amplitude of the burst signal has a certain predetermined relationship with the reference voltage Vref3, this state is brought about. When the amplitude of the burst signal is larger than this, the charging current becomes larger than the discharging current and the charging voltage of the detection capacitor 20 becomes When the burst signal becomes higher and the amplitude of the burst signal is smaller than this, the charging current becomes smaller than the discharging current and the charging voltage of the detection capacitor 20 becomes lower.

Here, the VCA 9 is a detection capacitor 20.
The charging voltage is used as a gain control voltage, and the gain is designed to increase when the gain control voltage is low. Therefore, when the charging voltage of the detection capacitor 20 becomes high, the VCA9
Gain decreases, and the charging voltage of the detection capacitor 20 decreases, the gain of the VCA 9 increases. So VC
When the amplitude of the burst signal of the chroma signal supplied to A9 is lower than that in the above-mentioned predetermined relationship, the gain of the VCA9 becomes high and the amplitude becomes large, and conversely, the burst of the chroma signal supplied to the VCA9 is burst. If the amplitude of the signal is higher than in the case of the above-mentioned predetermined relationship, the gain of the VCA 9 becomes low and this amplitude becomes small. In this way, the amplitude of the burst signal becomes a constant amplitude that satisfies the above predetermined relationship.

It should be noted that the gain of the VCA 9 is generally maximized when there is no reproduced burst signal.

The operation of the current output type voltage comparator 15 will be described with reference to FIG. However, in FIG.
The horizontal axis shows the voltage on the positive phase side of the current output voltage comparator 15, and the vertical axis shows the normalized output current.

The output current has a limiter characteristic of a differential pair composed of transistors with respect to the voltage of the positive phase side input terminal. When the amplitude of the input signal is a preset predetermined value, the vicinity of the peak of the amplitude of the signal is the reference voltage Vr shown in the figure.
ef3 (here, -4) is slightly exceeded,
A current is output from the current output voltage comparator 15 to charge the capacitor 20. At this time, as described above, this output charging current is balanced with the discharging current of the detecting capacitor 20 to the constant current source 19, and the charging voltage of the detecting capacitor 20, that is, the gain control voltage of the VCA 9 is kept constant. Be done. When the amplitude of the input signal is smaller than the predetermined value, the charging current from the current output voltage comparator 15 decreases and the charging voltage of the detection capacitor 20 decreases. Further, when the amplitude of the input signal is larger than the predetermined value, the charging current from the current output voltage comparator 15 increases and the detection capacitor 20
Charging voltage rises. In this way, the amplitude of the reproduced chroma signal is adjusted so that the amplitude of the burst signal has a constant magnitude.

Such an example is described in "Introduction to Home VTR" (Television Society: Corona) pp. 164-pp168
Is shown in.

[0014]

The reproduction ACC circuit has one
Two types of compensation are performed: compensation of the amplitude fluctuation of the chroma signal in the field, and amplitude compensation of the reproduction output between the reproduction heads including the reproduction amplifier, that is, compensation of the amplitude fluctuation of the reproduction output substantially between the fields. There is a need.

In general, the amplitude fluctuation of the chroma signal within one field is mainly due to so-called track bending, which occurs when a magnetic tape recorded by another magnetic recording / reproducing apparatus is reproduced, except that caused by noise. This causes the amplitude variation of the chroma signal to be small and gradual. On the other hand, the amplitude difference of the reproduction output between the reproducing heads including the reproducing amplifier occurs at the time of switching the reproducing heads, and is therefore abrupt and large.

Therefore, the reproduction ACC circuit responds slowly to the amplitude fluctuation of the chroma signal in one field and quickly responds to the amplitude difference of the reproduction output between the reproducing heads. It is necessary to satisfy the conflicting conditions at the same time.

However, as the response speed of the conventional reproduction ACC circuit, there is no choice but to set it at a compromise between the above two conditions. Therefore, in the magnetic recording / reproducing apparatus in which the reproduction output amplitude difference between the reproduction heads is large, the reproduction ACC circuit cannot quickly absorb the reproduction output amplitude difference.
There was a problem that flicker occurred at the top of the playback screen.

Further, as described above, the change in the reproduced signal within one field is gentle and small, and noise may be mixed in the reproduced signal, so that the gain fluctuation of the reproduced ACC circuit is suppressed as much as possible. As a result, the S / N of the amplitude component
Is improved. However, the control characteristic with respect to the input amplitude in the reproduction ACC circuit is as described in the above-mentioned conventional technique.
Due to the limiter characteristic of the differential pair composed of transistors, which has a so-called exponential function characteristic, the control amount increases as the signal amplitude increases. Therefore, the amplitude of the reproduced signal does not change, and even if noise is superimposed on the reproduced signal,
There is also a problem that the reproduction ACC circuit responds to the hypersensitivity, and on the contrary, the amplitude fluctuation in one field becomes large.

An object of the present invention is to solve such a problem, to absorb a sharp and large reproduction output amplitude difference occurring at the time of switching the reproducing head, and to suppress a minute chroma signal within one field. It is to provide a stable reproduction ACC circuit that does not follow amplitude fluctuations.

[0020]

In order to achieve the above object, the present invention provides a part or all of the period from the trailing edge of the vertical synchronizing signal of the reproduced color video signal to the start of the next video signal portion. The first ACC response speed is set in the period 1 of the above, and the second ACC response speed is set in the other period 2 respectively.
The first ACC response speed> the second ACC response speed.

Further, according to the present invention, when the gain control voltage is low, the gain becomes high and the gain for amplifying the chroma signal is variable, the capacitor, and the amplitude of the burst signal of the chroma signal are set in advance. When the value is a value, the detection sensitivity is set to substantially zero, and when the amplitude of the burst signal is in the first range from the predetermined value to a value slightly larger than the predetermined value, a current is output with a low first detection sensitivity and the burst signal is output. When the amplitude of exceeds the first range, it outputs a current with high second detection sensitivity,
Amplitude detecting means for making each of these currents a charging current for the capacitor and discharging means for making a constant current discharge from the capacitor, the charging voltage of the capacitor being the gain control voltage of the amplifier.

[0022]

The switching point of the head where a large amplitude fluctuation of the reproduced signal occurs is, for example, in the case of NTSC type 8 mm video, approximately 6H before the vertical synchronizing signal (H is one horizontal synchronizing period).
Then, the video signal portion starts next 12 to 13H after the trailing edge of the vertical synchronizing signal. In the present invention, the ACC response speed is increased during a part or all of 12 to 13H from the trailing edge of the vertical synchronizing signal so that a large amplitude fluctuation of the reproduced signal caused by head switching is absorbed during this period. .. Therefore, a large amplitude fluctuation of the chroma signal on the screen does not appear, and the upper flicker does not occur. Also, after the video signal portion starts, A
Since the CC response speed is slowed down, ACC against noise
The characteristics can be stabilized and the S / N can be improved.

In this case, since the head switching time at which a large amplitude fluctuation occurs in the reproduction signal is set to approximately 6H before the vertical synchronizing signal, it does not appear at the bottom of the screen or on the screen. Therefore, even if the amplitude of the chroma signal greatly fluctuates in this portion, there is practically no problem.

Further, according to the present invention, the detection sensitivity of the burst signal is lowered in the range of the amplitude of the burst signal from a preset predetermined value to a value slightly larger than the preset value, so that the chroma signal is amplified. The gain characteristic of the amplifier becomes a linear characteristic instead of an exponential function characteristic, the ACC characteristic can be further stabilized, and the change in the gain of the amplifier due to noise can be further suppressed, and the amplitude of the chroma signal can be suppressed. Further stabilization and improvement of S / N can be achieved.

[0025]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a reproduction signal processing circuit of a magnetic recording / reproducing apparatus using an embodiment of a reproducing ACC circuit according to the present invention, in which 50 is a magnetic tape, 51 and 52 are magnetic heads, and 53 is a magnetic head. A switch, 54 is a reproduction amplifier, 55 is a peaking circuit, and 56 is a reproduction FM AGC (Autom).
atic gain control circuit, 57 is a limiter, 58 is an FM demodulation circuit, 59 is an LPF, 60 is a main de-emphasis circuit, 61 is a non-linear de-emphasis circuit, 62 is a noise cancellation circuit, 63 is a sync separation circuit, and 64 is a reproduction luminance. Signal processing circuit, 65 is pulse generation circuit, 66 is LPF, 67 is VCA, 68 is frequency conversion circuit, 69 is BPF, 70 is burst de-emphasis circuit, 71 is comb filter, 72 is chroma de-emphasis circuit, 73 Is an adder circuit, 74 is an output terminal of a composite color video signal, 75 is a switch, 76 and 77 are current output type voltage comparison circuits, 78 is a reference DC voltage source, 79 is a switch, 80 is a detection capacitor, and 81 and 82 are Switches, 83 and 84 are constant current sources, 85 is an AND gate, 86
Is the reproducing ACC circuit of this embodiment.

This embodiment shows a case where it is applied to 8 mm video.

In FIG. 1, the above-described mixed video signal recorded on the magnetic tape 50 is the magnetic head 51,
The signals are alternately reproduced at 52 and are connected by the switch 53 controlled by the head switching signal a shown in FIG. 2 to form a continuous mixed video signal, which is amplified by the reproduction amplifier 54. The mixed video signal b shown in FIG. 2 output from the reproduction amplifier 54 has an amplitude step each time the heads are switched due to variations in the gains of the magnetic heads 51 and 52 and the switch 53. This mixed video signal b is supplied to the peaking circuit 55 and F
After being processed by the MAGC circuit 56, it is supplied to the reproduction luminance signal processing circuit 64.

In the reproduction luminance signal processing circuit 64, the reproduction signal is demodulated into a baseband luminance signal by the limiter 57 and the FM demodulation circuit 58. This luminance signal is the LPF5
After the spurious is removed at 9, the waveform emphasized at the time of recording is restored by the main de-emphasis circuit 60 and the non-linear de-emphasis circuit 61, the noise is reduced by the noise cancel circuit 62, and the added signal is supplied to the adder circuit 73. It
The luminance signal output from the non-linear de-emphasis circuit 61 is also supplied to the sync separation circuit 63 to separate the sync signal and supplied to the pulse generation circuit 65.

The mixed video signal b shown in FIG. 2 output from the reproduction amplifier 54 is also supplied to the LPF 66, and the low frequency conversion chroma signal is separated. The low-frequency conversion chroma signal is amplitude-adjusted by the VCA 67 so that the burst signal has a predetermined amplitude, and is converted into the chroma signal of the original carrier frequency by the frequency conversion circuit 68. This chroma signal is
After the spurious component is removed by the BPF 69, the amplitude of the burst signal is suppressed to the original amplitude by the de-emphasis circuit 70, and then the comb-shaped filter 71 causes a crossed track from an adjacent track generated during reproduction from the magnetic tape 50. Are removed, further processed by the chroma de-emphasis circuit 72, and added by the addition circuit 73 with the luminance signal output from the reproduction luminance signal processing circuit 64 to form a composite color video signal. This composite color video signal is output from the output terminal 74. The above is the same as the conventional magnetic recording / reproducing apparatus.

The chroma signal output from the chroma de-emphasis circuit 72 is the reproduction A in this embodiment.
It is supplied to the CC circuit 86. In addition, the pulse generation circuit 65
Generates a burst gate pulse BGP and a control signal VG1 from the sync signal from the sync separation circuit 63, and supplies these to the reproduction ACC circuit 86. This control signal VG1
Is a signal representing a period of 12 to 13H (where H is a horizontal scanning period) from the trailing edge of the vertical synchronizing signal c shown in FIG. 2 to the start of the video signal.

Next, the operation of the ACC circuit 86 according to this embodiment will be described with reference to FIG. However, here, NT
The case of 8 mm video of the SC system is taken as an example. In this case, as shown in FIG. 2, the vertical synchronizing signal c exists at a position of approximately 6H after head switching. In addition, VCA67
The gain is designed to be high when the control voltage is low.

The chroma signal output from the chroma de-emphasis circuit 72 is supplied to the switch 75, and the burst signal is extracted and amplitude-detected by the burst gate pulse BGP. This detection output is supplied to the current output type voltage comparator 76, and is also supplied to the current output type voltage comparator 77 by the switch 79 for the period of the control signal VG1. The current output type voltage comparators 76 and 77 change the input amplitude of the reference voltage Vref1 from the reference DC voltage source 78 when the detection output of the burst signal which is the input is large.
And the currents iAT2 and iAT corresponding to the comparison results, respectively.
1 is output to charge the same detection capacitor 80. The charging voltage of the detection capacitor 80 is the control voltage ACNT1 of the VCA 67, which is shown in FIG. Therefore, when the amplitude of the burst signal of the chroma signal output from the LPF 66 is large, the control voltage ACNT1 becomes large, which lowers the gain of the VCA 67 and reduces the output amplitude of the chroma de-emphasis circuit 72.

The maximum value of the current iAT1 output from the current output type voltage comparison circuit 76 is the control signal VG1 which corresponds to the expected increase in the amplitude of the reproduction signal when the heads are switched due to the variation of the magnetic heads 51 and 52. This is the amount of generating the voltage drop of the control signal VACNT1 necessary to suppress it during the period. The maximum value of the current iAC2 output from the current output type voltage comparison circuit 77 is the discharge current IR described later when the amplitude of the reproduction burst signal is a predetermined amplitude.
This is an amount that can sufficiently generate a charging current balanced with C2. With this setting, the maximum value max {i of the current iAT1
The relationship between AT1} and the maximum value max {iAT2} of the current iAT2 is max {iAT1} >> max {iAT2}.

The switch 81 uses the burst gate pulse BG.
It is closed for each P, the detection capacitor 80 is discharged by the current value IRC2 of the constant current source 83, and the switch 82 inputs the burst gate pulse BGP and the control signal VG1.
The vertical synchronizing signal c (FIG. 2) is output by the output of the ND gate 85.
The detection capacitor 80 is discharged with the current value IRC1 of the constant current source 84 for each burst gate pulse BGP period of 12 to 13H from the falling edge of. Here, the current value I
RC2 is set to a small value with respect to the detection capacitor 80 so that the control voltage ACNT1 hardly changes during discharge for several H periods. In addition, the current value IRC1 is set to a value that can compensate for the predicted decrease in the reproduction amplitude due to the gain variation of the magnetic head in the detection capacitor 80 in several H periods, and IRC1 >> IRC2. ..

Therefore, since there is no burst signal in the vertical blanking period, the detection capacitor 80 is discharged through the switch 81, and the VCA6 for the vertical synchronizing signal is generated.
7 increases to increase the amplitude of the reproduction signal output from the VCA 67, and the switch 82 closes for detection in the 12 to 13H period from the falling edge of the vertical synchronizing signal c (FIG. 2) in which no video signal exists. The capacitor 80 for discharge is fully discharged, and the gain of the VCA 67 is maximized.

With the above setting, it is possible to absorb a large change in the amplitude of the reproduction signal at the time of switching heads. Regarding this point, first, from the reproduction signal with a large amplitude from the magnetic head having a high gain, The operation of the reproduction ACC circuit 86 when switching to the reproduction signal with a small amplitude from the magnetic head with a low gain will be described with reference to FIG.

In FIG. 2, the time at which the magnetic head having a high gain is switched to the magnetic head having a low gain is A, the rising edge time of the vertical synchronizing signal is B, and the falling edge time of the vertical synchronizing signal is B. As C, the start time of the video signal is shown as D, respectively.

At time A, the switches 79 and 82 are open, and the current output type voltage comparison circuit 77 and the constant current source 84 are not operating. Immediately after time A, the reproduced burst signal has a considerably small amplitude immediately after head switching, as shown in FIG. Therefore, the current output voltage comparator 7
6 does not output the current iAT2, and the constant current I of the constant current source 83
At RC2, the detection capacitor 80 is discharged every burst gate pulse BGP. This constant current IRC2 is very small, and as shown in FIG. 2, the control voltage ACNT1 which is the charging voltage of the detection capacitor 80 hardly changes. Therefore, as shown in FIG. The signal amplitude also remains small. As is well known, the burst signal is an intermittent signal, but is shown by its envelope in FIG. 2 for the sake of clarity.

Next, the period of the vertical synchronizing signal c (from time B to
In the case of C), the burst gate pulse BGP is not output from the pulse generation circuit 65, so that the comparators 76, 7
7 and the constant current sources 83 and 84 do not operate. Therefore,
The control voltage ACNT1 is held as it is, and since there is no reproduction chroma signal during this period, there is no reproduction burst signal as shown in FIG.

Control signal VG1 after the period of the vertical synchronizing signal c
During the period when the signal is at the high level (time C to D), the switch 79 is closed and the switch 84 is set to the burst gate pulse BG.
Since it is closed every P, current output type voltage comparison circuits 76, 77
And the constant current sources 83 and 84 are all in the operating state. In this case also, since the amplitude of the reproduced signal is small, the current output type voltage comparison circuits 76 and 77 do not output the currents iAT2 and iAT1.
The detection capacitor 80 is a constant current I of the constant current sources 83 and 84.
It only discharges at RC2 and IRC1.

Here, since the discharge current IRC1 is very large, this causes the control potential AC as shown in FIG.
NT1 drops sharply, and the amplitude of the reproduced chroma signal sharply increases. Then, when the amplitude approaches a predetermined amplitude, the current output type voltage comparison circuits 76 and 77 start operating and output the currents iAT2 and iAT1 to start charging the detection capacitor 80. When the amplitude of the reproduced chroma signal reaches a predetermined amplitude, the charging / discharging of the detection capacitor 80 is balanced and the control potential ACNT1 is held as it is.

After time D, the switches 79 and 82 are again turned on.
Is opened and the current output type voltage comparison circuit 76 and the constant current source 83 operate so as to maintain the amplitude of the reproduced chroma signal at a predetermined amplitude.

In this way, a large decrease in the reproduced chroma signal amplitude caused by head switching can be compensated by time D when the video signal starts. Approximately 6H period up to the vertical sync signal c after head switching does not appear on the screen in many cases, and even if it does appear, it does not affect the screen at the bottom, so even if the amplitude of the reproduced chroma signal changes. It doesn't matter.

Next, the operation of the reproducing ACC circuit 86 of this embodiment during the period when the video signal is present will be described. It should be noted that this period is the period from time D to time E in FIG.

During this period, the switches 79 and 82 remain open, and the current output type voltage comparison circuit 76 and the current source 8 are connected.
Only 3 works. As shown in FIG. 2, since the amplitude of the reproduction burst signal has a predetermined magnitude, the charging current iAT2 and the discharging current IRC2 of the detection capacitor 80 are balanced. Further, since the charging current iAT2 is extremely small, even if noise is suddenly mixed in the reproduced chroma signal,
The control voltage ACNT1 hardly changes, and the amplitude of the reproduced chroma signal is stably maintained constant.

When reproducing the magnetic tape 50 recorded by another magnetic recording / reproducing apparatus, the magnetic heads 51 and 52 may not trace according to the shape of the recording track.

In such a case, the amplitude of the reproduction chroma signal changes gently, and the charging current iAT2 and the discharging current IRC2 having low control sensitivity can sufficiently follow this.

Next, the operation of the reproducing ACC circuit 86 of this embodiment when switching from a magnetic head having a low gain to a magnetic head having a high gain will be described. In FIG. 2, the switching time from the magnetic head having a low gain to the magnetic head having a high gain is E, the rising edge time of the vertical synchronizing signal c is F, and the falling edge time of the vertical synchronizing signal c is G. , The start time of the video signal is shown as H, respectively.

In the period from time E to F, the switches 79 and 82 are kept open as in the period from time D to E, and the current output type voltage comparison circuit 77 and the constant current source 84 do not operate. Further, due to the head switching, the amplitude of the burst signal of the reproduced chroma signal is considerably large. The current output type voltage comparison circuit 76 outputs the charging current iAT2 to charge the detection capacitor 80, but since the charging current iAT2 is sufficiently small, the control voltage ACNT1 does not rise sharply, and as shown in FIG. Hardly changes. Therefore, as shown in FIG. 2, the amplitude of the reproduced burst signal is almost kept large.

Next, the period of the vertical synchronizing signal c (from time F to
In G), the burst gate pulse BGP does not exist as in the period of the vertical synchronizing signal c which is the period of time B to C, so that the current output type voltage comparison circuits 76 and 77 and the constant current sources 83 and 84 are generated. Does not work with. Therefore, the magnitude of the control voltage ACNT1 is maintained as it is. Further, since there is no reproduction chroma signal during this period, there is no reproduction burst signal as shown in FIG.

Next, during the period from time G to H when the control signal VG1 becomes high level, the switch 79 is closed and the switch 84 is closed for each burst gate pulse BGP, so that the current output type voltage comparison circuits 76 and 77 are set. Current sources 83, 84
And are all in operation. At this time, since the amplitude of the reproduction burst signal is large, the discharge current I of the constant current sources 83 and 84 is
Charging current iAt2, iAt larger than RC2, IRC1
1 is output by the current output type voltage comparison circuits 76 and 77. Therefore, the detection capacitor 80 is charged by the large charging current iAT1, and the control voltage ACNT1
Rapidly rises and the amplitude of the reproduced chroma signal also sharply decreases. When the amplitude of the reproduced chroma signal approaches the predetermined amplitude, the charging currents iAt2 and iAt1 output from the current output type voltage comparison circuits 76 and 77 start to decrease, and when the amplitude of the reproduced chroma signal reaches the predetermined amplitude. The charging / discharging current of the detection capacitor 80 is balanced and the control voltage ACNT1 is held constant.

After time H, the switches 79 and 82 are again turned on.
Opens, and the current output type voltage comparison circuit 76 and the constant current source 83 operate to operate so as to maintain the amplitude of the reproduced chroma signal at a predetermined amplitude.

In this way, even if the amplitude of the reproduced chroma signal increases due to head switching, this is compensated by time H when the video signal starts. In addition, the above-mentioned time A to B
As in the case of the period of, the 6H period up to the vertical synchronizing signal c after the head switching is often not displayed on the screen,
Even if it appears, it is at the bottom, so even if the amplitude changes in this part, it does not affect the screen.

The above three operations are repeatedly performed, and the ACC response due to such an operation is high in the period of the control signal VG1 after head switching and low in other periods, as shown in FIG. Then, the ACC response absorbs a step in the amplitude of the reproduced chroma signal caused by the variation in the gain of the magnetic head when the head is switched, and the ACC response during the video signal reproduction is stabilized. Generally, the regenerative ACC circuit is integrated, but this embodiment is simple in that the current regenerative ACC circuit is newly provided with one current output type voltage comparison circuit and one constant current source, and two switches. It can be realized simply by adding the circuit of the configuration.

In this embodiment, the NTSC system 8 is used.
Although the description has been given by taking the millimeter video as an example, the same effect can be realized even in the PAL system only by changing the timing of the control signal. In addition, even in VTR such as VHS system and beta system,
The operation is the same as the above except that the timings of the reproduction signal processing and the control signal are different, and the present invention can be applied.

Further, in the present embodiment, the period VG1 for making the ACC circuit respond at high speed is set to 12 to 13H, but by increasing the values of the charging current and discharging current having high control sensitivity,
The period of VG1 can be shortened.

FIG. 3 is a block diagram showing a reproduction signal processing circuit of a magnetic recording / reproducing apparatus using another embodiment of the reproducing ACC circuit according to the present invention, and 90 is a pulse generating circuit.
Reference numeral 91 is a luminance signal output terminal, 92 is a chroma signal output terminal, 93 is a switch, 94 is a constant current source, 96 is a switch, 97 is a voltage comparator, 98 is a reference DC voltage source, and 99 is an SR flip-flop. Circuit, 100 is an AND gate, 101 is a pulse generation circuit, 102 is a burst amplitude detection circuit, 103 is an ACC circuit, and ACC circuit 103
The burst amplitude detecting circuit 102 is added to the reproducing ACC circuit of this embodiment. In addition, in FIG.
The same reference numerals are given to the portions corresponding to, and the description overlapping with the embodiment shown in FIG. 1 will be omitted.

This embodiment is different from the embodiment shown in FIG. 1 in that, instead of the constant current source for high speed discharge, when the amplitude of the burst signal of the reproduction chroma signal is reduced at the time of switching the magnetic head, it is forced. The point is that the gain of the reproduction ACC circuit is increased.

In this embodiment, as shown in FIG. 3, a switch 96, a voltage comparator 97, a reference DC voltage source 98, an SR flip-flop circuit 99, an AND circuit are added to the regenerative ACC circuit 86 shown in FIG. Gate 100 and pulse generation circuit 1
1 has a burst amplitude detection circuit 102, and the pulse generation circuit 90 is the pulse generation circuit 6 in FIG.
Unlike 5, the vertical sync signal c and control signals VG2 and VG3 described later are generated and output in addition to the burst gate pulse BGP and the control signal VG1. The current value IRC3 of the constant current source 94 that discharges the detection capacitor 80 is the control voltage ACNT2 (charging voltage of the detection capacitor 80) of the VCA67 necessary for compensating for the maximum attenuation of the reproduction amplitude expected when the head is switched. It is a value that only causes the voltage drop to occur during the vertical synchronizing signal period.

Next, the operation of this embodiment will be described with reference to FIG. However, here, the case of an 8 mm video of the NTSC system having a luminance / chroma separation output (so-called S output) will be described as an example.

First, the operation when switching from a magnetic head having a high gain to a magnetic head having a low gain will be described.
In FIG. 4, the time when the magnetic head having a high gain is switched to the magnetic head having a low gain is J, the rising edge time of the vertical synchronizing signal c is K, and the falling edge time of the vertical synchronizing signal c is K. As L, the start time of the video signal is shown as M, respectively.

At time J, the switches 79 and 93 remain open, and the current output type voltage comparison circuit 77 and the constant current source 9 are connected.
4 does not work. Immediately after the time J, the amplitude of the burst signal of the reproduced chroma signal becomes considerably small due to head switching. Therefore, the current output type voltage comparison circuit 76 does not output the charging current iAT2, and the detection capacitor 80 is only discharged by the constant current IRC2 of the constant current source 83. However, since this constant current IRC2 is very small, as shown in FIG. 4, the control voltage ACNT2 hardly changes, and the amplitude of the burst signal of the reproduced chroma signal remains small and is output from the chroma de-emphasis circuit 72. It As is well known, this reproduction burst signal is an intermittent signal.
Then, for the sake of clarity, the envelope is shown.

In the period from the time J to the time K of the rising edge of the vertical synchronizing signal c, the above operation is performed,
At the same time, the burst amplitude detection circuit 102 operates. This operation will be described with reference to FIG. However, FIG. 5 is an enlarged view of the vicinity of the period from the time J to K shown in FIG. 4, and the same reference numerals are given to the signals corresponding to FIG.

As shown in FIG. 5, the control signal VG2 generated and output by the pulse generation circuit 90 is a high level signal representing the period from time J to K, and the switch 9 during this period.
6 closes. Therefore, the switch 96 is open until just before the head switching time J, and the output signal e of the voltage comparator 97 is at the low level as shown in FIG. In the period from time J to K, the amplitude of the burst signal becomes small and does not exceed the reference potential Vref2 of the reference DC power source 98, and the output signal e of the voltage comparator 97 remains low level. The output signal e of the voltage comparator 97 is the set input of the SR flip-flop circuit 99, and
The SR flip-flop circuit 99 is reset by the vertical synchronizing signal c, but the output signal e of the voltage comparator 97 remains at the low level, so that it is just before the time J and during the time J to K. , As shown in FIG.
The inverted output f of the flip-flop circuit 99 is at high level.

The inverted output f of the SR flip-flop circuit 99 and the control signal VG3 generated and output by the pulse generation circuit 90 are supplied to the AND gate 100. This control signal VG3 is, as shown in FIG. 5, a control signal VG2.
Rises 1H behind the rising edge of the control signal V
It is a high level signal that falls at the same time as the falling edge of G2. Therefore, as shown in FIG. 5, the output signal g of the AND gate 100 becomes high level only during the same period as the control signal VG3. Output signal g of this AND gate 100
Is supplied to the pulse generation circuit 101 together with the vertical synchronization signal c, and the control signal VG4 which is at the high level during the time period K to L following the time period J to K is generated and output. The control signal VG4 controls the switch 93 in the ACC circuit 103.

During the period from time K to L which is the period of the vertical synchronizing signal c, since the control signal VG4 is at the high level, the switch 93 is closed and the detection capacitor 80 is discharged by the discharge current IRC3 of the constant current source 94. As shown in FIG. 4, the control voltage ACNT2 of the VCA 67, which is the charging voltage of the detection capacitor 80, suddenly drops. This drop is
As described above, this is an amount corresponding to the gain increase amount of the VCA 67 necessary for compensating for the maximum attenuation amount of the amplitude of the reproduced chroma signal expected when the head is switched.

Here, when the amount of decrease in the amplitude of the burst signal of the reproduced chroma signal generated at the head switching time J is equal to the expected maximum value, at the time L of the falling edge of the vertical synchronizing signal c, the reproduced bar is generated. The amplitude of the strike signal has a predetermined value as shown in FIG. After that, in the period of time L to M, the switch 79 is closed and the current output type voltage comparison circuit 77.
However, since the burst signal has a predetermined amplitude, the charging current iAT1 is hardly output,
The amplitude of the burst signal of the reproduced chroma signal is held at a predetermined value.

Next, when the amount of decrease in the amplitude of the burst signal of the reproduced chroma signal generated at the head switching time J is smaller than the expected maximum value, at time L, the VCA 67 is reached.
Is too high and is higher than a predetermined value. At this time, the current output type voltage comparison circuit 77 outputs the large charging current iAT1 to charge the detection capacitor 80, rapidly increase the control voltage ACNT2, and reproduce too much during the period from time L to time M. The amplitude of the burst signal of the chroma signal is suppressed to a predetermined amplitude.

During time K to L, which is the period of the vertical synchronizing signal c, since the burst gate pulse BGP does not exist, the current output type voltage comparison circuits 76 and 77 and the constant current source 83 do not operate, and the burst amplitude detection circuit. The operation of ACC circuit 103 is defined by the operation of only 102.

After time M, the switch 79 is opened again, and the current output type voltage comparison circuit 76 and the constant current source 83 operate so as to maintain the amplitude of the reproduction burst signal at a predetermined amplitude.

In this way, the decrease in the amplitude of the reproduced chroma signal caused by the head switching can be compensated by the time M when the video signal starts. The approximately 6H period up to the vertical sync signal c after head switching does not appear on the screen in many cases, and even if it appears, it is at the bottom, so even if there is a change in the amplitude of the chroma signal during that period, it will appear on the screen. It has no effect.

Next, the operation of this embodiment will be described in the period from time M to N when the video signal is present.

During this period, the switch 7 shown in FIG.
9, 93 are open, and only the current output type voltage comparison circuit 76 and the constant current source 83 operate. As shown in FIG. 4, since the amplitude of the reproduction burst signal has a predetermined magnitude, it slightly exceeds the reference voltage Vref1 of the reference DC voltage source 78 and is output from the current output type voltage comparison circuit 76. Charging current iAT2 of detection capacitor 80 and constant current source 83
Is in equilibrium with the discharge current IRC2. Then, as described above, since the current value of the charging current iAT2 is extremely small,
Even if noise is suddenly mixed in the reproduced chroma signal, the control voltage ACNT1 hardly changes, and the amplitude of the reproduced chroma signal is stably maintained constant.

When reproducing a magnetic tape recorded by another magnetic recording / reproducing apparatus, the reproducing head may not trace according to the shape of the recording track. In such a case, the amplitude of the burst signal of the reproduction chroma signal changes gently, and the charge current iAT2 and the discharge current I with low control sensitivity are low.
Even RC2 can follow sufficiently.

Next, the operation of this embodiment when switching from a magnetic head having a low gain to a magnetic head having a high gain will be described. In FIG. 4, the time when the magnetic head having a low gain is switched to the magnetic head having a high gain is N, and the time of the rising edge of the vertical synchronizing signal c is P.
The time of the falling edge of the vertical synchronizing signal c is shown as Q, and the start time of the video signal is shown as R.

In this case, in the period from time N to P, as in the period from time M to N, the switches 79 and 93 are kept open and the current output type voltage comparison circuit 77 and the constant current source 84.
And does not work. At the head switching time N, the amplitude of the burst signal of the reproduced chroma signal becomes considerably large. The current output type voltage comparison circuit 76 outputs the charging current iAT2 to charge the detection capacitor 80, but since this charging current iAT2 is not so large as to sharply increase the control voltage ACNT2, as shown in FIG. , The control voltage ACNT2 hardly changes. Therefore, as shown in FIG. 4, the amplitude of the burst signal of the reproduced chroma signal is output as it is.

At times P to Q during the period of the vertical synchronizing signal c, the burst gate pulse BGP does not exist and the current output type voltage comparing circuit does not exist, as at the times K to L during the period of the vertical synchronizing signal c. Neither 76 nor 77 nor the constant current source 83 operate.

Next, the operation of the burst amplitude detection circuit 102 in the period from time N to P will be described with reference to FIG. However,
FIG. 6 is an enlarged view of the vicinity of times N to P in FIG. 4, and the signals corresponding to those in FIG. 3 are designated by the same reference numerals.

Until the head switching time N, the switch 96 is open, and the reproduction burst signal is not input. Therefore, as shown in FIG.
Is a low level. During the period from time N to P, the switch 96 is closed and the detection output d of the reproduction burst signal is supplied to the voltage comparator 97. The amplitude of the reproduction burst signal is large and exceeds the reference potential Vref2 of the reference DC voltage source 98, and the voltage comparator 97 outputs a high-level pulse e during the reproduction burst signal as shown in FIG. The SR flip-flop circuit 99 is set by this pulse e, and the vertical synchronizing signal c is not supplied during the period from time N to P. Therefore, as shown in FIG. 6, the SR flip-flop circuit 99 is inverted. The output f becomes low level, and the output signal g of the AND gate 100 becomes low level. Therefore,
From the pulse generation circuit 101, as shown in FIG.
The level control signal VG4 is generated and output.

Since the control signal VG4 is at the low level at the time P to Q during the period of the vertical synchronizing signal c, the switch 93 is opened and the control voltage ACNT2 is held constant as shown in FIG.

Time Q when the control signal VG1 is at high level
During the period from to R, the switch 79 is closed and the current output type voltage comparison circuits 76 and 77 and the constant current source 83 are all in the operating state. At this time, since the amplitude of the burst signal of the reproduction chroma signal is large, the charging current iAT1 larger than the discharging current IRC2 of the constant current source 83 is output from the current output type voltage comparison circuit 77, and the detection capacitor 80 is charged thereby. .. Therefore, as shown in FIG. 4, the control voltage ACNT
2 rises rapidly and the amplitude of the reproduced chroma signal also decreases rapidly.

When the amplitude of the burst signal of the reproduced chroma signal approaches a predetermined amplitude, the current output type voltage comparison circuits 76, 7
The charging currents iATC2 and iATC1 output from 7 begin to decrease. Then, when the amplitude of the reproduction burst signal reaches a predetermined amplitude, the charging / discharging current in the detection capacitor 80 is balanced and the control voltage ACNT2 is stabilized at a constant level.

After the time R, the switches 79 and 93 are turned on again.
Is open, and the current output type voltage comparison circuit 76 and the constant current source 83 operate so as to maintain the amplitude of the reproduction burst signal at a predetermined amplitude.

In this way, the increase in the amplitude of the reproduced chroma signal caused by the head switching is caused by the time R at which the video signal starts.
Will be compensated by. Similar to the period from time J to K, the approximately 6H period after the head switching until the vertical synchronizing signal c does not appear on the screen in many cases, and even if it appears, it is the lowest part, so the reproduced chroma signal in this period. The change in the amplitude of does not affect the screen.

In this embodiment, the above three operations are repeated.

As described above, the circuit for detecting the amplitude of the reproduction burst signal at the time of switching the head and the ACC circuit 103
By installing a high-speed charging circuit and a high-speed discharging circuit according to the output of this amplitude detection circuit, the amplitude difference of the reproduced chroma signal caused by the variation of the gain of the magnetic head during head switching is absorbed, and the response during the video signal reproduction is absorbed. It is possible to realize a stable reproduction ACC circuit. Generally, the reproduction ACC circuit is integrated, and these circuits can be integrated very easily.

In this embodiment, the NTSC system 8 is used.
Although the description has been given by taking the millimeter video as an example, the same effect can be realized even in the PAL system only by changing the timing of the control signal. In addition, even in VTR such as VHS system and beta system,
The operation of the reproduction ACC circuit is the same except that the timings of the reproduction signal processing and the control signal are different, and the present invention can be applied.

FIG. 7 is a reproduction AC which is the embodiment shown in FIG.
FIG. 3 is a circuit diagram showing a specific example in which a circuit for improving the stability of circuit operation is added to the C circuit 86, in which 110 is a power supply terminal, 111 is a reproduction burst signal input terminal, and 112 is a burst gate. Pulse BGP input terminal, 113 input terminal of control signal VG1, 114 output terminal of control voltage ACNT1 to VCA67, 115 voltage source, 116 inverter, 117 reference DC voltage source, Q1 to Q16 transistors , C1 are capacitors, and I1 to I4 are constant current sources, and the parts corresponding to those in FIG. Here, the current values IRC1 and IRC of the constant current sources 5 and 6
2 is as described in FIG.

In FIG. 7, the reproduction burst signal is input from the input terminal 111, is supplied to the clamp circuit composed of the transistor Q1, the constant current source I24, the transistor Q2, etc. via the clamp capacitor C1, and the burst signal is supplied. The lower side of the burst signal waveform is clamped to a constant potential during the period of the burst signal. The clamped reproduction burst signal is passed through the resistor R1 and further to the transistor Q3 and the constant current source I.
It is supplied to the bases of the transistors Q4 and Q8 via an emitter follower constituted by 3 and 3.

Transistors Q4 and Q5, constant current source I2,
The transistors Q16, Q6, the transistor Q7 of 5 times size, and the resistors R2, R3 constitute the current output type voltage comparison circuit 77 of FIG. 1 having a large output current with the reference voltage V0, and the control signal VG1 from the input terminal 113. Only works for a period. Further, the transistors Q8 and Q9, the constant current source I1,
The transistors Q10 and Q11 and the resistors R4 and R5 configure the current output type voltage comparison circuit 76 of FIG. 1 in which the reference voltage is V0 and the output current is small.

The transistor Q2 corresponds to the switch 75 of FIG. 1, and the transistors Q14 and Q15 are respectively shown in FIG.
Of the switches 82 and 81. Further, the transistor Q16 corresponds to the switch 79 in FIG.

First, when the control signal VG1 is low level, that is, when the video signal appears on the screen 13H or more after the falling edge of the vertical synchronizing signal, the transistor corresponding to the switch 79 in FIG. Since Q16 is turned off, transistor Q6, and therefore transistor Q7
No collector current flows through. The collector current of the transistor Q11 charges the detection capacitor 80 through the current amplification circuit composed of the resistor R6 and the transistors Q12 and Q13. FIG. 8 shows the relationship between the charging current iAT and the amplitude of the clamped burst signal.

As is well known, the transistors Q8 and Q9 forming the differential pair are about 260 m above and below the reference potential V0.
At V each collector current saturates. Here, the resistor R6
Assuming that there is no charge current, the charging current iAT is shown by a broken line in FIG. By providing the resistor R6, the potential difference across the resistor R6 is about 0.7 V, that is, the transistor Q.
The current amplifier circuit does not operate until 12 is turned on, and the collector current of the transistor Q11 becomes the charging current iAT as it is. This is shown by the solid line in FIG.

If the resistance value of the resistor R6 is R,
The amplitude of the burst signal and the charging current iAT maintain the linearity until the charging current iAT reaches about 0.7 / R, and when the amplitude of the burst signal becomes larger, the characteristics of the broken line in FIG. 8 come closer. In particular, in the range where the linearity is maintained, the amount of change in the charging current iAT with respect to the burst signal, that is, the control sensitivity for the VCA 67 is lower than that shown by the broken line.
The maximum current value becomes smaller than the broken line by the amount of current flowing through the resistor R6.

Here, the transistor Q forming the differential pair
FIG. 8 shows the waveform of the burst signal having a predetermined amplitude when the base potential of No. 8 is VA. When the amplitude of the burst signal is a predetermined amplitude, the base potential of the transistor Q8 is set to VA so that the charging current iAT maintains linearity. By doing so, the control sensitivity to the detection capacitor 80 can be lowered during the period when the video signal appears on the screen and the amplitude fluctuation should originally be small, and the video signal suddenly gets mixed into the reproduced chroma signal. The stability of the reproduction ACC circuit is improved against noise and the like.

Even if the burst signal has a predetermined amplitude, the charging current iAT slightly flows to charge the detection capacitor 80. The charging current iAT is balanced with the discharging current IRC2 of the constant current source 83 during the burst gate pulse BGP period, and the control voltage ACNT1 is held constant.

During the period when the control signal VG1 is at high level,
That is, in the period from the falling edge of the vertical synchronizing signal c to the start of the video signal, the transistor Q16 is turned on and the current output voltage comparator 77 having a large output current composed of the transistors Q4, Q5, etc. operates. As a result, it is only necessary to extract a large charging current from now on. Therefore, when the amplitude of the reproduction burst signal is small, the consumption current is reduced. That is, in order to reduce the collector current flowing through the transistor Q4, the current value of the constant current source I2 is reduced, and instead, current amplification is performed by the current mirror circuit composed of the transistors Q6 and Q7. Here, the current is amplified about 5 times, and the current mirror circuit formed by the transistors Q12 and Q13 is also amplified about 2 times. Therefore, about 10 times is amplified as a whole.

FIG. 9 shows the relationship between the charging current iAT and the amplitude of the clamped burst signal when the control signal VG1 is at the high level. At the same time, the control signal VG shown in FIG.
The charging current iAT when 1 is low level is shown by a broken line,
A burst signal having a predetermined amplitude is also shown.

First, it is assumed that the burst signal has a predetermined amplitude. In this case, the linear range of the charging current with respect to the amplitude of the burst signal becomes narrower than in the example shown in FIG. This is because it is important to absorb a large amplitude step difference in the reproduced chroma signal due to head switching during this period. Of course, when the amplitude of the reproduction burst signal is a predetermined amplitude, the current value of the constant current source I2 is set so that the sum of the charging current iAT and the discharging currents IRC1, IRC2 is balanced.

When the amplitude of the burst signal is smaller than a predetermined value, the collector currents of the transistors Q5 and Q9 are minute, and the charging current to the detection capacitor 80 is small as shown in FIG. During the burst gate pulse BGP period, the constant current sources 84 and 83 are turned on, and the current value IRC
The detection capacitor 80 is discharged by the sum of the discharge currents of 1 and IRC2, and the control voltage ACNT1 drops sharply. As a result, as the reproduction ACC circuit, the amplitude of the burst signal is quickly amplified to a predetermined amplitude.

When the amplitude of the burst signal is larger than a predetermined value, the collector currents of the transistors Q5 and Q9 increase, and as shown in FIG. 9, the charging current to the detection capacitor 80 also rapidly increases. Burst gate pulse BGP
During the period, the constant current sources 84 and 83 are turned on, and the current value IRC
The detection capacitor 80 is discharged by the sum of the charging currents of 1 and IRC2. For this reason, the charge amount becomes larger, the control voltage ACNT1 rises sharply, and as a regenerative ACC circuit,
The amplitude of the burst signal is quickly suppressed to a predetermined amplitude.

[0102]

As described above, according to the present invention,
A charging / discharging circuit is added to a conventional ACC circuit composed of a voltage control amplifier and an ACC detecting circuit by a charging / discharging circuit, and one of these charging / discharging circuits is used as a high-speed detection circuit that operates only immediately after a vertical synchronizing signal, and the other is used. By using a low-speed detection circuit that always operates, a large change in the amplitude of the reproduced chroma signal that occurs when the head is switched is quickly absorbed to suppress color flicker on the reproduced screen, and the amplitude of the reproduced chroma signal in the field is reduced. Can be extremely stably held constant, and the superimposed noise components can be sufficiently averaged to obtain a reproduced chroma signal having a high color S / N.

Further, the present invention has a circuit configuration suitable for integration, and does not increase the number of external parts outside the LSI.

[Brief description of drawings]

FIG. 1 is a block diagram showing a magnetic recording / reproducing apparatus using an embodiment of a reproducing ACC circuit according to the present invention.

FIG. 2 is a waveform diagram showing signals of respective parts in FIG.

FIG. 3 is a block diagram showing a magnetic recording / reproducing apparatus using another embodiment of the reproducing ACC circuit according to the present invention.

FIG. 4 is a waveform diagram showing signals of respective parts in FIG.

FIG. 5 is a waveform diagram showing each signal in FIG. 3 in more detail.

FIG. 6 is a waveform diagram showing each signal in FIG. 3 in more detail.

FIG. 7 is a circuit diagram showing a specific circuit configuration of a reproduction ACC circuit which is the embodiment shown in FIG.

FIG. 8 is a waveform diagram showing signals of respective parts in FIG.

FIG. 9 is a waveform chart showing signals of respective parts in FIG.

FIG. 10 is a block diagram showing a magnetic recording / reproducing apparatus including a conventional reproducing ACC circuit.

11 is a characteristic diagram showing circuit characteristics of the conventional reproduction ACC circuit in FIG.

[Explanation of symbols]

 65 pulse generation circuit 76 current output voltage comparator 77 current output voltage comparator 78 reference DC voltage source 79 switch 80 detection capacitor 83, 84, 94 constant current source 97 voltage comparator 99 SR flip-flop circuit 101 pulse generation Circuit 102 Burst signal amplitude detection circuit R6 resistor Q12, Q13 transistor

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Takashi Kurihara 5-22-1, Kamisuihonmachi, Kodaira-shi, Tokyo Inside Hitachi Microcomputer System Co., Ltd.

Claims (4)

[Claims] 1. A reproducing ACC circuit for compensating for amplitude fluctuations of a chroma signal of a color video signal alternately reproduced by a unit period from a magnetic tape by using at least two magnetic heads. The first ACC response speed is during one or all of the periods from the trailing edge of the vertical synchronizing signal of the color video signal to the start of the next video signal portion, and the second ACC response speed during the other period 2. A reproduction ACC circuit characterized in that ACC response speeds are set respectively, and first ACC response speed> second ACC response speed. 2. The period 1 of the unit period in which the amplitude of the burst signal in the chroma signal is smaller among the unit periods which are reproduced by the different magnetic heads and which start in the vertical blanking period, A regenerative ACC circuit, wherein a gain of a variable gain amplifier for amplifying the chroma signal is increased at the first ACC response speed. 3. The unit according to claim 2, wherein the amplitude of the burst signal is detected for each period from the switching time point of the magnetic head to the leading edge of the vertical synchronizing signal and reproduced by the different magnetic head. A reproducing ACC circuit characterized by determining a unit period having a smaller amplitude of the burst signal in the period. 4. A reproducing ACC circuit, wherein at least two magnetic heads are used to compensate the amplitude fluctuation of a chroma signal of a color video signal which is alternately reproduced from a magnetic tape for a unit period. When the control voltage is low, the gain is high, the gain for amplifying the chroma signal is variable, the capacitor, and the detection sensitivity is substantially zero when the amplitude of the burst signal of the chroma signal is a preset predetermined value. , When the amplitude of the burst signal is in the first range from the predetermined value to a value slightly larger than the predetermined value, a current is output with a low first detection sensitivity, and the amplitude of the burst signal exceeds the first range. When it exceeds, it outputs a current with a high second detection sensitivity, an amplitude detection means for making each of these currents a charging current for the capacitor, and a discharging means for discharging the capacitor with a constant current. Play ACC circuit according to claim charging voltage of capacitor be the gain control voltage of the amplifier.