JPH05315934A - Bipolar data signal generator - Google Patents

Abstract

PURPOSE:To provide a device improved so as to execute stable operation without requiring adjustment corresponding to an input level in respect to a bipolar data signal generator for generating a bipolar data signal. CONSTITUTION:The device for generating a bipolar data signal is provided with a differential amplifier circuit l constituted of two transistors(TRs), a high level peak value detecting means 2 for detecting the high level peak value of a data signal inputted to the circuit 1, a low level peak value detecting means 3 for detecting the low level peak value of a data signal inputted to the circuit 1, and a center level output means 4 for obtaining a center level from the output values of the means 2, 3 and outputting the obtained center level as a reference level for the circuit 1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bipolar data signal generator which outputs a data signal and two signals whose signal levels are inverted from a digital data signal.

[0002]

2. Description of the Related Art In a circuit for processing a digital data signal, the circuit is often driven by two series signals, that is, a data signal and a signal in which the polarities of the data signal are inverted. When only a data signal is input to such a circuit input, it is necessary to generate a signal whose polarity is inverted from that of the obtained data signal.

A conventional example of a device for generating a bipolar data signal from a data signal will be described with reference to FIG. In FIG. 4, 61 and 62 are transistors, 63 is a constant current circuit, 64 and 65 are resistors, and these constitute a differential amplifier.

Further, 66 is a temperature compensation circuit, and 67 is a variable resistor. The voltage corresponding to the high level and the low level center level of the data signal input to the transistor 61 is output from the contact of the variable resistor 67, and the transistor 62
Entered in.

Therefore, the data signal DATA is differentially amplified by the transistors 64 and 65 with the voltage input to the transistor 62 via the variable resistor 67 as a reference voltage, and the polarities of the loads of the resistors 64 and 65 are inverted. A data signal is generated.

[0006]

As described above, in the conventional bipolar data signal generator, the temperature-compensated voltage is supplied to the variable resistor for obtaining the reference voltage of the differential amplifier through the temperature compensation circuit. Was there. The data signal input to the bipolar data signal generation circuit is a signal that has passed through various circuits.

Therefore, it is difficult to perform temperature compensation in the temperature compensation circuit on all input data signals. Further, the level of the input data signal changes depending on the loss due to the length of the transmission line through which the input data signal is transmitted, the difference in the output level of the preceding circuit, and the like. Therefore, it is necessary to adjust the variable resistor so as to have the center value between the high level and the low level according to the input level of the input data signal.

It is an object of the present invention to provide a bipolar data signal generator which is improved so as to operate stably without requiring adjustment corresponding to the input data signal level.

[0009]

Means adopted by the present invention for solving the above-mentioned problems will be described with reference to FIG. FIG. 1 shows the principle of the present invention. A device for generating a bipolar data signal, comprising two transistors 11, 1
2, a differential amplifier circuit 1 and the differential amplifier circuit 1
High-level peak value detecting means 2 for detecting a high-level peak value of a data signal input to the differential signal, and the differential amplifier circuit 1
A low-level peak value detecting means 3 for detecting a low-level peak value of a data signal input to the output signal, an output value from the high-level peak value detecting means 2 and an output value from the low-level peak value detecting means 3. Center level output means 4 for obtaining a center level and outputting it as a reference level of the differential amplifier circuit 1.

[0010]

The high level peak value detecting means 2 detects the high level peak value of the input data signal. Further, the low level peak value detecting means 3 detects the low level peak value of the input data signal.

The center level output means 4 outputs the center value between the detection value detected by the high level peak value detection means 2 and the detection value detected by the low level peak value detection means 3. The center value output from the center level output means 4 is input to the differential amplifier 1 as a reference voltage.

As described above, the high level peak value and the low level peak value of the input data signal are detected, and the center level between them is input to the differential amplifier as the reference voltage. Even if the level changes, the reference voltage to the differential amplifier always becomes the center level value of the high level and the low level of the input data signal, and the stable operation is possible without the need for adjustment corresponding to the input data signal level. be able to.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to FIGS. FIG. 2 is a configuration diagram of an embodiment of the present invention, and FIG. 3 is an explanatory diagram of high level low level center level of the embodiment.
In FIG. 2, the differential amplifier circuit 1, the high level peak value detection means 2, the low level peak value detection means 3 and the center level output means 4 are as described in FIG.

In the embodiment, the differential amplifier circuit 1 is composed of two transistors 11 and 12, a constant current circuit 13 and resistors 14 and 15. Further, the high level peak value detecting means 2 includes a differential amplifier 21, a diode 22,
It is composed of a resistor 23 and a capacitor 24.

Further, the low level peak value detecting means 3 also includes a differential amplifier 31, a diode 32, a resistor 33 and a capacitor 3.
It is composed of 4. The center level output means 4 includes resistors 41 and 4
It consists of two. Further, 51 to 53 are transistors and 54 to 56 are resistors, which buffer-amplify the input data signals and input them to the differential amplifier circuit 1, the high level peak value detecting means 2 and the low level peak value detecting means 3, respectively. is doing.

When a data signal is input to the transistors 51 to 53, the transistors 51 to 53 turn on / off the current in response to the high level and the low level of the data signal. Therefore, the emitter potential of the transistor 51 is
It changes with the potential corresponding to the high level "H" and the low level "L" in FIG.

In the high level peak value detecting means 2, when the emitter potential of the transistor 52 becomes high level, current flows through the resistor 23 through the diode 22 and the potential generated in the resistor 23 is held by the capacitor 24. .. The high level peak value held in the capacitor 24 is the differential amplifier 21.
It is buffer-amplified by and output to the center level output means 4.

In the low level peak value detecting means 3,
When the emitter potential of the transistor 51 becomes low level, a current flows through the resistor 32 through the diode 32, and the potential generated in the resistor 33 is held by the capacitor 34. The low-level peak value held by the capacitor 34 is the differential amplifier 31.
It is buffer-amplified by and output to the center level output means 4.

The high level peak value and the low level peak value output from the differential amplifiers 21 and 31 are the resistance 4
1 and 42 to get the central value and to obtain the transistor 1
2 is input as a reference value. Therefore, the resistors 14 and 15 connected to the collectors of the transistors 11 and 12 generate an input data signal and a data signal whose polarity is inverted.

The reference level to the differential amplifier circuit 1 can be changed by adjusting the resistance values of the resistors 41 and 42 of the center level output means 4, and the reference level is output by changing the reference level. The duty ratio of the data signal can be changed.

In the embodiment, the center level output means is 2
The center value was obtained by changing the resistance value of each resistor, but by changing the two resistors to a variable resistor and outputting the center level from the contact of the variable resistor, the level value can be easily set. Can be adjusted.

[0022]

As described above, according to the present invention, the following effects can be obtained. Since the high level peak value and the low level peak value of the input data signal are detected and the center level between them is input to the differential amplifier as the reference voltage, the difference does not occur even if the level of the input data signal changes. The reference voltage to the dynamic amplifier always becomes the center level value of the high level and the low level of the input data signal, and the stable operation can be performed without requiring the adjustment corresponding to the input data signal level.

[Brief description of drawings]

FIG. 1 is a principle diagram of the present invention.

FIG. 2 is a configuration diagram of an embodiment of the present invention.

FIG. 3 is an explanatory diagram of a high level low level center level of the embodiment.

FIG. 4 is a configuration diagram of a conventional example.

[Explanation of symbols]

1 differential amplifier circuit 2 high level peak value detection means 3 low level peak value detection means 4 center level output means 11, 12, 51, 52, 53, 61, 62 transistor 13, 63 constant current circuit 14, 15, 23, 33, 41, 42, 54, 55, 5
6,64,65 resistance 21,31 differential amplifier 22,32 diode 24,34 capacitance 66 temperature compensation circuit 67 variable resistor

Claims (3)

[Claims] 1. A device for generating a bipolar data signal, comprising: a differential amplifier circuit (1) composed of two transistors (11, 12); and an input to the differential amplifier circuit (1). High level peak value detecting means (2) for detecting a high level peak value of a data signal to be generated, and a low level peak for detecting a low level peak value of the data signal input to the differential amplifier circuit (1) A central level is obtained from the output values from the value detecting means (3), the high level peak value detecting means (2) and the low level peak value detecting means (3), and the differential amplifier circuit ( A bipolar data signal generator, comprising: a central level output means (4) for outputting as a reference level of 1). 2. The high level peak value detecting means (2) and the low level peak value detecting means (3) are constituted by a circuit in which a diode is connected in series with a resistor and a capacitor in parallel. Item 2. A bipolar data signal generator according to Item 1. 3. The bipolar data signal generator according to claim 1, wherein the center level output means (4) is composed of a variable resistor.