JPH05308385A - Automatic frequency control method of receiver - Google Patents

Abstract

PURPOSE:To perform automatic control so that a normal intermediate frequency signal is obtained by setting the intermediate frequency signal to a normal frequency, comparing it with the logical value at the time of the reception of the modulated signal of specific data and finding frequency correction data, and controlling the frequency of a local oscillation signal. CONSTITUTION:The intermediate frequency signal from a mixer 21 is supplied to a frequency detector 23 to convert the input signal frequency into a voltage and obtain a detection output, which is supplied as an 8-bit digital signal to a microprocessor 25 through an A/D converter 24. Further, the intermediate frequency signal level from the mixer 21 is detected by a carrier detecting circuit 26 and a carrier sense signal which turns ON when the input level is higher than a carrier sense level and turns OFF when not is supplied to the processor 25. Once the sensor signal turns OFF, the end of the data received signal is judged and a signal modulated with next specific data is expected; and frequency setting data is set to a designed standard value and the detection of the turning-ON state of the sensor signal is expected. Thus, secure frequency control can be performed even when a burst signal with small time width is received.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention is applicable to, for example, FM receivers and G receivers.
The present invention relates to an automatic frequency control method for MSK receivers and the like.

[0002]

2. Description of the Related Art A conventional automatic frequency control device shown in FIG. 7 is known. This is because the received signal is mixed with the local oscillation signal from the voltage controlled local oscillator 2 in the mixer 1 to be converted into an intermediate frequency signal, the intermediate frequency signal is converted into a voltage signal in the frequency detector 3, and the voltage signal is detected. The detected output is output as an output and is smoothed by the time constant circuit 4, and the smoothed detected output, that is, the voltage signal is supplied to the voltage controlled local oscillator 2 to control the frequency of the local oscillation signal from the oscillator 2. It was like this. That is, according to this conventional control method, the detection output is smoothed so that the frequency difference between the received signal and the local oscillation signal from the voltage controlled local oscillator 2, that is, the frequency of the intermediate frequency signal, always matches the center frequency of the frequency detector 3. This is a feedback control method of supplying the converted voltage signal to the voltage controlled local oscillator 2 as an error voltage.

However, in this conventional apparatus, a time delay occurs because the detection output is smoothed by using a time constant circuit. For this reason, for example, when a burst-shaped signal having a small time width is received as a received signal. There was a problem that automatic frequency control was not in time and normal reception could not be performed.

Therefore, the present applicant has previously filed an invention that should solve such a problem. (Japanese Patent Application No. 3-1313
No. 93) In this prior application, as shown in FIG. 8, a received signal is mixed with a local oscillation signal from a PLL (phase locked loop) frequency synthesizer 12 which is a local oscillator in a mixer 11 and converted into an intermediate frequency signal. There is. The intermediate frequency signal from the mixer 11 is supplied to the frequency detector 13 to convert the frequency of the input signal into a voltage, and the voltage signal level is set to A
An / D (analog / digital) converter 14 converts the signal into an 8-bit digital signal and supplies the digital signal to the microprocessor 15. The microprocessor 15 compares the digital signal from the A / D converter 14 with a preset theoretical value to obtain frequency correction data,
The frequency correction data is used as the PLL frequency synthesizer 1
It supplies to 2. That is, since the reception signal has specific data (a kind of dummy data) consisting of "1" continuous data and "0" continuous data prior to the information, the microprocessor 15 receives a digital signal when receiving this specific data. And theoretical value VHR of preset specific data
(Theoretical value of continuous data of "1") and VLR (theoretical value of continuous data of "0") are compared and calculated, and their errors ΔVH, ΔV
L is calculated, and the correction amount of the local oscillation frequency necessary to minimize this error, that is, the frequency error of the intermediate frequency signal is calculated. Then, the calculation result is supplied to the PLL frequency synthesizer 12 as frequency correction data.

As described above, when the specific data is received, the theoretical value of the digital signal and the specific data are compared and calculated to obtain the frequency correction data, and the frequency correction data is supplied to the PLL frequency synthesizer 12 so that the intermediate frequency signal becomes normal. By controlling the frequency so that there is no time delay, it is possible to reliably perform automatic frequency control even if a burst-shaped signal having a small time width is received as a reception signal.

Further, this prior application is provided with a carrier detection circuit for detecting the intermediate frequency signal level output from the mixer 11, and when the intermediate frequency signal level exceeds a preset carrier sense level VCS, the carrier detection circuit It is also possible to make the reception detection of specific data more reliable by outputting the carrier sense signal and supplying it to the microprocessor 15.

In this case, the microprocessor 15 is shown in FIG.
The processing shown in will be performed. That is, the frequency setting data f is set to the design standard value fST. Then, it waits for the carrier sense signal from the carrier detection circuit to turn on, and when the carrier sense signal turns on, the timer T1 is started, and when the time T1 has elapsed, the detection signal level Vt1 (A / D converter 14) at that time is started. The digital value of). That is, the received signal as shown in FIG. 10B is obtained for the transmitted signal shown in FIG.
As shown in (c), the carrier sense signal turns on at time tA.
Then, at time tB in the α section (when data “1” is being received) after the time T1 has elapsed from time tA, at time tB in FIG.
As shown in (d), the detection signal level Vt1 will be measured.

Then, the difference between the level Vt1 and the theoretical level VHR, that is, ΔVH, is obtained.

Then, the timer T2 is started, and when the time T2 has elapsed, the detection signal level Vt2 at that time is measured. That is, at the time tC in the β section (receiving the data “0”) after the time T1 has elapsed from the time tB, the time tC in FIG.
As shown in (d), the detection signal level Vt2 will be measured.

Then, the difference between the level Vt2 and the theoretical level VLR, that is, ΔVL is obtained.

Subsequently, by (ΔVH + ΔVL) / 2, ΔV
Ask for. Then, the frequency correction data Δf is obtained by calculating ΔV × K (coefficient), the correction data Δf is added to the current frequency data f0 to obtain the frequency setting data f, and the data f is set as new frequency data f0.

After that, when the carrier sense signal is turned off, it is judged that the data reception is completed, and the ON detection of the carrier sense signal is awaited in preparation for the next reception of the signal modulated with the specific data.

By thus controlling the frequency correction of the local oscillation signal when the carrier sense signal is turned on, dummy data "1" and "0" transmitted prior to the information data are received. Since the frequency correction data is obtained from the difference between the detected signal level and the theoretical value, and the current frequency data can be corrected by the correction data, automatic frequency control can be surely performed without a time delay.

[0014]

This prior application has a great advantage in that the time delay of frequency correction is reduced, but for example, as shown in FIG. 11 (b), the dummy data "0" is received. If the electric field strength of the received signal becomes weaker in the latter half of the middle and the intermediate frequency signal level becomes lower than the carrier sense level VCS, a malfunction occurs. That is, the sampling value VtB is detected at the time tB in the α section to obtain the error ΔVtB, and the sampling value VtC is detected at the time tC in the β section to obtain the error ΔVtB.
Calculate VtC.

Now, when the center frequency of the intermediate frequency deviates from the center frequency of the frequency detector 13, (d) of FIG.
As shown in, the center voltage VC of the detection signal does not coincide with the center value V0 of the output voltage range of the frequency detector 13 and shifts by ΔVx. However, since the error voltages ΔVtB and ΔVtC are ΔVtB = ΔVtC = ΔVx, correct frequency control is performed regardless of which detection error voltage is used.

However, when the carrier sense signal is turned off as shown in (c) of FIG. 11 due to the decrease of the electric field strength of the received signal at the time tD to tE in the γ section, the time tE becomes a new frequency. It becomes the starting point of the control operation. That is, as shown in (d) of FIG.
The timer T1 operates by detecting the ON of the carrier sense signal at E, detects the sampling value VtF at time tF after the lapse of T1 time, and calculates the error voltage ΔVtF.
2 operates and detects the sampling value VtG at time tG after the lapse of time T2 to obtain the error voltage .DELTA.VtG.

The error voltages ΔVtF and ΔVtG are completely different from the error voltage ΔVx to be detected, as is apparent from the figure.

Therefore, if frequency control is performed based on the error voltages ΔVtF and ΔVtG, the frequency of the intermediate frequency signal will deviate significantly from the normal frequency.

Therefore, according to the present invention, there is no time delay, reliable automatic frequency control can be performed even if a burst-shaped signal having a small time width is received as a reception signal, and even if a momentary interruption occurs in the reception signal. It is an object of the present invention to provide an automatic frequency control method for a receiver that can perform more reliable automatic frequency control without performing erroneous frequency control.

[0020]

According to the present invention, a received signal is mixed with a local oscillation signal, converted into an intermediate frequency signal, converted into a voltage signal, and further converted into a digital signal. When controlling the frequency of the local oscillation signal based on the frequency correction data obtained by processing the digital signal level, the presence or absence of the received signal is detected by the intermediate frequency signal, and when the presence of the received signal is detected, the preset value is set. The digital signal level is sampled a preset number of times within a preset specified time, and the digital signal level is sampled only when the variation of the sampled sampling values is within the range of the preset standard level. The value is the signal modulated with certain data when the intermediate frequency signal is set to the regular frequency. Is compared with the theoretical value of the digital signal level at the time of reception, the frequency correction data is obtained so that the error is minimized, the frequency of the local oscillation signal is controlled by the frequency correction data, and the intermediate frequency signal becomes the normal frequency. To control it.

[0021]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

As shown in FIG. 1, the received signal is mixed by the mixer 21.
In this case, the signal is mixed with a local oscillation signal from a PLL (Phase Locked Loop) frequency synthesizer 22 which is a local oscillator and converted into an intermediate frequency signal.

The intermediate frequency signal from the mixer 21 is supplied to the frequency detector 23. This frequency detector 2
Reference numeral 3 is for converting the frequency of the input signal into a voltage, and a voltage proportional to the level of the frequency is sent out as a detection output.

The detection output from the frequency detector 23 is A
The signal is supplied to the / D (analog / digital) converter 24 to be converted into an 8-bit digital signal, and the digital signal is supplied to the microprocessor 25.

Further, the intermediate frequency signal level from the mixer 21 is detected by the carrier detection circuit 26, and when the intermediate frequency signal level from the carrier detection circuit 26 is equal to or higher than the carrier sense level VCS, it is turned on and the intermediate frequency signal level is the carrier sense level. OF when lower than level VCS
The carrier sense signal of F is supplied to the microprocessor 25.

The microprocessor 25 is also adapted to control the sampling clock generating circuit 27 and the memory 28. The sampling clock generation circuit 27 supplies a clock signal for timing when the microprocessor 25 samples the digital signal from the A / D converter 24 to the A / D converter 24 and the microprocessor 25. ..

The microprocessor 25 has a timer T1 for time management for detecting the detection signal level Vt1 when obtaining the error voltage, and a time management for detecting the detection signal level Vt2 for similarly detecting the error voltage. There is provided a timer unit 25a which constitutes a timer T2 for performing and a timer T11 for performing time management for checking variations in detected signal level.

The microprocessor 25 is set to perform the processing shown in FIG. That is, the frequency setting data f is set to the design standard value fST. Then, the counter n for counting the number of samplings for checking the variation of the detection signal level is set to "0".

In this state, waiting for the carrier sense signal from the carrier detection circuit 26 to turn on, and when the carrier sense signal turns on, the timer T1 is started and the timer T11 is further started. After that, when the time T11 has elapsed, the detected signal level Vn (digital value of the A / D converter 24) at that time is measured. Then, the counter n is incremented, and it is checked whether or not the value n of the counter n is equal to or larger than a preset value M (specified number of times of sampling). If n <M, the timer T11 is started again, and when the time T11 has elapsed, the detection signal level Vn at that time is measured and the counter n is incremented.
When n ≧ M, M sampled Vn
The maximum value Vmax and the minimum value Vmin are searched from among
Check x-Vmin> VR1. Here, VR1 is for checking the variation and has a value within a prescribed range.
For example, it is set to about 10% of the maximum amplitude value of the detected signal.

If Vmax-Vmin> VR1, it is judged that the variation of the sampled M Vn exceeds the specified range, and the carrier sense signal is turned off without performing frequency control processing. ..

If Vmax-Vmin≤VR1, it is judged that the variation of M sampled Vn is within the specified range, and the automatic frequency control surrounded by the one-dot chain line in the figure is performed. That is, it is checked whether T1 time has passed since the timer T1 started, and when T1 time has passed,
The detection signal level Vt1 is measured. Then, the difference between the level Vt1 and the theoretical level VHR, ΔVH = Vt1−VHR, is obtained.

Then, the timer T2 is started, and when the time T2 has elapsed, the detection signal level Vt2 at that time is measured. The difference between the level Vt2 and the theoretical level VLR, Δ
VL = Vt2-VLR is calculated.

Subsequently, ΔV is obtained by (ΔVH + ΔVL) / 2.
Ask for. Then, the frequency correction data Δf is obtained by calculating ΔV × K (coefficient), and the frequency setting data f is rewritten with the correction data Δf. That is, the design standard value f
Since the frequency setting data f is initially set in ST, the frequency setting data f is rewritten by fST + Δf.

In this way, the frequency control process is completed, and thereafter, it waits until the carrier sense signal is turned off.

When the carrier sense signal is turned off, it is judged that the data reception is completed, and the frequency setting data f is set to the design standard value fST in preparation for the start of receiving the signal modulated by the next specific data. The counter n is set to "0" and the ON state of the carrier sense signal is waited for.

In the embodiment having such a configuration, for example, M = 3 is set. In this state, when the transmission data as shown in FIG. 3 (a) is received and the reception signal as shown in FIG. 3 (b) is obtained, at time tA as shown in FIG. 3 (c). The carrier sense signal from the carrier sense circuit 26 is O
N Then, the detection signal level Vn is sampled three times at intervals of time T11. That is, VA1, VA2, V
The sampled value of A3 is detected.

From these three sampling values, the maximum value Vma
x and the minimum value Vmin are found, and Vmax-Vmin> VR1
It is checked whether or not. In this section where the data "1" continues, the variation of the detection signal level Vn is small, so that Vmax-Vmin≤VR1 is judged and the detection signal level V is reached after the time T1 has elapsed since the timer T1 was started.
t1 is measured. And the level Vt1 and the theoretical level V
The difference from HR, ΔVH = Vt1−VHR, is obtained. Then, the timer T2 is started, and the detected signal level Vt2 is measured in the section where the data "0" continues after the time T2 has elapsed. Then, the difference between the level Vt2 and the theoretical level VLR, ΔVL = Vt2-VLR, is obtained.

Then, by (ΔVH + ΔVL) / 2, ΔV
Further, the frequency correction data Δf is obtained by calculating ΔV × K (coefficient), and the frequency setting data f of the PLL frequency synthesizer 22 is rewritten by the correction data Δf. As a result, the detected signal level is controlled to match the reference value VLR at the timing tPL1.

In this manner, the frequency of the local oscillation signal from the PLL frequency synthesizer 22 is corrected, and as a result, the center frequency of the intermediate frequency signal is corrected so as to come closest to the center frequency of the frequency detector 23.

In this state, if the carrier sense signal is momentarily turned off during the period from time tD to tE, the timers T1 and T11 are started at time tE when the carrier sense signal is turned on, and the time interval T11. The detection signal level Vn is sampled at. That is, VE1,
The sampling values of VE2 and VE3 are detected.

Then, the maximum value Vmax and the minimum value Vmin are searched for from these three sampling values, and Vmax-Vmin
> VR1 is checked. Here, since it is in the receiving area of the regular information data, there is a large variation in VE1, VE2 and VE3 as shown in FIG. 3 (d). Therefore, Vmax-Vmin> VR1 is determined, and the frequency control process is not performed.

Therefore, the frequency of the local oscillation signal from the PLL frequency synthesizer 22 is not corrected and retains the previous state.

As described above, even if the received signal is instantaneously interrupted, erroneous frequency control is not performed, so that reliable automatic frequency control can be performed.

Since there is almost no delay in control, reliable automatic frequency control can be performed even if a burst-shaped signal with a small time width is received as the received signal.

Next, another embodiment of the present invention will be described with reference to the drawings. The hardware configuration is the same as that shown in FIG.

In the above embodiment, the carrier sense signal is OF.
Whenever it reaches F, the frequency setting data f is always changed to the design standard value f
Since it is preset to ST, if there is a momentary interruption of the received signal during the reception of the information data, after the time tD, the center voltage VC of the detection signal and the center value V0 of the output voltage range of the frequency detector 13
The deviation ΔVx from and remains without being corrected.

Therefore, in the present embodiment, as shown in FIG. 4, when the carrier sense signal is turned off, the frequency setting data f0 previously set is left without presetting the frequency setting data f. That is, the frequency setting data f is not returned to the design standard value fST, but is set to the previous frequency setting data f0.

Therefore, in the frequency control process, ΔV × K
When the frequency correction data Δf is obtained by the calculation of (coefficient), the correction data Δf is added to the data f0 to obtain the frequency setting data f.

In this way, as shown in FIG. 5, even if the carrier sense signal is momentarily cut off after the frequency setting data f is rewritten at the timing tPL1 to correct the frequency of the local oscillation signal from the PLL frequency synthesizer 22. , PLL
The frequency of the local oscillation signal from the frequency synthesizer 22 is the same as the state before the carrier sense signal was interrupted.
Therefore, the deviation ΔVx does not occur.

Of course, even if such a control process is performed, the same effect as that of the above embodiment can be obtained.

In each of the above embodiments, the detection signal level V sampled after the carrier sense signal is turned ON.
Specific data (“1”,
Although it was determined whether the "0" type of dummy data) is being received or the information data is being received, the specific data is being received by comparing the detection signal level Vn with the reference voltage VHR or VLR. It is also possible to identify whether or not the information data is being received.

That is, as shown in FIG. 6, after searching for the maximum value Vmax and the minimum value Vmin from the sampled detection signal level Vn, it is not necessary to check Vmax-Vmin> VR1 but │Vmax-VHR. ｜ ＞ VR2 and ｜
Check Vmin-VHR |> VR2.

Then, even if | Vmax-VHR |> VR2, | Vmi
If n-VHR |> VR2 is not satisfied, frequency control processing is performed,
| Vmax-VHR |> VR2 or | Vmin-VHR |> V
When R2, frequency control processing is not performed.

By comparing the detected signal level Vn with the reference voltage VHR as described above, whether the specific data is being received,
It is possible to identify whether the information data is being received.

In this case, the reference voltage VLR may be used instead of the reference voltage VHR.

Of course, even if such a control process is performed, the same effect as that of the above embodiment can be obtained.

In each of the above-described embodiments, both the continuous data of "1" and the continuous data of "0" which are specific data are used to detect the frequency shift of the intermediate frequency signal, and the error voltage ΔVH , ΔVL are used, but the present invention is not limited to this, and it is possible to detect the frequency shift of the intermediate frequency signal using either one.

In each of the above embodiments, the detected signal level Vt1
The error voltage VH is obtained by sampling the above, but the present invention is not limited to this, and even if the error voltage VH is obtained by using one of the detection signal levels Vn sampled at the time interval T11, a plurality of detection signals are detected. The error voltage VH may be obtained using the average value of the signal level Vn.

[0059]

As described in detail above, according to the present invention, there is no time delay, and even if a burst-shaped signal having a small time width is received as a reception signal, reliable automatic frequency control can be performed, and reception can be performed. It is possible to provide an automatic frequency control method for a receiver that does not perform erroneous frequency control even if an instantaneous interruption occurs in a signal, and can thereby perform more reliable automatic frequency control.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a flowchart showing frequency control processing by the microprocessor of the embodiment.

FIG. 3 is a waveform chart of each part for explaining frequency control in the embodiment.

FIG. 4 is a flowchart showing frequency control processing by a microprocessor according to another embodiment of the present invention.

FIG. 5 is a waveform chart of each part for explaining frequency control in the embodiment.

FIG. 6 is a flowchart showing frequency control processing by a microprocessor according to still another embodiment of the present invention.

FIG. 7 is a block diagram showing a conventional example.

FIG. 8 is a block diagram showing an example of a prior application.

FIG. 9 is a flowchart showing frequency control processing by a microprocessor when a carrier sense circuit is used in the prior application example.

FIG. 10 is a waveform chart of each part for explaining the frequency control in the prior application example.

FIG. 11 is a waveform chart of each part for explaining the problem of frequency control in the prior application example.

[Explanation of symbols]

21 ... mixer, 22 ... PLL frequency synthesizer,
23 ... Frequency detector, 24 ... A / D converter, 25 ... Microprocessor, 26 ... Carrier detection circuit, 27 ... Sampling clock generation circuit.

Claims (1)

[Claims] 1. A signal obtained by mixing a received signal with a local oscillation signal, converting it into an intermediate frequency signal, converting it into a voltage signal, converting this voltage signal into a digital signal, and processing the digital signal level. In the case of controlling the frequency of the local oscillation signal based on the frequency correction data, the presence or absence of the reception signal is detected by the intermediate frequency signal, and when the presence of the reception signal is detected, the digital signal is set within the preset specified time. The level is sampled a specified number of times preset, and the digital signal level is sampled only when the variation in the sampled values is within the range of the specified preset level. Digital when receiving a signal modulated with specific data when set to a frequency of Compare the theoretical value of the signal level, find the frequency correction data to minimize the error, and control the frequency of the local oscillation signal by the frequency correction data so that the intermediate frequency signal becomes a regular frequency. An automatic frequency control method for a receiver, characterized by: