JPH05308205A - Dielectric filter - Google Patents

Dielectric filter

Info

Publication number
JPH05308205A
JPH05308205A JP13986392A JP13986392A JPH05308205A JP H05308205 A JPH05308205 A JP H05308205A JP 13986392 A JP13986392 A JP 13986392A JP 13986392 A JP13986392 A JP 13986392A JP H05308205 A JPH05308205 A JP H05308205A
Authority
JP
Japan
Prior art keywords
conductors
dielectric
pattern
input
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13986392A
Other languages
Japanese (ja)
Other versions
JP3164246B2 (en
Inventor
Hiroyuki Shimizu
寛之 清水
Kenji Ito
憲治 伊藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Niterra Co Ltd
Original Assignee
NGK Spark Plug Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NGK Spark Plug Co Ltd filed Critical NGK Spark Plug Co Ltd
Priority to JP13986392A priority Critical patent/JP3164246B2/en
Priority to US08/051,766 priority patent/US5379012A/en
Priority to DE69330436T priority patent/DE69330436T2/en
Priority to EP93303410A priority patent/EP0571094B1/en
Priority to EP96111435A priority patent/EP0740360B1/en
Priority to DE69323112T priority patent/DE69323112T2/en
Publication of JPH05308205A publication Critical patent/JPH05308205A/en
Application granted granted Critical
Publication of JP3164246B2 publication Critical patent/JP3164246B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE:To provide the dielectric filter with simple structure and whose frequency response is easily adjusted. CONSTITUTION:A 1st dielectric board 10 in which input/output conductors 11a, 11b are formed in parallel and connection conductors 12a, 12b causing input output capacitors C1, C2 opposite to both the input/output conductors 11a, 11b are formed to an outer face, and a 2nd dielectric board 20 in which a capacitor pattern causing a coupling capacitance C3 in inter-stage coupling of pattern conductors 22a, 22b corresponding to dielectric coaxial resonators 2a, 2b is caused to an inner face and an earth conductor 23 to cover the pattern conductors 22a, 22b are formed to the outer face to cause stray capacitors C4, C5 are overlapped to one side face of the dielectric coaxial resonators 2a, 2b and the pattern conductors 22a, 22b and connection conductors 12a, 12b are respectively connected electrically to inner conduction films 4a, 4b of the dielectric coaxial resonators 2a, 2b and the input output conductors 11a, 11b are connected to external electric lines.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、誘電体同軸共振子を複
数並設してなる誘電体フィルタに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a dielectric filter having a plurality of dielectric coaxial resonators arranged in parallel.

【0002】[0002]

【従来の技術】軸方向に貫通孔を備え、かつ該貫通孔に
内周面に内導電膜が形成され、前面を除く外周面に外導
電膜を形成してなる誘電体同軸共振子を複数並設してな
る誘電体フィルタは特開平3-136502号に開示されてい
る。かかる構成にあっては、各共振子をプリント基板で
覆い、該基板上に複数のパターン導体を段間結合して結
合容量を生じさせてなる容量パターンを形成し、各パタ
ーン導体を各同軸共振子の内導電膜に接続するようにし
ている。また、入出力端子に接続される両最外位置にあ
る同軸共振子の内導電膜には、コンデンサを外付け接続
して入出力容量を確保すると共に、周波数応答性の調整
及び共振器長の短縮を目的に浮遊容量を形成する場合も
あるが、その場合も各同軸共振子の内導電膜にアース端
子との間で別途コンデンサを接続して確保している。
2. Description of the Related Art A plurality of dielectric coaxial resonators each having a through hole in the axial direction, an inner conductive film formed on the inner peripheral surface of the through hole, and an outer conductive film formed on the outer peripheral surface excluding the front surface. A dielectric filter arranged in parallel is disclosed in JP-A-3-136502. In such a configuration, each resonator is covered with a printed circuit board, a plurality of pattern conductors are interstage-coupled on the board to form a capacitive pattern to generate a coupling capacitance, and each pattern conductor is provided with a coaxial resonance. It is connected to the inner conductive film of the child. A capacitor is externally connected to the inner conductive films of the coaxial resonators at both outermost positions connected to the input / output terminals to secure input / output capacitance, and the frequency response is adjusted and the resonator length is adjusted. In some cases, stray capacitance is formed for the purpose of shortening, but in that case as well, a separate capacitor is connected and secured between the inner conductive film of each coaxial resonator and the ground terminal.

【0003】[0003]

【発明が解決しようとする課題】上述の構成にあって
は、各容量を生じさせるために、外付け部材が必要とな
って構造が複雑となり、寸法も大きくなる。またフィル
タ構成後に上記容量を設定調整ができないという問題点
がある。本発明は、かかる従来構成の問題点を除去する
ことを目的とするものである。
In the above-mentioned structure, an external member is required to generate each capacitance, which complicates the structure and increases the size. Further, there is a problem in that the capacitance cannot be set and adjusted after the filter is constructed. The present invention is intended to eliminate the problems of the conventional configuration.

【0004】[0004]

【課題を解決するための手段】本発明は、軸方向に貫通
孔を備え、かつ該貫通孔の内周面に内導電膜が形成さ
れ、該貫通孔に嵌装されて内導電膜に電気的に接続する
連接端子を前面から突出させ、前面を除く外周面に外導
電膜を形成してなる誘電体同軸共振子を複数並設し、内
面側に両最外位置の誘電体同軸共振子と対応する二つの
入出力導体が並成され、外面側に両入出力導体と対峙し
て入出力容量を生じる接続導体が並成され、前記各連接
端子が嵌入する嵌挿孔が形成されてなる第一の誘電体基
板を、前記同軸共振子の前面を覆うように配設して、前
記接続導体を嵌挿孔に挿入された連接端子により内導電
膜と電気的に接続すると共に、内面側に各誘電体同軸共
振子と対応する複数のパターン導体を段間結合して結合
容量を生じさせてなる容量パターンを形成し、外側に前
記各パターン導体を覆うようにアース導体を形成して浮
遊容量を生じさせ、かつ連接端子が嵌入する嵌挿孔が形
成されてなる第二の誘電体基板を、前記第一の誘電体基
板と重ね合わせて両最外位置のパターン導体を第一の誘
電体基板の接続導体と電気的に接合するように配設する
と共に、各パターン導体を嵌挿孔に挿入された連接端子
を介して夫々各誘電体同軸共振子の内導電膜と電気的に
接続したことを特徴とするものである。
According to the present invention, a through hole is provided in the axial direction, an inner conductive film is formed on the inner peripheral surface of the through hole, and the inner conductive film is fitted into the through hole to electrically connect to the inner conductive film. A plurality of dielectric coaxial resonators in which the connecting terminals to be electrically connected are projected from the front surface and the outer conductive film is formed on the outer peripheral surface excluding the front surface, and the dielectric coaxial resonators at both outermost positions are arranged on the inner surface side. Two input / output conductors corresponding to the input / output conductors are formed side by side, connection conductors that face both the input / output conductors and generate an input / output capacitance are formed side by side, and a fitting insertion hole into which each connecting terminal is inserted is formed. Is disposed so as to cover the front surface of the coaxial resonator, and the connecting conductor is electrically connected to the inner conductive film by the connecting terminal inserted into the insertion hole, and the inner surface is formed. On the side, a plurality of pattern conductors corresponding to each dielectric coaxial resonator should be interstage-coupled to generate a coupling capacitance. A second dielectric substrate formed with a capacitance pattern, an earth conductor is formed on the outside so as to cover the pattern conductors to generate a stray capacitance, and a fitting insertion hole into which the connecting terminal is fitted is formed, The pattern conductors at both outermost positions are arranged so as to be superposed on the first dielectric substrate so as to be electrically joined to the connection conductors of the first dielectric substrate, and each pattern conductor is inserted into the insertion hole. It is characterized in that they are electrically connected to the inner conductive films of the respective dielectric coaxial resonators through the connected connecting terminals.

【0005】[0005]

【作用】上述の構成にあって、両最外位置にある同軸共
振子は、その内導電膜を連接端子により第一の誘電体基
板の外側の接続導体と電気的に接続され、該誘電体基板
を介して接続導体と対峙している入出力導体との間で、
入出力容量を生じ、夫々入出力端子と接続される。一
方、各誘電体同軸共振子の内導電膜は、夫々パターン導
体と接続され、該内導電膜間でパターン導体の段間結合
による結合容量を生ずる。さらには、各パターン導体は
誘電体基板を介してアース導体と対峙して、その間に浮
遊容量を生じて、アース接続される。
In the above-described structure, the coaxial resonators at both outermost positions have their inner conductive films electrically connected to the connecting conductors on the outer side of the first dielectric substrate by connecting terminals. Between the connecting conductor and the facing input / output conductor via the substrate,
Input / output capacitance is generated and connected to the input / output terminals, respectively. On the other hand, the inner conductive film of each dielectric coaxial resonator is connected to the respective pattern conductors, and a coupling capacitance is generated between the inner conductive films due to interstage coupling of the pattern conductors. Furthermore, each pattern conductor faces the ground conductor through the dielectric substrate, and a stray capacitance is generated between them to be grounded.

【0006】なお、二つの誘電体同軸共振子によって誘
電体フィルタを構成した場合には、最外位置とは、当該
二つのものをいう。またパターン導体は、接続導体を介
して連接端子と接続し、これにより内導電膜と電気的に
接続するようにしてもよい。
When a dielectric filter is composed of two dielectric coaxial resonators, the outermost position means the two. Further, the pattern conductor may be connected to the connecting terminal via the connecting conductor and thereby electrically connected to the inner conductive film.

【0007】かかる構成にあって、浮遊容量を形成する
ことにより共振器長を短縮し、夫々を組み付けた後に、
アース導体が外部に露出するから、アース導体を削除す
ることにより浮遊容量を小さくして周波数を上げること
ができる。または、導体を付加することにより、同様に
浮遊容量を大きくして周波数を下げることができる。さ
らには、パターン導体の結合部の裏部でアース導体を削
ることにより、その結合度を調整することができる。
In such a structure, the resonator length is shortened by forming the stray capacitance, and after the respective resonators are assembled,
Since the ground conductor is exposed to the outside, stray capacitance can be reduced and the frequency can be increased by removing the ground conductor. Alternatively, by adding a conductor, the stray capacitance can be similarly increased and the frequency can be lowered. Furthermore, the degree of coupling can be adjusted by shaving the ground conductor on the back side of the coupling portion of the pattern conductor.

【0008】[0008]

【実施例】図1〜4は、二つの誘電体同軸共振子2a,
2bによって誘電体フィルタ1を構成した実施例を示
す。ここで誘電体同軸共振子2a,2bは、酸化チタン
系のセラミック誘電体からなる直方体状をしており、そ
の中心には軸方向に貫通孔3,3が形成され、該貫通孔
3,3の内周面に内導電膜4a,4bが形成され、さら
に、誘電体同軸共振子2a,2bの周囲には前面を除く
各周面に外導電膜5が形成されている。また前記貫通孔
3,3にはその端部位置で緊密に嵌入されて前記内導電
膜4a,4bとの電気的接続が確保される金属製の連接
端子6,6が装着され、その小径接続端7を前記誘電体
同軸共振子2a,2bの前面から外方突出している。
1 to 4 show two dielectric coaxial resonators 2a,
An example in which the dielectric filter 1 is composed of 2b will be shown. Here, the dielectric coaxial resonators 2a and 2b are in the shape of a rectangular parallelepiped made of a titanium oxide ceramic dielectric, and through holes 3 and 3 are formed in the center thereof in the axial direction. Inner conductive films 4a and 4b are formed on the inner peripheral surface of the above, and outer conductive films 5 are formed on the peripheral surfaces of the dielectric coaxial resonators 2a and 2b except the front surface. Further, the through holes 3 and 3 are fitted with metal connecting terminals 6 and 6 which are tightly fitted at their end positions to ensure electrical connection with the inner conductive films 4a and 4b, and their small diameter connections. The end 7 is projected outward from the front surfaces of the dielectric coaxial resonators 2a and 2b.

【0009】そして、この各誘電体同軸共振子2a,2
bの前部には、第一の誘電体基板10と、第二の誘電体
基板20とが重ね合わせ状に配設される。この誘電体基
板10,20はセラミック誘電体からなる。
Then, each of the dielectric coaxial resonators 2a, 2a
A first dielectric substrate 10 and a second dielectric substrate 20 are arranged in a superposed manner on the front part of b. The dielectric substrates 10 and 20 are made of a ceramic dielectric.

【0010】前記第一の誘電体基板10は、図2のAで
示すようにその内面には左右並設して前記誘電体同軸共
振子2a,2bに夫々対向するように入出力導体11
a,11bが形成される。またその外面には図2のBで
示すように各入出力導体11a,11bと対峙して接続
導体12a,12bが形成され、各入出力導体11a,
11b,接続導体12a,12bを貫通して前記連接端
子6,6の小径接続端7が挿入する嵌挿孔13a,13
bが貫設される。また第一の誘電体基板10の内面側で
は嵌挿孔13a,13bの周部で入出力導体11a,1
1bの導電層を除去して、小径接続端7が入出力導体1
1a,11bと電気的に接続しないようにし、かつ第一
の誘電体基板10の外側では、前記小径接続端7と接続
導体12a,12bとの電気的接続を確保するようにし
ている。更には、接続導体12a,12bと抵触しない
位置で左右に長孔状の接続用貫通孔14,14が形成さ
れている。
As shown in FIG. 2A, the first dielectric substrate 10 is arranged on its inner surface side by side so as to be opposed to the dielectric coaxial resonators 2a and 2b, respectively.
a and 11b are formed. Further, as shown by B in FIG. 2, connection conductors 12a and 12b are formed on the outer surface of the input / output conductors 11a and 11b so as to face each other.
11b and fitting conductors 13a and 13 which penetrate the connecting conductors 12a and 12b and into which the small diameter connecting ends 7 of the connecting terminals 6 and 6 are inserted.
b is pierced. Further, on the inner surface side of the first dielectric substrate 10, the input / output conductors 11a, 1a are formed at the peripheral portions of the insertion holes 13a, 13b.
By removing the conductive layer of 1b, the small-diameter connecting end 7 becomes the input / output conductor 1
1a and 11b are not electrically connected, and on the outer side of the first dielectric substrate 10, the small diameter connection end 7 and the connection conductors 12a and 12b are electrically connected. Further, elongated through holes 14 for connection are formed on the left and right at positions not in contact with the connection conductors 12a, 12b.

【0011】前記第二の誘電体基板20は図3のAで示
すようにその内面に櫛歯状パターン導体22a,22b
を、第一の誘電体基板10との重ね合わせにより前記接
続導体12a,12bと対接する位置関係で配置し、そ
の櫛部を噛み合わせて段間結合してなる容量パターン2
1を形成している。また第二の誘電体基板20の外面で
は、図3のBで示すように左右に連続して前記パターン
導体22a,22bに対峙するようにアース導体23が
形成されている。そして各パターン導体22a,22b
を貫通して嵌挿孔24a,24bが貫設され、前記嵌挿
孔24a,24bに内導電膜4a,4bと接続された連
接端子6,6が挿入される。尚、嵌挿孔24a,24b
の周部でアース導体23の導電層を除去して、連接端子
6,6がアース導体23と電気的に接続しないようにし
ている。一方、前記パターン導体22a,22bは接続
導体12a,12bを介して連接端子6,6(内導電膜
4a,4b)と接続されるものである。尚、直接パター
ン導体22a,22bを連接端子6,6と接続するよう
にしても良い。更には、パターン導体22a,22bと
抵触しないように左右に前記貫通孔14,14と前後で
一致させて長孔状の接続用貫通孔25,25が形成され
ている。
The second dielectric substrate 20 has comb-shaped pattern conductors 22a and 22b on its inner surface as shown in FIG. 3A.
Are arranged so as to face the connection conductors 12a and 12b by being superposed on the first dielectric substrate 10, and the comb patterns are interlocked with each other so that the capacitance pattern 2 is formed.
1 is formed. Further, on the outer surface of the second dielectric substrate 20, a ground conductor 23 is formed so as to face the pattern conductors 22a and 22b continuously in the left and right direction as shown by B in FIG. And each pattern conductor 22a, 22b
The fitting insertion holes 24a and 24b are provided so as to penetrate therethrough, and the connection terminals 6 and 6 connected to the inner conductive films 4a and 4b are inserted into the fitting insertion holes 24a and 24b. Incidentally, the fitting holes 24a, 24b
The conductive layer of the ground conductor 23 is removed at the peripheral portion so that the connecting terminals 6 and 6 are not electrically connected to the ground conductor 23. On the other hand, the pattern conductors 22a and 22b are connected to the connection terminals 6 and 6 (inner conductive films 4a and 4b) via the connection conductors 12a and 12b. The pattern conductors 22a and 22b may be directly connected to the connecting terminals 6 and 6. Further, elongated through holes 25, 25 for connection are formed on the left and right so as to be aligned with the through holes 14, 14 in the front and back so as not to come into contact with the pattern conductors 22a, 22b.

【0012】 そして、前記入出力導体11a,11b
に面接合してその導通を確保される端子板30a,30
b(図1参照)の引出し脚31,31を前記貫通孔1
4,14と貫通孔25,25内に挿通させてその先端を
突出して、夫々をプリント基板のスルホールに挿通する
等の手段により、該端子板30a,30bの引出し脚3
1,31により入出力導体11a,11bを入力側外部
電路と、出力側外部電路とに接続するようにしている。
またアース導体23にはケース等を介してアース接続さ
れる。
Then, the input / output conductors 11a and 11b
Terminal plates 30a, 30 that are surface-bonded to the
The pull-out legs 31 and 31 of b (see FIG. 1) are attached to the through-hole 1
4, 14 and the through-holes 25, 25 so that the tips of the lead-outs 3 are inserted into the through-holes of the printed circuit board so as to project the tips thereof.
The input / output conductors 11a and 11b are connected to the input-side external electric path and the output-side external electric path by 1, 31.
The ground conductor 23 is grounded via a case or the like.

【0013】而して、誘電体基板10,20が重ね合わ
されて、誘電体同軸共振子2a,2bの内導電膜4a,
4bを連接端子6,6により第一の誘電体基板10の外
側の接続導体12a,12bと電気的に接続され、該誘
電体基板10を介して接続導体12a,12bと対峙し
ている入出力導体11a,11bとの間で、図5の等価
回路で示すように入出力容量C1 ,C2 を生じ、前記端
子板30により外部の入出力端子と夫々接続される。
Thus, the dielectric substrates 10 and 20 are overlapped with each other to form the inner conductive film 4a of the dielectric coaxial resonators 2a and 2b.
The input / output 4b is electrically connected to the connecting conductors 12a and 12b outside the first dielectric substrate 10 by connecting terminals 6 and 6 and faces the connecting conductors 12a and 12b through the dielectric substrate 10. Input / output capacitors C 1 and C 2 are generated between the conductors 11a and 11b as shown in the equivalent circuit of FIG. 5, and are connected to the external input / output terminals by the terminal plate 30.

【0014】また、各接続導体12a,12bは、夫々
パターン導体22a,22bと接続され、該パターン導
体22a,22bの段間結合による結合容量C3 を生ず
る。さらには、各パターン導体22a,22bは第二の
誘電体基板20を介してアース導体23と対峙して、そ
の間に浮遊容量C4 ,C5 を生じて、アース接続され
る。
The connecting conductors 12a and 12b are connected to the pattern conductors 22a and 22b, respectively, and a coupling capacitance C 3 is generated by the interstage coupling of the pattern conductors 22a and 22b. Further, each pattern conductors 22a, 22b are opposed to the earth conductor 23 through the second dielectric substrate 20, caused the stray capacitance C 4, C 5 therebetween are grounded.

【0015】上述の実施例では、二つの誘電体同軸共振
子2a,2bにより誘電体フィルタ1を構成したもので
あるが、これを三以上並設して用いることができ、この
場合には、第一の誘電体基板10の入出力導体11a,
11bを最外側の誘電体同軸共振子と対応して形成し、
外面側に入出力導体11a,11bと対峙して入出力容
量を生じる接続導体12a,12bを並成するように
し、さらに第二の誘電体基板20の内面側には誘電体同
軸共振子の数と等しい複数のパターン導体を段間結合し
て複数の結合容量を生じさせ、第二の誘電体基板20の
外側に前記各パターン導体を覆うようにアース導体23
を形成すれば良い。
In the above-mentioned embodiment, the dielectric filter 1 is composed of the two dielectric coaxial resonators 2a and 2b, but three or more of them can be arranged in parallel. In this case, The input / output conductor 11a of the first dielectric substrate 10,
11b is formed corresponding to the outermost dielectric coaxial resonator,
Connection conductors 12a, 12b facing the input / output conductors 11a, 11b on the outer surface side to generate input / output capacitance are arranged in parallel, and the number of dielectric coaxial resonators is provided on the inner surface side of the second dielectric substrate 20. And a plurality of pattern conductors equal to each other are coupled between the stages to generate a plurality of coupling capacitors, and the ground conductor 23 is provided outside the second dielectric substrate 20 so as to cover the pattern conductors.
Should be formed.

【0016】[0016]

【発明の効果】上述したように、本発明は誘電体基板1
0,20を重ね合わせるだけで、入出力容量C1 ,C
2 、結合容量C3 及び浮遊容量C4 ,C5 を随意に設定
することができ、コンデンサの外付を要せず、簡潔な構
成とすることができる。また、浮遊容量を形成すること
により共振器長の短縮が可能となりその組み付け後にお
いて、前記アース導体23を削除又は付加することによ
り結合容量C3 及び浮遊容量C4 ,C5 を容易に調整で
き、周波数応答性を適正なものとすることができる等の
優れた効果がある。
As described above, according to the present invention, the dielectric substrate 1
I / O capacitances C 1 and C
2 , the coupling capacitance C 3 and the stray capacitances C 4 and C 5 can be arbitrarily set, and the external configuration of the capacitor is not required, and the configuration can be simplified. Further, by forming the stray capacitance, the resonator length can be shortened, and after the assembly, the coupling capacitance C 3 and the stray capacitances C 4 , C 5 can be easily adjusted by deleting or adding the ground conductor 23. Further, there is an excellent effect that the frequency response can be made appropriate.

【図面の簡単な説明】[Brief description of drawings]

【図1】誘電体フィルタ1の分離斜視図である。FIG. 1 is an exploded perspective view of a dielectric filter 1.

【図2】第一の誘電体基板10を示し、Aは内面を、B
は外面を示す。
FIG. 2 shows a first dielectric substrate 10, where A is the inner surface and B is the inner surface.
Indicates the outer surface.

【図3】第二の誘電体基板20を示し、Aは内面を、B
は外面を示す。
FIG. 3 shows a second dielectric substrate 20, where A is the inner surface and B is the inner surface.
Indicates the outer surface.

【図4】縦断側面図である。FIG. 4 is a vertical sectional side view.

【図5】等価回路図である。FIG. 5 is an equivalent circuit diagram.

【符号の説明】[Explanation of symbols]

1 誘電体フィルタ 2a,2b 誘電体同軸共振子 3,3 貫通孔 4a,4b 内導電膜 6,6 連接端子 10 第一の誘電体基板 11a,11b 入出力導体 12a,12b 接続導体 14,14 貫通孔 20 第二の誘電体基板 21 容量パターン 22a,22b パターン導体 23 アース導体 24a,24b 嵌挿孔 25,25 貫通孔 C1 ,C2 入出力容量 C3 結合容量 C4 浮遊容量1 Dielectric Filter 2a, 2b Dielectric Coaxial Resonator 3,3 Through Hole 4a, 4b Inner Conductive Film 6,6 Connection Terminal 10 First Dielectric Substrate 11a, 11b Input / Output Conductor 12a, 12b Connection Conductor 14, 14 Penetration Hole 20 Second dielectric substrate 21 Capacitance pattern 22a, 22b Pattern conductor 23 Ground conductor 24a, 24b Fitting hole 25, 25 Through hole C 1 , C 2 Input / output capacitance C 3 Coupling capacitance C 4 Stray capacitance

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 軸方向に貫通孔を備え、かつ該貫通孔の
内周面に内導電膜が形成され、該貫通孔に嵌装されて内
導電膜に電気的に接続する連接端子を前面から突出さ
せ、前面を除く外周面に外導電膜を形成してなる誘電体
同軸共振子を複数並設し、 内面側に両最外位置の誘電体同軸共振子と対応する二つ
の入出力導体が並成され、外面側に両入出力導体と対峙
して入出力容量を生じる接続導体が並成され、前記各連
接端子が嵌入する嵌挿孔が形成されてなる第一の誘電体
基板を、前記同軸共振子の前面を覆うように配設して、
前記接続導体を嵌挿孔に挿入された連接端子により内導
電膜と電気的に接続すると共に、 内面側に各誘電体同軸共振子と対応する複数のパターン
導体を段間結合して結合容量を生じさせてなる容量パタ
ーンを形成し、外側に前記各パターン導体を覆うように
アース導体を形成して浮遊容量を生じさせ、かつ連接端
子が嵌入する嵌挿孔が形成されてなる第二の誘電体基板
を、前記第一の誘電体基板と重ね合わせて両最外位置の
パターン導体を第一の誘電体基板の接続導体と電気的に
接合するように配設すると共に、各パターン導体を嵌挿
孔に挿入された連接端子を介して夫々各誘電体同軸共振
子の内導電膜と電気的に接続したことを特徴とする誘電
体フィルタ。
1. A front surface of a connecting terminal, which has a through hole in the axial direction, an inner conductive film is formed on an inner peripheral surface of the through hole, and which is fitted in the through hole and electrically connected to the inner conductive film. Two dielectric input / output conductors corresponding to the dielectric coaxial resonators at both outermost positions are provided on the inner surface side, with a plurality of dielectric coaxial resonators juxtaposed from each other and having outer conductive films formed on the outer peripheral surface excluding the front surface. A first dielectric substrate in which connecting conductors that face both input / output conductors and generate an input / output capacitance are formed in parallel on the outer surface side, and a fitting insertion hole into which each connecting terminal is fitted is formed. , Disposed so as to cover the front surface of the coaxial resonator,
The connection conductor is electrically connected to the inner conductive film by the connection terminal inserted in the insertion hole, and a plurality of pattern conductors corresponding to the respective dielectric coaxial resonators are interstage-coupled on the inner surface side to form a coupling capacitance. A second dielectric formed by forming a generated capacitance pattern, forming an earth conductor on the outside so as to cover each of the pattern conductors to generate stray capacitance, and forming a fitting insertion hole into which the connecting terminal is fitted. The body substrate is superposed on the first dielectric substrate, and the pattern conductors at both outermost positions are arranged so as to be electrically joined to the connection conductors of the first dielectric substrate, and the pattern conductors are fitted together. A dielectric filter characterized in that it is electrically connected to an inner conductive film of each dielectric coaxial resonator through a connecting terminal inserted in an insertion hole.
JP13986392A 1992-04-30 1992-04-30 Dielectric filter Expired - Fee Related JP3164246B2 (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP13986392A JP3164246B2 (en) 1992-04-30 1992-04-30 Dielectric filter
US08/051,766 US5379012A (en) 1992-04-30 1993-04-26 Dielectric filter device
DE69330436T DE69330436T2 (en) 1992-04-30 1993-04-30 Dielectric filter arrangement
EP93303410A EP0571094B1 (en) 1992-04-30 1993-04-30 Dielectric filter device
EP96111435A EP0740360B1 (en) 1992-04-30 1993-04-30 Dielectric filter device
DE69323112T DE69323112T2 (en) 1992-04-30 1993-04-30 Dielectric filter arrangement

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13986392A JP3164246B2 (en) 1992-04-30 1992-04-30 Dielectric filter

Publications (2)

Publication Number Publication Date
JPH05308205A true JPH05308205A (en) 1993-11-19
JP3164246B2 JP3164246B2 (en) 2001-05-08

Family

ID=15255302

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13986392A Expired - Fee Related JP3164246B2 (en) 1992-04-30 1992-04-30 Dielectric filter

Country Status (1)

Country Link
JP (1) JP3164246B2 (en)

Also Published As

Publication number Publication date
JP3164246B2 (en) 2001-05-08

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