JPH05298202A - Bus fault detection system - Google Patents

Bus fault detection system

Info

Publication number
JPH05298202A
JPH05298202A JP4083804A JP8380492A JPH05298202A JP H05298202 A JPH05298202 A JP H05298202A JP 4083804 A JP4083804 A JP 4083804A JP 8380492 A JP8380492 A JP 8380492A JP H05298202 A JPH05298202 A JP H05298202A
Authority
JP
Japan
Prior art keywords
bus
master device
board
fault detection
cables
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP4083804A
Other languages
Japanese (ja)
Inventor
Takehiko Toyohara
武彦 豊原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP4083804A priority Critical patent/JPH05298202A/en
Publication of JPH05298202A publication Critical patent/JPH05298202A/en
Withdrawn legal-status Critical Current

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  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To instantaneously detect the omission of the cables and the bus relaying base boards by a bus master device for a bus which is relayed via these cavbles and base boards and defines the bus master device and a bus termination base board as its both ends. CONSTITUTION:A bus fault detecting signal line 140 is relayed via the cables 30 and 31-3n and the bus relaying base boards 21-2n and defines a bus terminaltion substrate 4 and a bus master device 1 as its initiation and termination respectively. Then the line 140 is pouned in the board 4 and pulled up via an R6 and an R8 at the precedent stages of the boards 21-2n and the receivers 10 and 7 of the device 1. A DET 5 detects a fact tha thte potential of the line 140 is changed to a high level from a low level when one of those cables, bus relaying base boards and bus termination base board is omitted.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はバス障害検出方式に関
し、特にケーブルおよび中継基板によって中継されるバ
スのケーブル抜け,基板抜けを検出するバス障害検出方
式に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bus failure detection method, and more particularly to a bus failure detection method for detecting a cable drop and a board drop of a bus relayed by a cable and a relay board.

【0002】[0002]

【従来の技術】従来この種のバス障害検出方式は、実際
にバスを介してデータ転送を行ってみて、転送が不成功
になることにより障害を検出していた。
2. Description of the Related Art Conventionally, in this type of bus failure detection method, when a data transfer is actually performed through the bus and the transfer becomes unsuccessful, the failure is detected.

【0003】[0003]

【発明が解決しようとする課題】この従来のバス障害検
出方式では、バスマスタ装置からケーブル抜けや基板抜
けを起こした部分を経由したデータのバス転送が行われ
るまでバス障害が検出できず、バスマスタ装置での障害
検出の即時性に欠けるため、障害処理が遅れるという問
題点があった。
In this conventional bus failure detection method, a bus failure cannot be detected until the bus transfer of data from the bus master apparatus through the portion where the cable is disconnected or the board is disconnected is detected, and the bus master apparatus is not detected. However, there is a problem that the failure processing is delayed because of lack of immediacy in detecting the failure.

【0004】[0004]

【課題を解決するための手段】本発明のバス障害検出方
式は、複数のケーブルと複数のバス中継基板を介して中
継されバス終端基板およびバスマスタ装置を両端とする
バスと、前記ケーブルと前記バス中継基板とを介して中
継され前記バス終端基板を始端とし且つ前記バスマスタ
装置を終端として前記バス終端基板内で接地し、前記バ
ス中継基板とバスマスタ装置は内蔵するレシーバ前段に
おいてプルアップされた障害検出信号線を有している。
SUMMARY OF THE INVENTION A bus fault detection system of the present invention is a bus relayed via a plurality of cables and a plurality of bus relay boards and having a bus terminating board and a bus master device at both ends, the cable and the bus. Fault detection that is relayed via a relay board and grounded in the bus termination board with the bus termination board as the starting point and the bus master apparatus as the termination point It has a signal line.

【0005】そして、前記バスマスタ装置は前記障害検
出信号線の電位がローレベルからハイレベルに変化した
ことを検出する変化検出回路を備えている。
The bus master device includes a change detection circuit for detecting that the potential of the fault detection signal line has changed from low level to high level.

【0006】[0006]

【作用】本発明の構成において、ケーブル,バス終端基
板,バス中継基板の抜けが発生すると、バス障害検出信
号線の電位がローレベル(地気)からハイレベル(電
源)に変化して障害を検出することができる。
In the configuration of the present invention, when the cable, the bus terminating board, and the bus relay board are disconnected, the potential of the bus fault detection signal line changes from low level (earth) to high level (power) to cause a fault. Can be detected.

【0007】[0007]

【実施例】次に本発明について図面を参照して説明す
る。図1は本発明のバス障害検出方式の一実施例を示す
ブロック図である。
The present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of a bus failure detection system of the present invention.

【0008】本実施例はバスマスタ装置1とバス終端基
板4との間にケーブル30,バス中継基板21,ケーブ
ル31,〜バス中継基板2n,ケーブル3nが縦続接続
された構成を有する。バスの各ケーブル30,31〜3
nはバス信号線13と障害検出信号線14とを有し、障
害検出信号線14nは始端のバス終端基板4内でドライ
バ14の入力が接地され、各バス中継基板2n,〜21
内ではレシーバ10の前段でプルアップ抵抗(以下R)
8を介して+5V電源に接続されてプルアップされ且つ
レシーバ10,ドライバ9を介して次段のバス中継基板
への障害検出信号線と接続される。そしてバス中継基板
21のドライバ9出力の障害検出信号線140は終端の
バスマスタ装置1内でR6を介して+5V電源と接続さ
れてプルアップされ且つレシーバ7を介して変化検出回
路(以下DET)5と接続されている。 このように構
成した本実施例において、ケーブル30,31,〜3
n、バス中継基板21,〜2n、バス終端基板4のうち
のいずれか1つが抜去されると、レシーバ7入力の信号
がローレベルからハイレベルに変化し、DET5はこの
変化によって障害の発生を検出する。
In this embodiment, a cable 30, a bus relay board 21, a cable 31, a bus relay board 2n, and a cable 3n are cascade-connected between the bus master device 1 and the bus termination board 4. Bus cables 30, 31 to 3
n has a bus signal line 13 and a fault detection signal line 14, and the fault detection signal line 14n is grounded at the input of the driver 14 in the bus termination board 4 at the starting end, and each bus relay board 2n, ...
Inside, there is a pull-up resistor (hereinafter R) in front of the receiver 10.
It is connected to the + 5V power source via 8 and pulled up, and connected via the receiver 10 and the driver 9 to the fault detection signal line to the bus relay board of the next stage. The fault detection signal line 140 of the driver 9 output of the bus relay board 21 is connected to the + 5V power source via R6 in the terminating bus master device 1 and pulled up, and via the receiver 7 the change detection circuit (hereinafter DET) 5 Connected with. In this embodiment configured as above, the cables 30, 31, to 3 are
When any one of n, the bus relay boards 21 to 2n, and the bus termination board 4 is removed, the signal at the input of the receiver 7 changes from the low level to the high level, and the DET 5 causes a failure due to this change. To detect.

【0009】[0009]

【発明の効果】以上説明したように本発明は、各バス中
継基板においてプルアップされ、バス終端基板において
接地された障害検出信号線を設けることにより、データ
のバス転送を行わずにケーブル抜け,基板抜けの障害を
即時に検出できるという効果を有する。
As described above, according to the present invention, by providing the fault detection signal line that is pulled up in each bus relay board and grounded in the bus termination board, the cable disconnection without the data bus transfer, This has the effect of enabling immediate detection of a failure of the board.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明のバス障害検出方式の一実施例を示すブ
ロック図である。
FIG. 1 is a block diagram showing an embodiment of a bus failure detection system of the present invention.

【符号の説明】[Explanation of symbols]

1 バスマスタ装置 21,〜2n バス中継基板 30,31,〜3n ケーブル 4 バス終端基板 5 変化検出回路(DET) 6,8 プルアップ抵抗(R) 7,10 レシーバ 9,11 ドライバ 13 バス信号線 140,141,〜14n 障害検出信号線 1 Bus Master Device 21, ~ 2n Bus Relay Board 30, 31, ~ 3n Cable 4 Bus Termination Board 5 Change Detection Circuit (DET) 6,8 Pull-up Resistor (R) 7,10 Receiver 9,11 Driver 13 Bus Signal Line 140 , 141 to 14n Fault detection signal line

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 複数のケーブルと複数のバス中継基板を
介して中継されバス終端基板およびバスマスタ装置を両
端とするバスと、前記ケーブルと前記バス中継基板とを
介して中継され前記バス終端基板を始端とし且つ前記バ
スマスタ装置を終端として前記バス終端基板内で接地
し、前記バス中継基板とバスマスタ装置は内蔵するレシ
ーバ前段においてプルアップされた障害検出信号線を有
することを特徴とするバス障害検出方式。
1. A bus relayed via a plurality of cables and a plurality of bus relay boards and having a bus termination board and a bus master device at both ends, and a bus relayed via the cables and the bus relay board, A bus fault detection method characterized by being grounded in the bus terminating board with the bus master device as a start end and terminating with the bus master device, and the bus relay substrate and the bus master device have a fault detection signal line pulled up in a preceding stage of a built-in receiver. .
【請求項2】 前記バスマスタ装置は前記障害検出信号
線の電位がローレベルからハイレベルに変化したことを
検出する変化検出回路を備えることを特徴とする請求項
1記載のバス障害検出方式。
2. The bus fault detection method according to claim 1, wherein the bus master device includes a change detection circuit that detects that the potential of the fault detection signal line has changed from low level to high level.
JP4083804A 1992-04-06 1992-04-06 Bus fault detection system Withdrawn JPH05298202A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4083804A JPH05298202A (en) 1992-04-06 1992-04-06 Bus fault detection system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4083804A JPH05298202A (en) 1992-04-06 1992-04-06 Bus fault detection system

Publications (1)

Publication Number Publication Date
JPH05298202A true JPH05298202A (en) 1993-11-12

Family

ID=13812854

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4083804A Withdrawn JPH05298202A (en) 1992-04-06 1992-04-06 Bus fault detection system

Country Status (1)

Country Link
JP (1) JPH05298202A (en)

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A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 19990608