JPH0529541A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain breakdown strength sufficient for electric fields, by a method wherein, after an oxide film is formed inside a trench by first thermal oxidation, the oxide film is wholly eliminated, and then an oxide film is formed by second thermal oxidation. CONSTITUTION:The following are provided; a process forming an oxide film 19 by first thermal oxidation, a process eliminating the oxide film 19 formed by the thermal oxidation, and a process forming an oxide film 21 by second thermal oxidation. Polycrystalline silicon 23 is buried in a trench where the oxide film 21 is formed. That is, after a trench whose sectional shape is rectangular is formed and the oxide film 19 is formed by thermal oxidation, firstly the whole part of the oxide film 19 is eliminated by, e.g. etching. The shapes of the side-wall. and the bottom of the trench are curved by oxidation. At the time of forming the oxide film 21 by the second thermal oxidation, edge parts are not present on the side wall and the bottom of the trench, so that stress concentration of the oxide film 21 and a thin film region of high density are not generated. Thereby electric concentration is not caused, and breakdown strength sufficient for electric fields can be obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, for example, a trench capacitor for memory cells.
And a method for manufacturing a semiconductor device.

[0002]

2. Description of the Related Art In recent years, LSIs in which submicron-sized elements have been miniaturized and mounted at high density have been developed. With such advances in miniaturization and high integration, in conventional LSIs that require large capacitance, capacitors are formed on the sidewalls of deep trenches dug in a silicon substrate so that large capacitance can be obtained even with a small occupied area. A capacitor has been proposed. Such a capacitance is generally called a trench capacitor and has a structure shown in FIG. As the dimensions of such a trench capacitor, for example, the opening is about 1 μm or less than 1 μm, and the groove depth is 2 μm.
It has a high aspect ratio of m or more.

However, trench capacitors are required to have much more stringent requirements on dielectric films than conventional planar capacitors. First, since the trench capacitor has a thin dielectric film formed on the inner wall of the trench formed by reactive ion etching, it is easily affected by the surface roughness of the silicon surface accompanying etching and etching damage. Also,
At the edge where the shape of the oxide film intersects the side wall and the bottom of the groove, the oxide film thickness is reduced. The reason for this is
The oxide film grows from the interface, but Si-
When a compressive stress is applied to the SiO ₂ interface, the oxidation rate is reduced, and it is considered that the oxide film thickness is reduced at the edge portion E as shown in FIG. In the shape of the oxide film 101 shown in FIG.
The film thickness of the edge portion E is 30
It becomes very thin with ~ 60Å. Although the film thickness of the edge portion varies depending on the oxidation condition, the thin film thickness of the edge portion is because the density of the oxide film is high and the stress is concentrated. Concentrate,
Leakage current and breakdown voltage are likely to occur.

As a method of eliminating such a decrease in the thickness of the oxide film, there is a method of removing the surface layer etched by sacrificial oxidation, so-called rounding oxidation. This method is a method in which oxidation is performed at a high temperature of, for example, about 1100 ° C. In this method, the viscosity of SiO ₂ is reduced and the compressive stress is relaxed, so that the edge portion is rounded. However, this method has a drawback that it is difficult to use as an LSI process in terms of redistribution of impurities because oxidation is performed at a relatively high temperature.

[0005]

DISCLOSURE OF THE INVENTION The present invention, as described above, has the following advantages:
It is possible to form an oxide film with a substantially uniform thickness, obtain an oxide film with no surface defects, and manufacture high-performance trench capacitors that do not cause leakage due to electric field concentration. An object of the present invention is to provide a method of manufacturing a semiconductor device that can be manufactured.

[0006]

In order to solve the above-mentioned problems, the present invention provides a step of forming an etching mask having a required opening on a main surface of a semiconductor substrate, and the semiconductor substrate through the opening of the etching mask. A step of performing anisotropic etching in a direction perpendicular to the main surface of the semiconductor substrate to form a groove in the semiconductor substrate, and a step of implanting predetermined impurity ions into the sidewall and bottom of the groove from above the semiconductor. A method of manufacturing a device, comprising: after the step of implanting impurity ions, the step of forming an oxide film on the side wall and the bottom of the groove by thermal oxidation; the step of removing the oxide film formed by thermal oxidation; A method for manufacturing a semiconductor device is provided, which comprises a step of forming an oxide film on a sidewall and a bottom portion of the groove by thermal oxidation of 1) and a step of filling the groove in which the oxide film is formed with polycrystalline silicon. To.

Preferably, the step of removing the oxide film formed by the thermal oxidation and the step of forming the oxide film on the side wall and the bottom of the groove by the second thermal oxidation may be repeated a plurality of times.

[0008]

According to the present invention, as in the conventional method, a trench having a rectangular cross section is formed, an oxide film is formed by thermal oxidation, and then the oxide film is first completely removed by, for example, etching, thereby performing oxidation. The sidewalls and bottom of the trench have a curved shape, and when the oxide film is formed by the next thermal oxidation, there is no edge on the sidewall and bottom of the trench. The second thermal oxidation did not occur, whereas the oxide film formed by the first thermal oxidation was formed on the silicon film having a defect due to the anisotropic etching of the reactive ion etching during trench formation. A uniform high-quality oxide film is formed on the defect-free silicon film that appears by etching other than the reactive ion etching after thermal oxidation of Al. It is possible to obtain a breakdown voltage.

By repeating the oxide film removing step and the thermal oxidation step a plurality of times in order to obtain a trench having a desired shape and film quality, it is possible to form a trench capacitor having a sufficiently high-quality oxide film having a withstand voltage.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment for carrying out a semiconductor device manufacturing method according to the present invention will be described below. 1 (a)-
(F) is DR as an example for implementing the manufacturing method of the present invention.
Partial cross-sectional views of the semiconductor device in each of a series of main steps in the case of manufacturing an AM trench capacitor element are shown.

First, as shown in FIG. 1A, a silicon nitride film 13 having a thickness of 1000 to 10000Å is deposited on the main surface of a P-type silicon substrate 11 by the CVD method, and the silicon nitride film 13 is formed. A resist film 15 having a predetermined thickness on top
Is applied, and patterning is performed by a photolithography method to obtain a pattern having a predetermined opening. The size of this opening is about 1 μm □. This resist film 1
Reference numeral 5 serves as an etching mask when performing dry etching later.

Next, referring to FIG. 1B, first, anisotropic etching is performed by reactive ion etching (RIE) using the resist film 13 as a mask to form trenches in the silicon nitride film 13 and the silicon substrate 11. Do a dug. In this case, the opening of the mask is opened to about 1 μm to form a trench 17 as a vertical etching region having a depth of about 3 μm in the vertical direction. This etching may cause surface roughness or etching damage to be formed on the silicon surface of the inner wall of the trench. However, this surface roughness and etching damage are removed by the next step, that is, the thermal oxidation and oxide film removal steps.

Then, the side wall and the bottom wall surface of the substrate in the trench groove formed by anisotropic etching such as reactive ion etching are ion-implanted to form electrodes. In this case, the ion implantation is performed at a predetermined implantation angle, and the implantation energy is 40 keV or less for B ⁺ , BF ₂ ⁺
If this is the case, set it to 120 keV or less. This diagonal ion implantation
Implantation is performed at an angle according to the opening width of the trench 17, for example, 45 °, and the implantation direction is changed. Therefore, the wafer is flipped twice or four times, or while rotating, the impurity ions are evenly distributed on the sidewall or bottom wall in the trench. Is preferably injected. Annealing may be performed to activate the crystal defects due to ion implantation, but it may be omitted because the subsequent thermal oxidation step is performed.

Referring to FIG. 1C, the resist is removed.
Then, thermal oxidation is performed with the silicon nitride film 13 remaining.
The oxide film 19 is formed only inside the trench 17. Silicon nitride
The oxide film is left on the upper surface of the silicon substrate to leave the con film 13.
This is because it is not formed. The conditions for thermal oxidation are temperature and
Depending on the time, the curvature of the interface of the oxide film with the silicon substrate,
You can change the round. This round
Oxidation is rounding oxide (Roudin
g Oxidation). This round oxidation is
As explained in the prior art, relatively high temperature, for example, 11
00 ° C dry O ₂When oxidized by oxidation, SiO₂The viscosity of
Rounded edges due to increased and relaxed compressive stress
However, in the present invention, at a temperature lower than the above temperature,
Performs thermal oxidation, preferably dry O at 950 ° C or lower₂
Oxidation has some effect of rounding the edges.
Good.

Referring to FIG. 1D, the silicon nitride film 13 and the oxide film 19 are removed by etching. The etching may be a wet etching method other than reactive ion etching or a dry etching method. In the case of the wet etching method, hydrofluoric acid (HF) is used, and in the case of the dry etching method, a CF ₄ gas is used. Perform using. In this embodiment, hydrofluoric acid (H
It will be performed in the atmosphere of F). After wet etching,
Purely clean and bake silicon wafer (substrate) or
Dry with a spin dryer. The other etching is carried out without using the reactive ion etching in order to wash out the clean polycrystalline silicon surface having no lattice defect by etching.

Referring to FIG. 1E, the second thermal oxidation is performed. In this case, the silicon surface inside the trench has an exposed surface that is free from surface roughness and etching damage due to anisotropic etching, and the surface shape is also a curved shape without an edge portion. Therefore, it is not necessary to select the condition like the first thermal oxidation to perform the round oxidation, but the oxidation condition is appropriate so that a good quality oxide film can be obtained. The temperature condition is preferably a relatively low temperature, for example, 850 ° C to 9 ° C.
It is preferably about 50 ° C. Oxide film 21 is also formed on the silicon substrate by this second thermal oxidation. This oxide film 21 becomes a gate oxide film.

Referring to FIG. 1F, a polycrystalline silicon film 23 is deposited in order to form the other electrode as a capacitor in the trench in which oxide film 21 has been formed by thermal oxidation. The film thickness on the surface of this substrate is 1000-5000Å
Try to be around. Of course, the inside of the trench is also filled with the polycrystalline silicon film 23. In this case, the polycrystalline silicon may be deposited while doping phosphorus or boron as a dopant.

Finally, patterning is performed on the region of the polycrystalline silicon film 23 exposed on the substrate surface.

Through the above steps, a trench capacitor is obtained. According to the manufacturing method of the present invention, the edge portion inside the trench is formed by the oxidation-removal-oxidation of the side wall inside the trench twice (more times if necessary).
The initially rectangular cross section becomes a curved surface, and thermal oxidation of the curved silicon surface minimizes the deterioration of the film quality at the edge portion and alleviates the electric field concentration.

Regarding the method of manufacturing a semiconductor device according to the present invention, the trench capacitor in the memory cell of the DRAM has been described. However, the trench capacitor thus obtained can be applied to CMOS and other semiconductor devices. Of course.

[0021]

According to the present invention, like the conventional method, a trench having a rectangular cross section is formed, an oxide film is formed by thermal oxidation, and then the oxide film is completely removed.
Oxidation causes the sidewalls and bottom of the trench to have a curved shape. When the oxide film is formed by the next second thermal oxidation, there is no edge on the sidewall and bottom of the trench. A thin film region of high density does not occur, and a sufficient breakdown voltage can be obtained against an electric field.

In the second thermal oxidation, the oxide film formed by the first thermal oxidation was formed on the silicon film having a defect due to the dry etching at the time of forming the trench, whereas the silicon film having no defect was oxidized at a high quality. Since the film is formed, the breakdown voltage against the electric field can be further improved.

By repeating the oxide film removing step and the thermal oxidation step a plurality of times to obtain a trench having a desired shape and film quality, it is possible to form a trench capacitor having a sufficiently high-quality oxide film having a withstand voltage.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing main steps (a) to (f) of a method for manufacturing a semiconductor device such as a trench capacitor according to the present invention.

FIG. 2 is a cross-sectional view schematically showing a general trench capacitor.

FIG. 3 is an explanatory diagram illustrating a problem of a conventional trench capacitor.

[Explanation of symbols]

11 Silicon substrate 13 Silicon nitride film 15 Resist film 17 trench 19,21 Oxide film 23 Polycrystalline silicon film

Claims (2)

[Claims] 1. A step of forming an etching mask having a required opening on a main surface of a semiconductor substrate, and anisotropic etching in a direction perpendicular to the main surface of the semiconductor substrate from the opening of the etching mask. A step of forming a groove in the semiconductor substrate, a step of implanting predetermined impurity ions into the sidewall and bottom of the groove from the top of the groove, and a step of implanting impurity ions, followed by thermal oxidation to form the sidewall and bottom of the groove. A step of forming an oxide film on the groove, a step of removing the oxide film formed by thermal oxidation, a step of forming an oxide film on the sidewall and bottom of the groove by second thermal oxidation, and a groove in which the oxide film is formed. And a step of burying polycrystalline silicon in the semiconductor device. 2. The step of removing the oxide film formed by the thermal oxidation and the step of forming the oxide film on the side wall and the bottom of the groove by the second thermal oxidation are repeated a plurality of times. Item 2. A method of manufacturing a semiconductor device according to item 1.