JPH0529430A - Abnormality treatment device of ic testing apparatus - Google Patents

Abstract

PURPOSE:To surely treat the abnormality detection of a temperature and smoke sensor, a fan sensor, a power supply and the like. CONSTITUTION:A monitoring part 21 which is composed of a microcomputer is installed at a control device 12 which controls an IC testing apparatus 11; an abnormality interrupt is input not only to a computer 16 for control use but also to the monitoring part 21; and an abnormality treatment is executed doubly. The monitoring part 21 monitors the operation abnormality of the computer 16 for control use and monitors the abnormality mutually together with a watchdog timer 18.

Description

Detailed Description of the Invention

[0001]

This invention relates to a semiconductor integrated circuit (I
The present invention relates to a processing device when an abnormality such as a fire occurs in the device for testing C).

[0002]

2. Description of the Related Art A conventional device of this type is shown in FIG. IC
The test device 11 is controlled by the control device 12 to perform various tests on the IC element. An operator controls the power supply controller 13 to activate each power supply of the IC test device 11 and the control device 12 to put these devices into an operating state or a stopped state.

In the IC testing device 11, an abnormality such as a power supply abnormality, ignition, smoke generation, or stop of a cooling fan occurs, which causes an abnormality such as temperature, smoke sensor 14, fan sensor 1
5, the abnormality detection output is detected by the control device 1
2 to the control computer 16. When this interrupt occurs and the control computer 16 senses that it is the abnormal interrupt as shown in FIG. 4 (S ₁ ), the cause of the abnormality is investigated (S ₂ ), and the abnormal occurrence is notified to the terminal 17. and displays that the (S _3). Next, at the time of restarting, the data which is troubled to be destroyed, for example, the data in the middle of calculation is saved (S ₄ ), and thereafter the cause of the abnormality is sent to the terminal 17 and displayed (S ₅ ) (from the display of the cause of abnormality) , Prioritizing data save). Then turn off the IC test apparatus 11 and the control unit 12 issues a clear command to the power supply control unit 13 (S _6).

[0004]

The control unit 12 is usually
It is configured by a so-called mini computer, and it takes a relatively long time from turning on the power until it becomes a normal operation state, that is, before the abnormality processing program becomes operable. In other words, when the control device 12 is powered on, it is first initialized, the boot (BOOT) ROM is read out, the decryption is executed, and the operating system is loaded from the external storage device (disk or the like). The system is started, and the abnormality monitoring program starts to operate after the operating system is completed. Because of such processing, it takes about 30 seconds before the abnormality monitoring program starts operating. If an abnormality occurs during this preparation period, there is a problem that it cannot be processed.

If the input port for the abnormal interrupt of the control computer 16 is not operating properly, that is, if it has a failure, the abnormal interrupt cannot be accepted. If the control computer 16 is in a runaway state and is not operating normally, for example, an abnormal interrupt cannot be processed. With respect to the control computer 16, a so-called watchdog timer 18 regularly monitors whether or not there is an interrupt response. However, the watchdog timer 18 becomes defective and the control computer 16 becomes abnormal. It is not possible to handle abnormalities as in the above cases.

[0006]

According to the present invention, in addition to the conventional abnormality processing of the control device, the control device is provided with a monitoring section composed of a microcomputer, and the detection output of the abnormality which may lead to a fire is detected by the monitoring device. It is also supplied to the unit as an interrupt, and the monitoring unit displays an abnormality on the terminal by the interrupt and controls power-off.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows an embodiment of the present invention, and parts corresponding to those in FIG. In the present invention, the control unit 12 is provided with the monitoring unit 21. The monitoring unit 21 is composed of a microcomputer, and when an abnormality associated with a fire that has occurred in the IC test apparatus 11 is detected, the detection output is supplied to the control computer 16 as an interrupt as in the conventional case, and the monitoring unit 21 is also provided. Is also supplied as an interrupt. When this interrupt is supplied to the control computer 16, the control computer 16 performs the same abnormality processing as in the conventional case as shown in FIG. 4, for example.

When the abnormality detection output is interrupted, the monitoring unit 21 performs abnormality processing as shown in FIG. 2, for example. Monitoring unit 2
When it is detected that 1 is an interruption of the abnormality detection (S
₁ ), the cause of the abnormality is investigated (S ₂ ), the state of the control computer 16 is monitored (S ₃ ), and the control computer 1
6 checks whether or not the notification of abnormality has been sent to the terminal 17 (S ₄ ), and if the notification has not been given within a predetermined time, for example, within 1 second, it is considered that there is some abnormality on the control computer 16 side. Then, the detected abnormality of the IC test apparatus 11 is notified to the terminal 17 and the cause of the abnormality is also notified and displayed on the terminal 17 (S ₅ ). Thereafter, each power of the IC testing apparatus 11 and the control unit 12 to the cross-sectional out off command to the power control unit 13 (S _6).

The reason for setting the time within 1 second in step S ₄ is that, when the control computer 16 is normal, the time from the interruption to the abnormality notification is within about 0.5 seconds. If the abnormality occurrence is not notified in step S ₄ , a predetermined time, that is, the time required for the processing from the interrupt by the control computer 16 to the power off (FIG. 4) to end
For example, wait about 3 seconds (S ₇ ) and turn off the power (S
₈ ). This power-off process becomes invalid once the control computer 16 turns off the power.

In this example, the operating state of the control computer 16 is monitored periodically, for example, every 5 seconds.
The monitoring unit 21 checks whether the report is normal or not, and if it is abnormal, displays an error on the terminal 17 and instructs the power controller 13 to turn off the power. Further, when the control computer 16 does not receive a periodical report, an abnormality is displayed and the power is cut off. Further, in this example, the watchdog timer 18 interrupts the monitoring unit 21 periodically (for example, every second) (this interrupt is also performed when an abnormality occurs), and when the monitoring unit 21 receives the interrupt, it sends a response to the watchdog timer 18. If the watchdog timer 18 does not respond from the monitoring unit 21, the power is turned off. On the other hand, the monitoring unit 21 monitors whether there is an interrupt from the watchdog timer 18 regularly (every 1 second in the above example) with another timer, and when the interrupt disappears, it is considered that the watchdog timer 18 has an abnormality. Power off.

[0011]

As described above, according to the present invention, the monitoring unit 21 also performs abnormality monitoring, and since the monitoring unit 21 is composed of a microcomputer, it is initialized and activated after the power is turned on. A ROM (BOOT ROM) is read out, decrypted and executed to carry out a start-up process to start the operating system. However, since the operating system is also stored in the BOOT ROM, the operating system is started and the abnormality monitoring program becomes operable. Since the time from power-on until about 1 second is remarkably faster than that of the control computer 16, even if an abnormality occurs in the startup preparation state of the control computer 16, this abnormality processing is monitored by the monitoring unit 21. Can be done correctly with.

Further, since the processing for the abnormal interrupt is duplicated by the control computer 16 and the monitoring unit 21, it is unlikely that both of them will be in a failure state such as an input port abnormality or runaway at the same time. The processing can be performed reliably. When the power supply of the control device 12 becomes abnormal and drops, the control computer 1
6 cannot operate with a voltage drop of about 10%, but can concentrate on saving data for restart, and the monitoring unit 21 can operate until the voltage drops by about 30%. Can be processed.

Further, as in the above-mentioned embodiment, the monitoring unit 21 monitors the control computer 16 for an abnormality, and the monitoring unit 21
And watchdog timer 18 monitor each other for abnormalities,
There are three checks for abnormalities, and the abnormalities can be detected reliably and promptly.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a flowchart showing a processing example of a monitoring unit 21 for an abnormal interrupt.

FIG. 3 is a block diagram showing an abnormality processing device of a conventional IC test device.

FIG. 4 is a flowchart showing a processing example for an abnormal interrupt of the control computer 16.

Claims (1)

Claims: 1. When an abnormality that causes a fire is detected in the IC test apparatus, the abnormality detection output interrupts the control computer of the control unit that controls the IC test apparatus, In the abnormality processing device of the IC test device, the control computer displays the abnormality on the terminal and turns off the power of the IC test device and the control device, and the abnormality processing device is provided in the control device and configured by a microcomputer. An abnormality processing device for an IC test apparatus, comprising an abnormality detection output supplied as an interrupt, and having a monitoring unit for performing the abnormality display and power-off by the interrupt.