JPH0528773A - Ferroelectric memory - Google Patents

Abstract

PURPOSE:To increase the information quantity per unit cell by providing electrodes on a front side and a rear of a ferroelectric substance, applying a pulse electric field on a specified electrode and generating more than three values of polarization inversion state. CONSTITUTION:A ferroelectric capacitor 3 has a large surface of electrode 6 on the surface of one ferroelectric substance and two pieces of a small surface area of electrodes 7, 8 adjacent to the rear side and the electrodes 7, 8 are connected to reference potential lines 4, 5. The lines 4, 5 hold the voltage pulse applied on them and the electrode 6 is connected to a bit line 1 via the source and the drain of a field-effect transistor FET 9. In the ferroelectric memory, one of the adjacent plural electrodes 7, 8 is specified and a pulse field applied between the electrode 6. Thus more than 3 places of polarization inversion state are obtained and the information quantity per unit of the capacitor 3 can be increased without increasing the cell area.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ferroelectric memory using a ferroelectric capacitor.

[0002]

2. Description of the Related Art Recently, a ferroelectric capacitor has been used as a memory for holding a binary charge amount.

[0003]

However, in this type of conventional ferroelectric memory, one ferroelectric capacitor can hold a binary charge amount. Was required to have a plurality of ferroelectric capacitors corresponding to the number.

[0004]

According to the present invention, at least one electrode is provided on the surface of one ferroelectric substance, and two or more electrodes are provided on the back face of the ferroelectric substance. By selectively selecting one electrode for each of the front surface and the back surface from the inside and using it as a ferroelectric memory, it is possible to hold the amount of electric charges of the selectively selected number.

For example, as the ferroelectric memory of the present invention, one electrode A is provided on the front surface of one ferroelectric material and two electrodes B and C are provided on the back surface thereof so as to be adjacent to each other. Select one electrode on the front and one on the back, and select AB; A
C; By specifying each one from ABC, it is possible to obtain three different charge amounts in accordance with the positions AB, AC and ABC of the electrodes. It should be noted that one ferroelectric substance may be arranged by arranging two ferroelectric substances in parallel so as to apparently form one ferroelectric substance.

[0006]

Therefore, according to the ferroelectric memory of the present invention having the above-mentioned structure, one ferroelectric capacitor can hold a plurality of electric charges, so that a plurality of values can be stored with a simple structure. The ferroelectric memory can be provided as a memory device.

Therefore, the amount of information per unit cell can be increased to three or more. For example,
The amount of information per unit cell is increased from two values to three or more, and the amount of information per unit area can be dramatically increased without changing the cell area.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention shown in the drawings will be described below. FIG. 1 is a circuit diagram showing an embodiment of the ferroelectric memory of the present invention, and FIG. 2 is a characteristic diagram of electric field polarization in the circuit diagram of FIG.

The ferroelectric capacitor (3) shown in FIG.
A large area electrode (6) is provided on the front surface of each ferroelectric, while two small area electrodes (7), (8) adjacent to the back surface are provided.
And the electrodes (7) and (8) on the back surface are bonded to the reference potential lines (4) and (5), respectively. The reference potential lines (4), (5) are normal reference potentials and are preferably grounded, but the lines (4), (5) can carry non-zero voltage pulses applied to them. . The electrode (6) on the surface of the capacitor (3) is coupled to the bit line (1) via the source and drain of the field effect transistor (FET) (9).

The FET (9) of FIG. 1 is an N-channel device, thus coupling the drain electrode D of the FET (9) to the bit line (1), while the source electrode S of the FET (9) is a capacitor ( It is bonded to the surface electrode (6) of 3). The gate electrode G is coupled to the separately controlled word line WL (2). The present invention does not necessarily include N
It is not necessary to use channel FETs, and other switching devices can be used.

In the ferroelectric memory 3 of FIG. 1, the electric field one polarization characteristic when the electrodes 6 and 7 are used is a curve passing through C at BD in FIG. 2, and when the electrodes 6 and 8 are used, DB of 2
2 is a curve that passes through E, and when electrodes 6, 7, and 8 are used, a curve that passes through G and I at FH in FIG.

Therefore, if the FET 9 is turned on and off to selectively specify any one of the electrode sets 6, 7; 6, 8; 6, 7, 8; C; E; G, I It is possible to obtain a charge amount of three values or more.

As described in detail in the above embodiment, in the ferroelectric memory of the present invention, an appropriate pulsed electric field is applied to each electrode of one ferroelectric having a plurality of adjacent electrodes. As a result, a polarization inversion state of two or more values can be generated in one ferroelectric substance, and thereby the storage capacity per cell can be increased.

[0014]

As described above, according to the present invention, a ferroelectric capacitor having a plurality of adjacent electrodes and a switching Tr are connected to each electrode of the capacitor, and each electrode of the ferroelectric is selected by switching the Tr. By applying an appropriate pulsed electric field to each selected electrode, three or more polarization inversion states can be obtained, and the amount of information per unit cell of the ferroelectric capacitor is the cell area. It is possible to dramatically increase the amount of information per unit area from a binary value to a ternary value or more without increasing.

[Brief description of drawings]

FIG. 1 is an electric circuit diagram showing an embodiment of a ferroelectric memory of the present invention.

FIG. 2 is a characteristic diagram of electric field / polarization of the electric circuit diagram of FIG.

[Explanation of symbols]

1 bit line 2 word lines 3 Ferroelectric 4 DL1 (drive line) 5 DL2 (drive line) 6 Surface electrode 7 Backside electrode 8 Backside electrode 9 FET

Claims (2)

[Claims] 1. A ferroelectric material is provided with at least one or more electrodes on the front surface, and at least two or more electrodes are provided on the back surface, and one electrode is provided on each of the front surface and the back surface from among the electrodes. A ferroelectric memory characterized in that it is selectively specified and a pulsed electric field is applied to the specified electrode so as to generate a polarization inversion state of three or more values. 2. One large-area electrode is provided on the front surface of one ferroelectric substance, while two small-area electrodes are provided adjacently on the rear surface, and the front surface and the back surface are provided from inside the electrode. A circuit for selectively specifying each electrode and a circuit for applying a pulsed electric field to the specified pair of electrodes are provided.
A ferroelectric memory characterized in that a polarization inversion state of a value is generated.