JPH05267234A - Semiconductor manufacturing equipment - Google Patents

Semiconductor manufacturing equipment

Info

Publication number
JPH05267234A
JPH05267234A JP6541792A JP6541792A JPH05267234A JP H05267234 A JPH05267234 A JP H05267234A JP 6541792 A JP6541792 A JP 6541792A JP 6541792 A JP6541792 A JP 6541792A JP H05267234 A JPH05267234 A JP H05267234A
Authority
JP
Japan
Prior art keywords
electrode
etching
particles
wafer
semiconductor manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6541792A
Other languages
Japanese (ja)
Inventor
Yuji Yamashita
雄士 山下
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Semiconductor Manufacturing Co Ltd
Original Assignee
Renesas Semiconductor Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Semiconductor Manufacturing Co Ltd filed Critical Renesas Semiconductor Manufacturing Co Ltd
Priority to JP6541792A priority Critical patent/JPH05267234A/en
Publication of JPH05267234A publication Critical patent/JPH05267234A/en
Pending legal-status Critical Current

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  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE:To provide equipment which can remove particles generated by RF etching. CONSTITUTION:This equipment has particle countermeasure electrodes 5 in a direction vertical to an upper RF electrode 2 and a lower RF electrode 3 and is provided with on-off covers 7 to prevent floating of removed particles. This design can prevent redeposit of etched particles onto a wafer and enables elongation of chamber cleaning.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明はエッチング装置、特に
成膜装置に付設するエッチング装置に関し、RFエッチ
により発生するパーティクルのウェーハへの付着の低減
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an etching apparatus, and more particularly to an etching apparatus attached to a film forming apparatus, and more particularly to reducing adhesion of particles generated by RF etching to a wafer.

【0002】[0002]

【従来の技術】従来スパッタ装置に成膜に先立ってウェ
ーハ表面をエッチングするためにエッチング装置を付設
したものがある。このような成膜装置に付設したエッチ
ング装置について、図面を用いて説明する。
2. Description of the Related Art There is a conventional sputtering apparatus additionally provided with an etching apparatus for etching the wafer surface prior to film formation. An etching apparatus attached to such a film forming apparatus will be described with reference to the drawings.

【0003】図2は従来のRFエッチング装置の縦断面
図である。
FIG. 2 is a vertical sectional view of a conventional RF etching apparatus.

【0004】1はチャンバー,2は上部RF電極,3は
下部RF電極,4は下部電極カバー,6はウェーハであ
る。エッチングはウェーハ6に対し、平行に置かれたR
F電極2,3から、RFがかかりアルゴン等の不活性ガ
スのプラズマが生じウェーハ表面をエッチングするもの
となっていた。上部RF電極2と下部RF電極3との間
にウェーハ6が置かれエッチングされるものであり、そ
してそのエッチングされたパーティクルは、チャンバー
内から除去されることはなく、浮遊したり、下部電極カ
バー4の上に堆積していくものとなっていた。
Reference numeral 1 is a chamber, 2 is an upper RF electrode, 3 is a lower RF electrode, 4 is a lower electrode cover, and 6 is a wafer. The etching is performed by placing the R on the wafer 6 in parallel.
RF is applied from the F electrodes 2 and 3 and plasma of an inert gas such as argon is generated to etch the wafer surface. The wafer 6 is placed between the upper RF electrode 2 and the lower RF electrode 3 to be etched, and the etched particles are not removed from the chamber but float or are covered with the lower electrode cover. It was supposed to be deposited on top of 4.

【0005】[0005]

【発明が解決しようとする課題】ところで、上記の従来
のスパッタリング装置に付設するRFエッチング装置で
は、エッチングされたパーティクルが下部電極カバー上
に堆積していくようになっているので、処理を重ねてい
くたびに、その堆積したパーティクルが剥がれチャンバ
ー内を浮遊し、ウェーハに再付着し、歩留り低下の要因
の一つになっていた。
By the way, in the RF etching apparatus attached to the above-mentioned conventional sputtering apparatus, since the etched particles are deposited on the lower electrode cover, repeated treatments are required. Every time the deposited particles were peeled off and floated in the chamber and were reattached to the wafer, which was one of the causes of a decrease in yield.

【0006】また、このパーティクルを除去する方法と
しては、パーティクルの堆積した下部電極カバーを交換
し、チャンバー内を清掃するために、設備を停止しなけ
ればならず処理能力が低下するという欠点があった。
Further, as a method of removing the particles, there is a drawback that the equipment has to be stopped in order to replace the lower electrode cover on which the particles are deposited and clean the inside of the chamber, which lowers the processing capacity. It was

【0007】特に、スパッタリング成膜装置に付設した
エッチング装置の場合、エッチング後、外に出すことな
くスパッタリング室に移送されて成膜するので、ウェー
ハにパーティクルが付着すると、その場所のチップは不
良となってしまい、特に問題であった。
Particularly, in the case of an etching apparatus attached to a sputtering film forming apparatus, after etching, the film is transferred to the sputtering chamber without being taken out, and a film is formed. It was a particular problem.

【0008】[0008]

【課題を解決するための手段】この発明は、上記の課題
を解決するために、RFエッチング装置内にRFエッチ
電極の他に、その電極に対し、垂直な方向に他の電極を
有していることを特徴とするものである。
In order to solve the above problems, the present invention provides an RF etching apparatus with an RF etching electrode and another electrode in a direction perpendicular to the RF etching electrode. It is characterized by being present.

【0009】[0009]

【作用】上記の構成によると、チャンバー内に浮遊して
いるパーティクルを、チャンバー外へ除去してしまうこ
とはできないとしても、垂直な方向に配置した他の電極
により静電的に一時的にRF電極とウェーハとの間から
パーティクルを除去し、ウェーハへの再付着を防止する
ことが可能となる。
According to the above construction, even if the particles floating in the chamber cannot be removed to the outside of the chamber, another electrode arranged in the vertical direction electrostatically temporarily RFs them. It is possible to remove particles from between the electrode and the wafer and prevent reattachment to the wafer.

【0010】[0010]

【実施例】以下、この発明について図面を参照して説明
する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings.

【0011】図1は、この発明の一実施例のスパッタリ
ング装置付着のRFエッチング装置の断面図である。図
において、5はパーティクル対策電極、7は開閉式カバ
ーである。その他従来例図2と同じ所は同一符号を付し
て説明を略す。この実施例によれば、従来、RFエッチ
により、下部電極カバー上4に堆積する一方だったパー
ティクルを、RF電極2,3に電圧を印加する前に、パ
ーティクル対策電極5電圧を印加することにより、一時
的にRF電極2,3間のパーティクルを一方向に除去す
ることができる。また、一方向に除去したパーティクル
の浮遊防止のためには、パーティクル対策電極5の上に
開閉式のカバー7を設け、電圧が印加された時のみカバ
ー7が開くようになっている。
FIG. 1 is a sectional view of an RF etching apparatus attached to a sputtering apparatus according to an embodiment of the present invention. In the figure, 5 is a particle countermeasure electrode, and 7 is an openable / closable cover. Other conventional examples The same parts as those in FIG. According to this embodiment, particles that were conventionally deposited on the lower electrode cover 4 by RF etching are applied to the particle electrode 5 before applying the voltage to the RF electrodes 2 and 3. The particles between the RF electrodes 2 and 3 can be temporarily removed in one direction. In order to prevent the particles removed in one direction from floating, an openable cover 7 is provided on the particle countermeasure electrode 5 so that the cover 7 is opened only when a voltage is applied.

【0012】また、ウェーハ6へのパーティクルの再付
着防止には、下部電極カバー4の交換及び、チャンバー
1内の清掃を行うしかなかったが、これより、清掃頻度
を延長することができるという利点もある。
Further, in order to prevent reattachment of particles to the wafer 6, the lower electrode cover 4 must be replaced and the inside of the chamber 1 must be cleaned. However, this has the advantage that the cleaning frequency can be extended. There is also.

【0013】[0013]

【発明の効果】以上説明したように、この発明は、RF
エッチチャンバー内に、パーティクル対策電極を有した
ことにより、一時的にパーティクルを除去し、ウェーハ
への再付着を防止できるという効果がある。
As described above, according to the present invention, the RF
Since the particle countermeasure electrode is provided in the etching chamber, it is possible to remove particles temporarily and prevent re-adhesion to the wafer.

【図面の簡単な説明】[Brief description of drawings]

【図1】 この発明のパーティクル対策電極を有するR
Fエッチチャンバーの断面図である。
FIG. 1 shows an R having a particle countermeasure electrode of the present invention.
It is sectional drawing of F etch chamber.

【図2】 従来のRFエッチチャンバーである。FIG. 2 is a conventional RF etch chamber.

【符号の説明】[Explanation of symbols]

1 RFエッチチャンバー 2 上部RF電極 3 下部RF電極 4 下部電極カバー 5 パーティクル対策用電極 6 ウェーハ 7 開閉式カバー 1 RF Etching Chamber 2 Upper RF Electrode 3 Lower RF Electrode 4 Lower Electrode Cover 5 Particle Counter Electrode 6 Wafer 7 Openable Cover

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】平行に配置した電極間にウェーハを置いて
エッチングするエッチング装置において、エッチングに
より発生するパーティクルを集める電極を有することを
特徴とする半導体製造装置。
1. An etching apparatus for etching a wafer by placing a wafer between electrodes arranged in parallel, the semiconductor manufacturing apparatus having an electrode for collecting particles generated by the etching.
【請求項2】前記パーティクルを集める電極に開閉可能
なカバーを設けた請求項1記載の半導体製造装置。
2. The semiconductor manufacturing apparatus according to claim 1, wherein the electrode for collecting the particles is provided with an openable / closable cover.
【請求項3】前記エッチング装置が成膜装置に付設した
ものであることを特徴とする請求項1または請求項2記
載の半導体製造装置。
3. The semiconductor manufacturing apparatus according to claim 1, wherein the etching apparatus is attached to a film forming apparatus.
【請求項4】前記成膜装置がスパッタリング装置である
ことを特徴とする請求項3記載の半導体製造装置。
4. The semiconductor manufacturing apparatus according to claim 3, wherein the film forming apparatus is a sputtering apparatus.
JP6541792A 1992-03-24 1992-03-24 Semiconductor manufacturing equipment Pending JPH05267234A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6541792A JPH05267234A (en) 1992-03-24 1992-03-24 Semiconductor manufacturing equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6541792A JPH05267234A (en) 1992-03-24 1992-03-24 Semiconductor manufacturing equipment

Publications (1)

Publication Number Publication Date
JPH05267234A true JPH05267234A (en) 1993-10-15

Family

ID=13286456

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6541792A Pending JPH05267234A (en) 1992-03-24 1992-03-24 Semiconductor manufacturing equipment

Country Status (1)

Country Link
JP (1) JPH05267234A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6306770B1 (en) 1998-03-20 2001-10-23 Nec Corporation Method and apparatus for plasma etching
JP2002151495A (en) * 2000-11-14 2002-05-24 Sharp Corp Plasma processing apparatus and semiconductor device manufactured thereby

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6306770B1 (en) 1998-03-20 2001-10-23 Nec Corporation Method and apparatus for plasma etching
JP2002151495A (en) * 2000-11-14 2002-05-24 Sharp Corp Plasma processing apparatus and semiconductor device manufactured thereby

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