JPH05259131A - Manufacture of semiconductor storage device - Google Patents

Abstract

PURPOSE:To increase the storage capacity of the storage device by forming an uneven part on the surface of polysilicon for storage node use by a method wherein first polysilicon is etched anisotropically by making use of a sidewall protective film as a mask, a polysilicon residue is formed and second polysilicon is deposited on it and then etched anisotropically. CONSTITUTION:First polysilicon 9 is deposited on a semiconductor substrate 1; a spontaneous oxide film on the first polysilicon 9 is etched anisotropically. Then, while a first polysilicon sidewall protective film formed by the etching operation is used as a mask, the first polysilicon 9 is etched anisotropically; polysilicon residues 12 are formed. Then, second polysilicon 13 is deposited on the polysilicon residues 12; after that, the second polysilicon 13 is etched anisotropically. For example, a contact window 9 which reaches an n<+> active region for a switching transistor formed on a p-type silicon substrate 1 is opened; after that, first polysilicon 9 is deposited.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor memory device, and more particularly to a method for manufacturing a dynamic random access memory (DRAM).

[0002]

2. Description of the Related Art In recent years, semiconductors have been miniaturized and highly integrated, and there has been a demand for a memory element having a larger storage capacity in a certain area. An example of a conventional method for manufacturing a semiconductor memory device will be described below with reference to the drawings. FIG. 3 shows a conventional memory node forming technique. As shown in FIG. 3A, after forming the isolation region 2 and the word line 3 on the p-type silicon substrate 1, the SiO2 film 4 is deposited and the bit line 5 is formed. Next, the NSG film 6 and BP
The SG film 7 is deposited and heat-treated to flow the BPSG film 7.
To do. Next, as shown in FIG. 2B, the contact window 8 reaching the n + active region of the switching transistor formed on the p-type silicon substrate 1 is opened by anisotropic etching. Next, polysilicon 13 is deposited, and then a resist pattern 14 is formed. Using this resist pattern 14 as a mask, the polysilicon 13 is anisotropically etched to form a memory node 15 as shown in FIG.

[0003]

However, in the above construction, the surface area of the memory node is small, and 64 MD
The DRAM after the RAM has a problem that the capacity is insufficient.

In view of the above problems, the present invention provides a method of manufacturing a storage node in which the storage capacity is increased by forming irregularities on the surface of the storage node polysilicon.

[0005]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention has a first means of depositing polysilicon, and the first step is to remove polysilicon under the condition of strong sidewall protection. The surface portion is anisotropically etched. By this etching, the side wall protection film is left on the polysilicon step portion. Then, as a second step, the remaining polysilicon is anisotropically etched under the condition that the selection ratio with respect to the oxide film is large to generate a polysilicon residue under the side wall protection film, and the polysilicon for the memory node is formed thereon. Is provided.

Next, the second means is polysilicon and S.
An iO2 film is deposited and this SiO2 film is anisotropically etched. By this etching, a residue and a sidewall protection film are left on the polysilicon grain sidewall and the polysilicon sidewall in the memory node contact window, and using this as a mask, polysilicon residue is generated during anisotropic etching of polysilicon. The polysilicon for memory node is deposited on the polysilicon residue.

[0007]

According to the present invention, according to the above-mentioned structure, in the first means, the natural oxide film on the surface of the polysilicon formed after the polysilicon is deposited in the first step is removed, and the sidewall is protected at the abrupt portion of the polysilicon step. Form a film. Next, when the remaining polysilicon is anisotropically etched by using the sidewall protection film as a mask in the second step, the polysilicon under the location where the sidewall protection film is formed is not etched, and as a result, the wall is etched. Form polysilicon residue. When polysilicon is deposited thereon, the surface becomes uneven, and a storage node having a large capacity can be obtained.

In the second means, if the over-rate of anisotropic etching of SiO2 is set to a small value, S
S is deposited on the thick part of the iO2 film, that is, on the side wall of the polysilicon grain and the side wall of the polysilicon in the memory node contact window.
iO2 remains. When polysilicon is anisotropically etched using this residue as a mask, columnar residues are generated on the entire surface and wall-shaped residues are generated on the inner bottom of the memory node contact window. When polysilicon is deposited thereon, the surface becomes uneven, and a storage node having a large capacity can be obtained.

[0009]

Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) FIG. 1 shows a method of forming a memory node in a first embodiment of the present invention. The method of forming the memory node of this embodiment will be described below with reference to FIG.

As shown in FIG. 1A, after forming the isolation region 2 and the word line 3 on the p-type silicon substrate 1, S is formed.
An iO2 film 4 is deposited, and a bit line 5 is formed on the SiO2 film 4. Next, the NSG film 6 is set to 300 nm and BPS.
G film 7 is deposited to a thickness of 300 nm, and BPSG film 7 is formed by heat treatment.
Flow.

Next, as shown in FIG. 1B, n + of the switching transistor formed on the p-type silicon substrate 1 is formed.
After opening the contact window 8 reaching the active region by anisotropic etching, polysilicon 9 is deposited to 100 nm. Next, as a step of removing the natural oxide film formed on the surface of the polysilicon 9 after the deposition of the polysilicon 9, a condition that the selectivity ratio to the oxide film is low and the sidewall protection action is strong (HBr: 1: 1).
5 sccm, HCl: 10 sccm, SF6: 10 sc
cm, O2: 1 sccm, gas pressure: 250 mTorr
r, RF: 350 W) is anisotropically etched and memory
A side wall protective film is formed on the side wall of the polysilicon 9 in the contact window 8 and is used as a mask for the main etching step of the polysilicon 9 under conditions of high selectivity with an oxide film (HBr: 40 sccm, HCl: 20 sccm). , O
2: 1 sccm, gas pressure: 100 mTorr RF: 2
When anisotropic etching is performed at 00 W and an over etch rate of 500%), a wall-shaped residue 12 of polysilicon is generated at the bottom of the contact as shown in FIG.

Next, as shown in FIG. 3D, polysilicon 13 is deposited to a thickness of 500 nm and patterned with a resist 14.

Next, using the resist 14 as a mask,
As shown in (e) of the figure, the polysilicon 13 is first subjected to a step of removing the surface natural oxide film formed on the polysilicon 13 under the condition that the selectivity ratio with the oxide film is low and the sidewall protection effect is weak (HCl: 20 sccm). , CF4: 20scc
m, gas pressure: 350 mTorr, RF: 350 W) and is anisotropically etched, and the main etching step of the polysilicon 13 is such that a high selection ratio with an oxide film (HB
r: 40 sccm, HCl: 20 sccm, O2: 1 s
ccm, gas pressure: 100 mTorr, RF: 200
W, over-etching rate 50%), anisotropic etching,
The memory node 15 is formed.

As described above, according to this embodiment, when the polysilicon 13 is deposited on the polysilicon residue 12, the storage node polysilicon on the contact window 8 is made uneven without increasing the number of steps. Therefore, the storage capacity can be increased without increasing the cell area.

(Embodiment 2) Next, FIG. 2 shows a second embodiment of the present invention.
A method of forming a memory node in the embodiment of FIG. The method of forming the memory node of this embodiment will be described below with reference to FIG.

As shown in FIG. 1A, after forming the isolation region 2 and the word line 3 on the p-type silicon substrate 1, S is formed.
An iO2 film 4 is deposited, and a bit line 5 is formed on the SiO2 film 4. Next, the NSG film 6 is set to 300 nm and BPS.
G film 7 is deposited to a thickness of 300 nm, and BPSG film 7 is formed by heat treatment.
Flow.

Next, as shown in FIG. 1B, n of the switching transistor formed on the p-type silicon substrate 1 is formed.
After opening the contact window 8 reaching the + active region by anisotropic etching, the polysilicon 9 is set to 100 nm and Si
An O2 film 10 is deposited to a thickness of 50 nm. Next, when the SiO2 film 10 is anisotropically etched by 20% over, the SiO2 film 10
(2) A SiO2 residue remains on the thick part, that is, on the side wall of the grain of the polysilicon 9 and the step portion of the polysilicon 9 in the memory node contact window 8. Subsequently, the polysilicon 9 has a high selection ratio and a sidewall protection effect is weak (HCl: 20 scc).
m, CF4: 20 sccm, gas pressure: 350 mTorr
r, RF: 350 W), and used as a main etching step of the polysilicon 9 in the second step under conditions of high selectivity with an oxide film (HBr: 40 sccm, HC
1: 20 sccm, O2: 1 sccm, gas pressure: 10
0 mTorr, RF: 200 W, over etch rate 50
When anisotropic etching is performed at 0%), columnar residues 11 and wall-shaped residues 12 are generated on the interlayer film and the contact bottom as shown in FIG.

Next, as shown in FIG. 3D, polysilicon 13 is deposited to a thickness of 500 nm and patterned with a resist 14. Next, using this resist 14 as a mask, as shown in FIG. 2E, the polysilicon 13 is first removed as a step of removing the surface natural oxide film formed on the polysilicon 13, and the selectivity with respect to the oxide film is lowered. Conditions with weak side wall protection (HCl: 20 sccm, CF4: 20 sccm,
Anisotropic etching is performed at a gas pressure of 350 mTorr and RF of 350 W, and a condition of high selectivity with an oxide film (HBr: 40 sc) is used as a main etching step of the second step.
cm, HCl: 20 sccm, O2: 1 sccm, gas pressure: 100 mTorr, RF: 200 W, over etching rate 50%) to form a memory node 15.

As described above, according to this embodiment, the polysilicon 13 is formed on the columnar residue 11 and the polysilicon residue 12.
Is deposited, the entire surface of the storage node polysilicon can be made uneven, and a large increase in storage capacity can be realized without increasing the cell area.

[0021]

As described above, according to the present invention, polysilicon is etched by using the oxide film residue or the sidewall protective film as a mask to generate columnar residues or wall-shaped residues, and the column residue or the wall-shaped residue is formed thereon. Deposit polysilicon and store
By providing unevenness on the upper surface of the memory, the storage capacity can be increased.

[Brief description of drawings]

FIG. 1 is a process sectional view in a first embodiment of the present invention.

FIG. 2 is a process sectional view in the second embodiment of the present invention.

FIG. 3 is a process sectional view showing a conventional method.

[Explanation of symbols]

 1 p-type silicon substrate 2 isolation region 3 word line 4 SiO2 film 5 bit line 6 NSG film 7 BPSG film 8 contact window 9 polysilicon 10 SiO2 film 11 columnar residue 12 wall-like residue 13 polysilicon 14 resist 15 memory cell Do

Claims (2)

[Claims] 1. A step of depositing a first polysilicon on a semiconductor substrate and anisotropically etching a natural oxide film on the first polysilicon, and a first polysilicon side wall formed by the etching. Using the protective film as a mask, the first
Anisotropically etching the polysilicon to form a polysilicon residue, depositing a second polysilicon on the polysilicon residue, and anisotropically etching the second polysilicon. A method for manufacturing a semiconductor memory device comprising: 2. A step of depositing a first polysilicon and an oxide film on a semiconductor substrate, a step of anisotropically etching the oxide film, a residue formed by the etching, and a first polysilicon sidewall protection. Anisotropically etching the first polysilicon using the film as a mask to form a polysilicon residue, depositing a second polysilicon on the polysilicon residue, and removing the second polysilicon. A method of manufacturing a semiconductor memory device, comprising the step of anisotropically etching.