JPH05243843A - Plane antenna and its production - Google Patents

Abstract

PURPOSE:To obtain the plane antenna which can use an oxide superconductor as a conductor part. CONSTITUTION:The plane antenna is constituted by forming semiconductor layers 3a, 3b, and conductor parts 4, 4a and consisting of an oxide superconductor on a sapphire substrate 1. The sapphire substrate works as a crystal growth substrate being satisfactory to both of the oxide superconductor and a silicon semiconductor, therefore, the desired purpose can be attained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a planar antenna, and more particularly to a planar antenna having a structure in which an electronic device and an antenna pattern are integrated on the same substrate. An antenna for a microwave communication system is used in mobile communication, especially in a space satellite communication system, and therefore, it is desired to be small in size, light in weight, high in performance, and highly reliable.

[0002]

2. Description of the Related Art The structure of a planar antenna is shown in FIG. As is clear from FIG. 2, the planar antenna has a rectangular antenna pattern 2 provided on the surface of an insulating (semi-insulating) substrate 1 made of GaAs, and an operating region 3 selectively provided inside the substrate 1. It has a different structure.

Further, the antenna pattern 2 and the operating region 3 are connected by a wiring 4 matched in high frequency. Further, electronic elements such as FETs, resistors, and capacitive elements are provided in the operating region 3, and by configuring an amplifier, a mixer, a local oscillator, etc., the microwave signal received by the antenna pattern 2 is directly It is configured to be able to process.

[0004]

In the conventional planar antenna, the antenna and the signal processing unit are integrated, and the antenna pattern and the wiring for connecting to the signal processing unit can be realized by a semiconductor manufacturing technique such as etching. Therefore, it is possible to obtain a highly reliable device that can be easily downsized. However, since GaAs is used as the substrate as described above, the mechanical strength is low and the reliability is degraded in this respect.

GaAs has a relatively high dielectric constant (ε
Therefore, if an antenna pattern is provided on this surface, there is a problem that reception efficiency or transmission efficiency is reduced. Further, if the substrate is thinned to increase the electrostatic capacitance as a countermeasure, the problem that the substrate strength is further reduced occurs. Further, it is considered to improve the performance of the antenna by forming the antenna pattern and the wiring by a high temperature superconductor which is a thin film grown. However, GaAs and a high temperature superconductor (for example, bismuth high temperature superconductor: BiS
rCaCuO) is liable to react and cannot achieve the desired superconducting properties.

In view of the above problems, it is an object of the present invention to provide a planar antenna structure having high mechanical strength and capable of using a high temperature superconductor as an antenna pattern or wiring.

[0007]

According to the present invention, in order to achieve the above object, an insulating substrate made of sapphire and a semiconductor selectively provided in a first region on the substrate and having an electronic device therein. A layer, an antenna pattern selectively provided in a second region on the substrate, and a wiring layer connecting the electronic device and the antenna pattern,
At least one of the antenna pattern and the wiring layer is formed of an oxide superconductor.

In the manufacturing process, the step of forming the oxide superconductor is performed after selectively forming the semiconductor layer in the first region.

[0009]

In the present invention, sapphire is used as the substrate. It is known that sapphire has high insulation and mechanical strength. However, more than that, since sapphire acts as a good substrate for crystal growth for both the high temperature superconductor and the semiconductor layer, the substrate for a planar antenna that requires both the high temperature superconductor and the semiconductor layer. Is suitable as.

Moreover, the permittivity is low (ε = 9.6), and the reception or transmission efficiency in the antenna portion is not deteriorated. The present invention pays attention to the above points, and by using the sapphire as a substrate, various characteristics required as a planar antenna are satisfied. In addition, in the manufacturing process, the oxide superconductor growth step is performed after the semiconductor layer growth step, so the oxide superconductor does not suffer from thermal damage during the growth of the semiconductor layer, and the good characteristics A planar antenna can be obtained.

[0011]

EXAMPLES Examples of the present invention will be described below. FIG. 1 is a diagram for explaining an embodiment of the present invention, and shows a perspective cross-section of a region including an operation region 3 and a wiring 4 when the present invention is applied to the planar antenna shown in FIG.

In FIG. 1, 1 is a sapphire substrate, 3a
Is a silicon layer, 3b is a GaAs layer, 4 is a wiring, 4a is a stub, 4b is a coupler, 6 is silicon oxide, and 7 is a ground plane. Further, 5a is a transistor section, and 5b is a capacitor section. In this embodiment, the transistor portion 5a and the capacitor portion 5b connected to the transistor portion 5a are provided on the (1012) plane sapphire substrate 1. The antenna pattern (not shown) is made of a BiSrCaCuO-based high temperature superconductor. Wiring 4, matching stub 4a,
They are connected by a coupler 4b or the like.

Next, a method for manufacturing the planar antenna shown in FIG. 1 will be described. (Step 1) A silicon layer 3a is grown on the surface of the sapphire substrate 1 having a surface index (1012) of which both surfaces are mirror-polished by a vapor phase growth method. The conditions are as follows. Source gas: disilane (Si ₂ H ₆ ) Growth temperature: 950 degrees Growth thickness 500 nm This silicon layer 3a is a GaAs layer 3b to be grown next.
It acts as a buffer layer.

(Step 2) After growing an AlAs layer (not shown) on the silicon layer 3a by a vapor phase growth method, a GaAs layer 3b on which an electronic element is formed is grown. The conditions are as follows. (Regarding AlAs) Source gas: arsine (AsH ₄ ) Trimethyl aluminum ((CH ₃ ) ₃ Al) Growth temperature: 550 degrees Growth film thickness: 10 nm (Regarding GaAs) Source gas: Arsine (AsH ₃ ) Trimethylgallium ((CH ₃ ) 3Ga) Growth temperature: 550 degrees Growth film thickness: 500 nm The AlAs layer acts as a buffer layer between the GaAs layer 3b and the silicon layer 3b.

(Step 3) By photolithography, etching is performed while leaving regions to be electronic elements (transistor portion 5a and capacitor portion 5b in this embodiment). (Step 4) Silicon oxide (not shown) to be a protective film is grown by a vapor phase growth method. The conditions are as follows. Source gas: monosilane (SiH) Oxygen gas (O ₂ ) Growth temperature: 400 degrees Growth film thickness: 200 nm This protective film is the surface of the silicon layer 3a and the GaAs layer 3b when the oxide superconductor is grown next. Is to protect. Further, the protective film formed on the surfaces other than the surfaces of the silicon layer 3a and the GaAs layer 3b is removed and the sapphire substrate 1 is exposed.

(Step 5) The antenna pattern 2, the wiring 4, and the stub 4 are formed on the sapphire substrate 1 by the vapor phase growth method.
a, BiSrCaCu for forming the coupler 4b, etc.
Grow an O-based oxide superconductor. The conditions are as follows. Source gas: bismuth chloride (BiCl ₃₎ copper iodide (CuI) calcium iodide (CaI) iodide strontium (SrI) oxygen (O ₂₎ gas Growth Temperature: 580 ° Growth film thickness: 500 nm superconducting thin the oxide Although it is formed directly on the sapphire substrate 1, since the growth temperature is as low as 580 ° C., the two hardly react with each other.

Further, since the oxide superconductor growing step is performed after the semiconductor layer growing step (steps 1 and 2), the oxide superconductor is exposed to the high temperature in the semiconductor layer growing step. It is possible to prevent deterioration of superconducting properties. (Step 6) A BiSrCaCuO-based oxide superconductor is grown on the back surface of the sapphire substrate 1 by the same process as the step 5. This oxide superconductor becomes the ground plane 7.

(Step 7) By patterning the oxide superconductor on the surface side of the sapphire substrate 1, the antenna pattern 2, the wiring 4, the stub 4a, the coupler 4b, etc. are formed. In this case, all of the various conductors can be made of oxide superconductors, or some of them can be made of ordinary conductors (A
1 and Au).

When a part of an ordinary conductor is used, it may be formed by patterning the above oxide superconductor and then performing an ordinary conductor film forming and patterning process. (Step 8) The transistor section 5a and the capacitor section 5b are formed in the GaAs layer 3b formed in the above Step 2 by going through the usual steps such as impurity introduction and electrode formation.

The transistor portion 5a is composed of an n region and n ⁺ regions on both sides of the n region, a gate electrode is formed on the n region, and source and drain electrodes are connected on the n ⁺ region. .. The capacitor section 5b is an n-type G
An upper electrode formed by extending the source or drain electrode on the aAs layer 3b, and a lower silicon layer 3a.
And a lower electrode extending outwardly.

Further, an insulator made of silicon oxide 6 is provided between the transistor portion 5a and the capacitor portion 5b and between the side surface of the capacitor portion 3a and the upper electrode to separate them. In this embodiment, a normal MESFET is adopted as the transistor part, but HEMT and HBT are also available.
For example, various selections can be made as necessary.

In addition to the capacitor section, it is also possible to form passive elements such as resistance elements and diodes. The planar antenna formed by the above steps has a sapphire substrate as a substrate, and since a superconductor can be used as a conductor portion thereof, it has high efficiency, and a semiconductor layer is formed on a sapphire substrate, so-called The SOS structure improves the resistance to radiation.

[0023]

As described above, according to the present invention, since the oxide superconductor can be used as the conductor portion, the mechanical strength is high, and the radiation resistance of the integrated semiconductor layer is improved. A high performance and highly reliable planar antenna can be realized.

[Brief description of drawings]

FIG. 1 is a diagram illustrating an embodiment of the present invention.

FIG. 2 is a diagram illustrating a configuration of a planar antenna.

[Explanation of symbols]

 1 ... Substrate 2 ... Antenna pattern 3 ... Operating area 3a ... Silicon layer 3b ... GaAs layer 4 ... Wiring 4a ... Stub 4b ・ ・ ・ ・ Coupler 5a ・ ・ ・ ・ ・ ・ Transistor part 5b ・ ・ ・ ・ Capacitor part 6 ・ ・ ・ Silicon oxide 7 ・ ・ ・ Ground plane

Front page continued (72) Inventor Hiroshi Nakao 1015 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Fujitsu Limited

Claims (2)

[Claims] 1. An insulating substrate made of sapphire, a semiconductor layer selectively provided in a first region on the substrate and having an electronic device therein, and a semiconductor layer selectively provided in a second region on the substrate. And a wiring layer connecting the electronic device and the antenna pattern, wherein at least one of the antenna pattern and the wiring layer is formed of an oxide superconductor. 2. A method of manufacturing a planar antenna, wherein the step of forming the oxide superconductor is performed after the semiconductor layer is selectively formed in the first region.