JPH052412A - Control program execution system for programmable controller - Google Patents

Abstract

PURPOSE:To secure the regularity of the scanning cycle by receiving a program start command from a 2nd start means not from a 1st start command means as long as a control program is not complete yet when a start command is received from a 1st start program. CONSTITUTION:It is checked in a step 2a whether a host scan state flag is scanned to much or not. If the host scan processing exceeds a host scanning period, the procedure proceeds to a step 2b and otherwise to a step 2e. Then a fact whether a follower scan state flag is scanned too much or not is checked. The follower scan processing of the lower priority is kept waiting until a 2nd start means produces a start request signal with the next periodical interruption. The 2nd start means finishes its operation if the excessive scanning cycles are not set for both scan state flags.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a control program execution system in a programmable controller.

[0002]

2. Description of the Related Art In recent years, in a control system for industrial equipment, the speed and performance of the system have advanced, and the control contents of a programmable controller (hereinafter referred to as PC) have become complicated. , Are divided and executed for each response time for each controlled object. The operation by the PC is to take in input data from the outside through the input section, store it in the data memory, perform various arithmetic processing according to the control program, and after the arithmetic processing is completed,
The data stored in the data memory, which should be output to the outside, is output to the outside through the output unit. The above operation sequence is called one scan, and the control program divided for each response time is repeatedly executed independently at a predetermined scan cycle.

Each scan is driven by an interrupt to a central processing unit (hereinafter referred to as a CPU) inside the PC by a control mechanism inside the PC, and its priority is set higher for those requiring a faster response. Has been done. Therefore, a scan having a higher priority (hereinafter, referred to as a higher scan) is executed by interrupting a scan having a lower priority (hereinafter, referred to as a lower scan). As a matter of course, the lower scan cannot be interrupted during execution of the upper scan and is in a standby state. Generally, the scan cycle set in advance for each scan is set longer than the scan processing execution time. However, the processing execution time of each scan may exceed the preset scan cycle due to a temporary fluctuation of the control target or a failure of the external input / output device. In such a case, since each scan is activated by an interrupt request to the CPU as described above, even if an interrupt request for a scan having the same priority occurs, the processing for the scan having that priority will naturally end. It will not be accepted until.

[0004]

The interrupt request generated during execution of the scan processing having the same priority in this way is ignored, and execution is delayed until the next interrupt of the activation request is generated. (Fig. 4). Therefore, P
In arithmetic processing including a time element such as linear acceleration command and PI control in motor control using C, stable control performance cannot be obtained, and further, variation in response cycle to external input / output devices. Also has the drawback of becoming larger. When a predetermined scan cycle is exceeded, a method for immediately starting the scan if a scan start request is generated at the end of execution of each scan process as a means for ensuring the periodicity. Although some PCs use the above, in this case, there is a drawback in that if the scan cycle continuously exceeds in the upper scan, the execution congestion of the lower scan occurs. Therefore, the problem to be solved by the present invention is to solve the above drawbacks of the prior art,
An object of the present invention is to provide an execution method of a control program that secures the regularity of the C scan cycle.

[0005]

In order to solve this problem, a control program execution system in a programmable controller according to the present invention has an input section for receiving an external signal and an output section for outputting the signal to the outside. An output unit, a data memory unit, a program memory unit storing a control program, each having a preset priority, and a first scan cycle having a preset scan cycle for each priority. In a programmable controller having an arithmetic unit that executes a plurality of control programs controlled by a starting unit, a unit that holds the execution state of the priority for each scan cycle, and a plurality of control programs that operate in a fixed cycle. And a second starting means common to all the control programs, and when the start command is received from the first starting means, the control program is not executed yet. When the not receive the activation instruction of the program from the first actuation means, in which so as to receive from the second actuation means.

[0006]

By using such means, it is possible to secure the regularity of the execution of the scan processing of the PC and to obtain stable control performance in the arithmetic processing including the time element.

[0007]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a flow chart for explaining the operation of the means for holding the execution state of the priority order. Processing is performed when an interrupt occurs at each predetermined scan cycle. First, it is checked whether or not the currently executed scan processing has the same priority (step 1a). If the scan processes of the same priority are being executed, the scan excess flag is set in each scan state flag (step 1b), and the process ends. If the scan processing with the same priority is not being executed, it is checked whether or not the priority of the scan processing currently being executed is higher than that of itself (step 1c), and if it is higher, the scan processing start request flag is set (step 1d). .. If it is lower, execution of the scan process is started (step 1e). The scan process activation request flag is used when the upper scan process ends and the process shifts to the lower scan process.

Next, the operation of the second activating means for generating the activating command for the scan state flag set at the time of the scan processing activation request by the priority order executability retaining means in a fixed cycle will be described with reference to the flow chart of FIG. It is desirable to set the fixed-cycle time to a value that is sufficiently shorter than the scan cycle preset for each priority in order to ensure the fixed-cycle property of each scan. Further, the time setting can be fixed or variable systematically. First, it is checked whether the upper scan status flag is over scan (step 2a). If the upper scan processing exceeds the upper scan cycle, it is checked whether the current scan processing is the upper scan processing (step 2b). If it is being executed, the operation of the second activating means is ended to continue the processing. If the upper scan process exceeds the upper scan cycle and the process currently being executed is not the upper scan process, the upper scan state flag is reset (step 2c) and immediately the upper scan process is started (step 2d). ). The upper scan status flag is checked, and if the upper scan processing does not exceed the scan cycle, it is checked whether the lower scan status flag is over scan (step 2e). If the lower scan process exceeds the scan cycle, it is checked whether the process currently being executed is the upper scan process (step 2f). If the upper scan process is being executed, the operation of the second activating means ends. .. That is, the lower-order scan process having the lower priority order waits until the second activation means generates the activation request signal at the next fixed-cycle interrupt. If the process currently being executed is not the upper scan, check whether the lower scan is being executed (step 2
g) If the lower scan processing is being executed, the operation of the second activating means ends. If the process currently being executed is not the lower scan process, the lower scan state flag is reset (step 2h) and immediately the lower scan process is started. (Step 2i). If neither the upper scan state flag nor the lower scan state flag is set to exceed the scan cycle, the operation of the second activating means ends.

FIG. 3 shows an example of an operation time chart of the scanning process according to the embodiment of the present invention. When an interrupt of the upper scan processing start request occurs at a predetermined execution cycle, whether the request that occurred at that time can be accepted, step 1a of the operation flowchart that holds the execution state of the above priority order, step 1c Since it is possible to investigate and execute, immediately move to execution of the upper scan processing (3a). When an interrupt of the upper scan processing activation request occurs again during execution of the upper scan processing (3b), the upper scan state flag is set to scan excess as in step 1a, and the upper scan processing is continued as it is. After that, the execution of the upper scan process is completed, and after the execution transitions to the lower scan process, an interrupt is generated by the fixed-cycle signal and the second activating means operates. Step two
Since the excess scan is set in the upper scan state flag at a, the process proceeds to steps 2b, 2c, and 2d, and the execution of the lower scan is immediately interrupted and the execution of the upper scan is started (3c).

[0010]

As described above, according to the present invention, the periodicity can be ensured in the scan operation of the PC while minimizing the disturbance of the cycle due to the excess of the execution time of each scan process. Stable control performance can be obtained in all application fields.

[Brief description of drawings]

FIG. 1 is an operation flowchart of a means for holding a priority execution state of the present invention.

FIG. 2 is an operation flowchart of a second starting means.

FIG. 3 is a time chart of execution of scan processing according to an embodiment of the present invention.

FIG. 4 is a time chart of execution of scan processing according to the related art.

Claims (1)

Claim: What is claimed is: 1. An input unit for capturing an external signal,
An output unit for outputting a signal to the outside, a data memory unit, and a program memory unit storing a control program, each of which has a preset priority, and each of which is preset for each priority. In a programmable controller having an arithmetic unit that executes a plurality of control programs controlled by a first starting unit having a different scan cycle, a means for holding the execution state of the priority for each scan cycle, A second starting means common to a plurality of control programs operating in a cycle is provided, and when the execution of the control program is not completed when a starting instruction is received from the first starting means, the starting instruction of the program is given. A control program in a programmable controller characterized in that it is received from the second starting means instead of being received from the first starting means. Lamb execution method.