JPH0523550B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a photoelectric conversion device in which a plurality of photoelectric conversion elements are arranged and a signal is read out by selecting the photoelectric conversion element.

[Prior Art] FIG. 3 is a schematic circuit diagram showing an example of a conventional solid-state imaging device.

In the figure, a photoelectric conversion element 10 such as a MOS type
1 are arranged in plural numbers, and each row is connected to a vertical shift register 102, and each column is connected to a horizontal shift register 103.

In such a conventional example, a row is selected by a vertical shift register 102, and each photoelectric conversion element 101 in the selected row is transferred to a horizontal shift register 1.
03, the signals of all the photoelectric conversion elements are serially read out.

[Problems to be Solved by the Invention] However, in the conventional imaging device described above, when trying to set exposure conditions using photoelectric conversion elements, for example, it is necessary to read out the signals of all the photoelectric conversion elements, and the exposure It took unnecessary time to set the conditions. Further, since conventional devices can only scan at a fixed rate, when performing processing such as pattern recognition, the processing of output signals becomes complicated and high-speed operation becomes difficult.

[Summary of the Invention] The photoelectric conversion device according to the present invention attempts to solve the above-mentioned conventional problems, and has n×m transistors that can be stored based on carriers generated by receiving light energy. , a matrix circuit having m common output lines connected to the emitters of the transistors, and n common drive lines capacitively coupled to the bases of the transistors, and the m common output lines being in a floating state. and a voltage applying means for selectively applying a read or refresh voltage to the base via the n common drive lines, , a read operation, and a refresh operation, wherein the emitter is held at a reference potential by the switch means, and the voltage is applied to the base by the voltage application means, so that the base and the Refreshing means performs the refreshing operation by biasing a junction with the emitter in the forward direction; and the switching means causes the emitter to be in a floating state, and the voltage applying means applies the voltage to the base via an arbitrary common drive line. means for forward biasing the junction between the base and the emitter by applying a voltage to read a signal to the common output line; and selectively outputting the signal read to an arbitrary common output line to a signal line. Random access means having the following.

[Example] Hereinafter, an example of the present invention will be described in detail using the drawings. However, here, a case will be explained in which the photoelectric conversion element described in Japanese Patent Application No. 120755/1982 is used.

Figure 4A is a plan view of the photoelectric conversion device described in Japanese Patent Application No. 120755/1982, and Figure 4B is its I
-I line sectional view, FIG. 4C is its equivalent circuit diagram.

In each figure, optical sensor cells are formed and arranged on an n ⁺ silicon substrate 1, and each optical sensor cell is separated from the adjacent optical sensor cell by an element isolation region 2 made of SiO ₂ , Si ₃ N ₄ , polysilicon, or the like. electrically isolated from

Each optical sensor cell has the following configuration.

A p region 4 is formed by doping p-type impurities on the n ^- region 3 with a low impurity concentration formed by epitaxial technology, etc.
An n ⁺ region 5 is formed by an impurity diffusion technique, an ion implantation technique, or the like. p region 4 and
The n ⁺ regions 5 are the base and emitter of a bipolar transistor, respectively.

An oxide film 6 is formed on the n ^- region 3 in which each region is formed in this manner, and a capacitor electrode 7 having a predetermined area is formed on the oxide film 6. Capacitor electrode 7 faces p-region 4 with oxide film 6 in between, and applies a pulse voltage to capacitor electrode 7 to control the potential of p-region 4 in a floating state.

In addition, an emitter electrode 8 connected to the n ⁺ region 5, a wiring 9 for reading out signals from the emitter electrode 8 to the outside, a wiring 10 connected to the capacitor electrode 7,
An n ⁺ region 11 with high impurity concentration is formed on the back surface of the substrate 1,
and an electrode 12 for applying a potential to the collector of the bipolar transistor.

Next, the basic operation will be explained. Light 13 enters p-region 4, which is the base of the bipolar transistor, and charges corresponding to the amount of light are accumulated in p-region 4 (accumulation operation). The base potential changes due to the accumulated charges, and by reading out the potential change from the floating emitter electrode 8, an electrical signal corresponding to the amount of incident light can be obtained (reading operation).
Furthermore, in order to remove the charges accumulated in the p region 4, the emitter electrode 8 is grounded and the capacitor electrode 7 is grounded.
Apply a positive voltage pulse to (refresh operation). By applying this positive voltage, the p region 4 becomes n ⁺
Region 5 is forward biased and the accumulated charge is removed. After that, the above accumulation, reading,
Each operation called refresh is repeated.

In short, the method proposed here uses charges generated by light incidence to the base p-region 4.
The current flowing from the emitter electrode 8 to the collector electrode 12 is controlled by the amount of accumulated charge. Therefore, the accumulated charge is read out after being amplified by the amplification function of each cell. In other words, it is read out as a low impedance output by impedance conversion. This method has high output, high sensitivity, and low noise, and can be said to be advantageous for future increases in resolution.

FIG. 1A is a circuit diagram of an embodiment of a photoelectric conversion device according to the present invention.

In the figure, the optical sensor cells 30 are two-dimensionally arranged in n×n, and each collector electrode 12 is connected in common. The capacitor electrode 7 of each optical sensor cell 30 is connected to a horizontal line HL ₁ to HL _o for applying a read pulse or a refresh pulse for each row.
(which serves as a common drive line), and each horizontal line is connected to the parallel output terminals L1 to _L1 of the vertical decoder section 31 via buffer MOS transistors _{BT1 to BT0} .
(The buffer MOS transistors BT ₁ to _{BT o and} the vertical decoder section 31 constitute voltage applying means). buffer MOS transistor
The gate electrodes of BT ₁ to BT _o are commonly connected to the terminal 32 .

The emitter electrode 8 of each photosensor cell 30 is connected to vertical lines VL ₁ to _{VL o} (common output line) for reading out signals for each column, and each vertical line is connected to gate MOS transistors GT ₁ to _{GT o.} They are commonly connected to the output signal line 33 (which serves as a signal line) via. Each gate electrode of the gate MOS transistors GT ₁ to _{GT o} is connected to parallel output terminals R ₁ to _{R o} of a horizontal decoder 34 that generates pulses for sequentially opening and closing the vertical lines (the gate MOS transistors GT ₁ to GT _o , the horizontal decoder 34, and the means for applying the signal φ ₂ to the horizontal decoder 34 constitute means for selectively outputting the read signal to the signal line).

The output signal line 41 is grounded via a transistor 35 for refreshing the output line 33, and is also connected to the output terminal 37.
Further, the gate electrode of the transistor 35 is connected to the terminal 36.
It is connected to the.

In addition, the vertical lines VL ₁ to _{VL o} are connected to MOS transistors T ₁ to refresh the vertical lines.
grounded via T _o (which acts as a switching means),
The gate electrodes of the MOS transistors T ₁ to _{T o} are commonly connected to a terminal 38 .

Note that the vertical decoder section 31 and the horizontal decoder 34 operate according to signals φ ₁ and φ ₂ input thereto, respectively. Further, the vertical decoder section 31
Positive voltage can be simultaneously output from terminals L ₁ to _Lo during refreshing.

Here, the terminals 32 and 38, a signal generating means for applying signals to the terminals 32 and 38, and a vertical decoder section 31
The means for applying the signal φ ₁ to constitutes a refresh means and a read means.

Next, the operation of this embodiment having such a configuration will be explained with reference to the timing waveform diagram shown in FIG. 1B.

First, a case will be described in which all optical sensor cells are scanned and read.

During the refresh period, each optical sensor cell 3
A positive voltage V _C is applied to the collector electrode 12 of 0,
The emitter electrode 8 is grounded when a high level is applied to the terminal 38 and the MOS transistors T ₁ to _{T o} are brought into conduction. In this state, a high level is applied to the terminal 32, and a positive voltage V _rh for refreshing is applied from the vertical decoder section 31 to the capacitor electrode 7 of each photosensor cell 30 via the buffer MOS transistors BT ₁ to _{BT o} . By applying the positive voltage V _rh for refreshing, the holes accumulated in the base region 4 are removed, as described above, the positive voltage V _rh returns to the ground potential, and the terminal 32 becomes low level. The refresh operation ends.

Next, during the accumulation period, a high level is continuously applied to the terminal 38, so that the emitter electrode 8 is grounded. As already mentioned, light is incident in this state, and holes corresponding to the amount of incident light are accumulated in the base region 4 of each photosensor cell 30.

Next, during the read period, the terminal 38 becomes low level and the MOS transistors T ₁ to _{T o} are turned off. Subsequently, a high level is applied to the terminal 32, the buffer MOS transistors BT ₁ to BT _o become conductive, and the terminals L ₁ to BT o of the vertical decoder section 31 become conductive.
A positive voltage _Vr for reading is sequentially output from _Lo .

First, when a voltage V _r is applied from the terminal L ₁ of the vertical decoder section 31 to the horizontal line HL ₁ , the photosensor cells 30 in the first row enter the read state. continue,
A high level is sequentially output from terminals R ₁ to _{R o} of the horizontal decoder 34 . Now, if a high level is output from terminal _R1 , MOS transistor _GT1
is turned on, and the signal from the photosensor cell 30 in the first row and first column is read out to the signal line 33. Immediately after that, a high level is applied to the terminal 36, and the signal line 3
Refresh 3. The above operations are similarly performed sequentially for the optical sensor cells 30 in the second to nth columns. That is, by sequentially stepping the input signal φ ₂ of the horizontal decoder 34, the MOS transistor
GT ₂ ~ _{GT o} are made conductive in sequence, and the first row, second column ~
Output signals are sequentially read out from the optical sensor cells 30 up to the n-th column, and the signal line 33 is refreshed every time the signals are read out. When the reading of the photosensor cells 30 in the first row is completed, a high level is applied to the terminal 38, the MOS transistors T ₁ -T _o become conductive, and the vertical lines VL ₁ -VL _o are refreshed.

This operation of the first row is performed by the vertical decoder section 3.
By stepping the input signal φ ₁ of 1 and sequentially outputting the read voltage V _r from the terminals L ₂ to _{L o} , the second row to
This is also done in the n-th row, and the optical information of all the optical sensor cells 30 can be serially output from the output terminal 37. Thereafter, similar operations are repeated.

Note that the above scanning may be performed using a vertical shift register and a horizontal shift register as shown in FIG. However, in that case, the first
In FIG. A, a vertical decoder section 31 and a vertical shift register, and a horizontal decoder 34 and a horizontal shift register are provided, respectively.The above scanning may be performed by the shift register, and the random access operation described below may be performed by the decoder.

Next, a case will be described in which optical sensor cells are randomly selected and optical information signals are read out. In this case, the operations of the refresh and accumulation periods described above are the same.

As already mentioned, the vertical decoder section 31 can output a positive voltage from a desired terminal L _i in response to an input signal φ ₁ , and the horizontal decoder 34 can output a positive voltage from a desired terminal R _j in response to an input signal φ ₂ . It can output high level. Therefore, the optical information signal of the i-th row and j-th column, that is, any optical sensor cell 30, can be read out from the output terminal 37 by the combination of the input signals φ ₁ and φ ₂ . At this time, since the optical sensor cell 30 is read out non-destructively, any optical sensor cell can be read out any number of times.

In this manner, random access is possible and nondestructive readout is possible in this embodiment, so when setting exposure conditions, it is not necessary to read out all the photosensor cells as in the conventional case. It is only necessary to output signals from an appropriate number of photosensor cells located at appropriate positions, and set exposure conditions based on their average value, maximum value, minimum value, etc.

Also, because random access is possible,
It can also be applied as follows.

FIGS. 2A to 2C are explanatory diagrams showing an example of the pattern recognition method according to this embodiment.

In FIG. 2A, input signals φ ₁ and φ ₂ are set in advance to select seven photosensor cells a to g from the sensor section 40 in which photosensor cells 30 are two-dimensionally arranged.

By setting it like this, for example, the second
In the case of pattern "A" in Figure B, photosensor cells b and g have different outputs from other photosensor cells, and in the case of pattern "F" in Figure 2C, photosensor cells b, f, and g have different outputs than other photosensor cells. This becomes the output. By detecting the optical sensor cells having different outputs in this way, patterns can be discriminated very easily.

Furthermore, using this embodiment, interlaced scanning, which is used in televisions and the like, can be easily performed.

[Effects of the Invention] As described above in detail, according to the photoelectric conversion device according to the present invention, the reading means has an emitter follower circuit configuration in which the load is the capacitance of the common output line, and a voltage is applied to the base at the time of reading. By forward biasing between the base and emitter, signals with excellent linearity and a large signal-to-noise ratio can be read out at high speed.In addition, during refresh, the emitter is grounded, and by applying voltage to the base, the base potential can be controlled to reduce FPN and perform high-speed refresh.

Furthermore, since optical information signals can be read out by random selection, selective reading can be performed depending on the purpose, and processing of the read signals can be speeded up and simplified.

For example, exposure conditions can be set quickly and easily, and pattern recognition can be simplified, so it has an extremely wide range of applications.

[Brief explanation of drawings]

FIG. 1A is a circuit diagram of one embodiment of a photoelectric conversion device according to the present invention, FIG. 1B is a timing waveform diagram showing the operation of this embodiment, and FIGS. 2A to C are patterns according to this embodiment. FIG. 3 is a schematic circuit diagram showing an example of a conventional solid-state imaging device, and FIG. 4A is an explanatory diagram showing an example of a recognition method. The plan view, Figure 4B, is
The sectional view taken along the line I--I in FIG. 4C is an equivalent circuit diagram thereof. 7... Capacitor electrode, 8... Emitter electrode,
12... Collector electrode, 30... Optical sensor cell,
31... Vertical decoder section, 34... Horizontal decoder.

Claims (1)

[Claims] 1 n of a transistor that can accumulate based on carriers generated by receiving light energy
xm common output lines connected to the emitters of the transistors, and n common drive lines capacitively coupled to the bases of the transistors; and the m common output lines. a switch means for switching the base voltage between a floating state and a state held at a reference potential; and a voltage application means for selectively applying a reading or refreshing voltage to the base via the n common drive lines. A photoelectric conversion device that performs a storage operation, a readout operation, and a refresh operation, wherein the voltage applying means applies the voltage to the base while the emitter is held at a reference potential by the switching means. Refreshing means performs the refreshing operation by biasing the junction between the base and the emitter in a forward direction; and the switching means sets the emitter in a floating state, and the voltage applying means applies the voltage to the base via an arbitrary common drive line. means for forward biasing the junction between the base and the emitter by applying the voltage to read the signal to the common output line; and a means for selectively reading out the signal to the common output line. A photoelectric conversion device comprising: means for outputting to a signal line; and random access means having. 2. The photoelectric conversion device according to claim 1, wherein n×m transistors are refreshed simultaneously by the refreshing means.