JPH05226271A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH05226271A JPH05226271A JP2699492A JP2699492A JPH05226271A JP H05226271 A JPH05226271 A JP H05226271A JP 2699492 A JP2699492 A JP 2699492A JP 2699492 A JP2699492 A JP 2699492A JP H05226271 A JPH05226271 A JP H05226271A
- Authority
- JP
- Japan
- Prior art keywords
- platinum
- furnace
- core tube
- semiconductor device
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Bipolar Transistors (AREA)
- Thyristors (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、スイッチング速度を高
めるためにライフタイムキラーとしての白金をシリコン
からなる半導体基体内に拡散する工程を含む半導体装置
の製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device including a step of diffusing platinum as a lifetime killer into a semiconductor substrate made of silicon for increasing a switching speed.
【0002】[0002]
【従来の技術】半導体基体のライフタイムを小さくする
ために、基体内に導入するライフタイムキラーとして
は、白金が金にくらべて逆漏れ電流および逆回復時の電
流変化のソフト性の点で優れていることが知られてい
る。従来の半導体装置の製造工程において白金拡散を行
う方法としては、pn接合を形成したSiウエーハの表面
に白金源を塗布し、拡散炉中で高温の熱処理をし、ウエ
ーハ中に十分均一に白金を拡散させたのち、ウエーハを
拡散炉より引出し、室温まで冷却する方法がとられてい
た。2. Description of the Related Art Platinum is superior to gold as a lifetime killer to be introduced into the substrate in order to reduce the lifetime of the semiconductor substrate, in terms of softness of reverse leakage current and current change during reverse recovery. It is known that As a method of performing platinum diffusion in a conventional semiconductor device manufacturing process, a platinum source is applied to the surface of a Si wafer having a pn junction, and heat treatment is performed at a high temperature in a diffusion furnace so that the platinum is sufficiently evenly distributed in the wafer. After the diffusion, the wafer was pulled out from the diffusion furnace and cooled to room temperature.
【0003】[0003]
【発明が解決しようとする課題】上記のような従来の白
金拡散方法では、同時に拡散するウエーハ枚数が異なる
と熱容量が異なり、高温の拡散炉よりシリコンウエーハ
を引出し、室温まで冷却する時間がばらつき、冷却が徐
冷となるとSiとPtとの化合物ができるためにダイオード
の順方向電圧降下が変動するという欠点があった。In the conventional platinum diffusion method as described above, the heat capacity is different when the number of wafers to be diffused at the same time is different, and the time for pulling out the silicon wafer from the high temperature diffusion furnace and cooling it to room temperature varies, When cooling is slow, a compound of Si and Pt is formed, so that the forward voltage drop of the diode fluctuates.
【0004】本発明の目的は、このような欠点を除き、
同時に白金拡散を行う半導体基体の量が異なっても、形
成される白金化合物の量がばらつくことのない半導体装
置の製造方法を提供することにある。The object of the present invention is to eliminate these drawbacks.
It is another object of the present invention to provide a method for manufacturing a semiconductor device in which the amount of platinum compound formed does not vary even if the amount of semiconductor substrate on which platinum is diffused is different.
【0005】[0005]
【課題を解決するための手段】上記の目的を達成するた
めに、本発明は、シリコンからなる半導体基体表面に白
金を付着させ、高温に加熱して基体内に白金を拡散させ
る工程を含む半導体装置の製造方法において、半導体基
体を白金拡散後冷却する際の750 ℃から600 ℃までの温
度範囲の冷却速度を20℃/分以上とするものとする。そ
して、白金を付着させた半導体基体を熱処理炉の炉心管
の高温部に挿入して所定の時間加熱したのち、基体を炉
心管の低温部まで引き出し、その炉心管の低温部へ外部
から基体を吹付けること、あるいはその炉心管の低温部
に通気孔を明けておき、外部から不活性ガスをその通気
孔を通じて炉心管内に圧入することが有効である。その
不活性ガスとして窒素ガスを用いることが有効である。In order to achieve the above object, the present invention comprises a step of depositing platinum on the surface of a semiconductor substrate made of silicon and heating it to a high temperature to diffuse platinum in the substrate. In the device manufacturing method, the cooling rate in the temperature range from 750 ° C. to 600 ° C. when cooling the semiconductor substrate after platinum diffusion is set to 20 ° C./min or more. Then, the semiconductor substrate to which platinum is adhered is inserted into the high temperature part of the furnace core tube of the heat treatment furnace and heated for a predetermined time, and then the substrate is pulled out to the low temperature part of the core tube, and the substrate is externally transferred to the low temperature part of the core tube. It is effective to spray the gas, or to open a vent hole at a low temperature portion of the core tube and press an inert gas from the outside into the core tube through the vent hole. It is effective to use nitrogen gas as the inert gas.
【0006】[0006]
【作用】シリコンと白金は600 ℃〜750 ℃の範囲で化合
して化合物を形成する。従って、750 ℃〜600 ℃の範囲
を20℃/分以上の冷却速度で急冷することにより、Siと
Ptの化合物の形成が阻止できる。そして、半導体基体を
炉心管の低温部へ引出したのち、炉心管は外部から気体
を吹付ければ、同時に白金拡散を行う半導体基体の量に
無関係に大きな冷却速度が得られる。[Function] Silicon and platinum combine to form a compound in the range of 600 ° C to 750 ° C. Therefore, by quenching in the range of 750 ℃ ~ 600 ℃ at a cooling rate of 20 ℃ / min or more,
The formation of Pt compounds can be prevented. Then, after the semiconductor substrate is drawn out to the low temperature part of the core tube, if a gas is blown from the outside of the core tube at the same time, a large cooling rate can be obtained regardless of the amount of the semiconductor substrate that diffuses platinum at the same time.
【0007】[0007]
【実施例】以下、図面を引用して本発明の一実施例につ
いて述べる。高圧ダイオード製作のための半導体基板と
してn型Siウエーハを用い、不純物拡散によりpn接合
を形成したのち、従来技術と同様に表面に白金源を塗布
し、拡散炉中で900 ℃〜930 ℃で5時間〜15時間の熱処
理を行ってPt拡散を行った。図1はその熱処理の状態を
示し、電気炉1の炉心管2の一端からSiウエーハ3を乗
せたボート4をボートローダ5により点線で示した炉の
中央部まで挿入し、炉心管2の他端のガス導入管6から
窒素ガス8を炉心管に流しながら熱処理を行う。Pt拡散
終了後、ボートローダ5によりボート4を1秒〜10秒の
短時間のうちに炉心管2の炉外の部分まで実線で示すよ
うに引出す。この部分には炉心管に通気孔7が明けられ
ている。この部分へ外部からN2 ガス8を2kg/cm2 程
度の圧力で吹き付けると、ガスは通気孔7を通ってウエ
ーハ3の表面に沿って流れるので、ウエーハ3の温度は
急に低下し、750 ℃〜600 ℃の範囲を7.5分以下の時間
で経過した。すなわち、冷却速度が20℃/分以上の冷却
速度になった。このようにして得られたSiウエーハを15
枚積層し、分割して製作した耐圧12kVの高圧ダイオード
の順方向電圧降下は平均29Vでばらつき範囲は27V〜31
Vであり、ばらつき幅は4Vであった。従来の耐圧12kV
の高圧のダイオードでは、平均30.5Vで26V〜32Vの間
にばらついており、ばらつき幅は6Vであったから、順
方向電圧降下のばらつきが少なくなったことがわかる。
なお、炉心管の径が小さいときには、通気孔7を明けな
いで、炉心管2の管壁にガスを吹き付けるだけでも20℃
/分以上の冷却速度が得られた。An embodiment of the present invention will be described below with reference to the drawings. An n-type Si wafer is used as a semiconductor substrate for manufacturing a high-voltage diode, a pn junction is formed by impurity diffusion, and then a platinum source is applied on the surface in the same manner as in the prior art, and the temperature is set in a diffusion furnace at 900 ° C to 930 ° C for 5 The heat treatment was performed for about 15 hours to diffuse Pt. FIG. 1 shows the state of the heat treatment, in which the boat 4 carrying the Si wafer 3 is inserted from one end of the core tube 2 of the electric furnace 1 to the center of the furnace indicated by the dotted line by the boat loader 5, and The heat treatment is performed while flowing the nitrogen gas 8 from the gas introduction pipe 6 at the end into the core tube. After the completion of Pt diffusion, the boat loader 5 pulls out the boat 4 to a portion outside the furnace of the core tube 2 within a short time of 1 to 10 seconds as shown by a solid line. A vent hole 7 is formed in the core tube at this portion. When N 2 gas 8 is blown to this portion from the outside at a pressure of about 2 kg / cm 2 , the gas flows along the surface of the wafer 3 through the vent holes 7, so that the temperature of the wafer 3 suddenly drops, and 750 The temperature in the range of ℃ to 600 ℃ was passed in 7.5 minutes or less. That is, the cooling rate was 20 ° C./minute or more. 15 Si wafers thus obtained
The forward voltage drop of a high voltage diode with a withstand voltage of 12 kV manufactured by stacking and dividing the sheets is 29 V on average and the range of variation is 27 V to 31 V.
V, and the variation width was 4V. Conventional breakdown voltage 12kV
In the high-voltage diode of 3), the average voltage is 30.5V, which varies from 26V to 32V, and the variation width is 6V. Therefore, it can be seen that the variation in the forward voltage drop is reduced.
It should be noted that when the diameter of the core tube is small, even if the gas is blown to the tube wall of the core tube 2 without opening the vent hole 7, the temperature is 20 ° C.
A cooling rate of over min / min was obtained.
【0008】[0008]
【発明の効果】本発明によれば、シリコン気体への白金
拡散後の冷却を速くすることにより、白金とシリコンと
の化合物の形成を抑制できるので、順方向電圧降下のば
らつきの少ない半導体装置の製造が可能になった。そし
てそのような大きい冷却速度は、炉心管内部で半導体基
板を白金拡散炉から引出したのち炉心管外部から気体を
吹き付けることにより再現性よく行うことができる。According to the present invention, the formation of the compound of platinum and silicon can be suppressed by speeding up the cooling after platinum diffusion into the silicon gas, so that a semiconductor device with less variation in forward voltage drop can be obtained. Manufacturing is now possible. Then, such a high cooling rate can be achieved with good reproducibility by drawing the semiconductor substrate from the platinum diffusion furnace inside the core tube and then blowing gas from outside the core tube.
【図1】本発明の一実施例に用いる白金拡散装置の断面
図FIG. 1 is a sectional view of a platinum diffusion device used in an embodiment of the present invention.
【符号の説明】 1 電気炉 2 炉心管 3 Siウエーハ 4 ボート 5 ボートローダ 7 通気孔 8 N2 ガス[Explanation of reference symbols] 1 electric furnace 2 core tube 3 Si wafer 4 boat 5 boat loader 7 vent hole 8 N 2 gas
Claims (4)
付着させ、高温に加熱して基体内に白金を拡散させる工
程を含む半導体装置の製造方法において、半導体基体を
白金拡散後冷却する際の750 ℃から600 ℃までの温度範
囲の冷却速度を20℃/分以上とすることを特徴とする半
導体装置の製造方法。1. A method for manufacturing a semiconductor device, which comprises the step of adhering platinum to the surface of a semiconductor substrate made of silicon and heating it to a high temperature to diffuse platinum in the substrate. A method for manufacturing a semiconductor device, characterized in that a cooling rate in a temperature range from ℃ to 600 ℃ is set to 20 ℃ / min or more.
炉心管の高温部に挿入して所定の時間加熱したのち、基
体を炉心管の低温部まで引出し、その炉心管の低温部へ
外部から気体を吹き付ける請求項1記載の半導体装置の
製造方法。2. A semiconductor substrate to which platinum is adhered is inserted into a high temperature portion of a furnace core tube of a heat treatment furnace and heated for a predetermined time, and then the substrate is pulled out to a low temperature portion of the furnace core tube and externally supplied to the low temperature portion of the furnace core tube. The method for manufacturing a semiconductor device according to claim 1, wherein a gas is blown from the semiconductor device.
部から不活性ガスをその通気孔を通じて炉心管内に圧入
する請求項2記載の半導体装置の製造方法。3. A method of manufacturing a semiconductor device according to claim 2, wherein a vent hole is opened in a low temperature portion of the core tube, and an inert gas is externally pressed into the core tube through the vent hole.
3記載の半導体装置の製造方法。4. The method of manufacturing a semiconductor device according to claim 3, wherein nitrogen gas is used as the inert gas.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP04026994A JP3139101B2 (en) | 1992-02-14 | 1992-02-14 | Method of manufacturing high voltage diode |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP04026994A JP3139101B2 (en) | 1992-02-14 | 1992-02-14 | Method of manufacturing high voltage diode |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH05226271A true JPH05226271A (en) | 1993-09-03 |
JP3139101B2 JP3139101B2 (en) | 2001-02-26 |
Family
ID=12208715
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP04026994A Expired - Fee Related JP3139101B2 (en) | 1992-02-14 | 1992-02-14 | Method of manufacturing high voltage diode |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP3139101B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107190326A (en) * | 2017-05-13 | 2017-09-22 | 徐州中辉光伏科技有限公司 | The solar energy battery adopted silicon chip diffusion furnace of residual thermal stress Processing for removing can be achieved |
CN117089825A (en) * | 2023-06-01 | 2023-11-21 | 无锡松煜科技有限公司 | Plating chamber with uniform fluid distribution and plating method |
-
1992
- 1992-02-14 JP JP04026994A patent/JP3139101B2/en not_active Expired - Fee Related
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107190326A (en) * | 2017-05-13 | 2017-09-22 | 徐州中辉光伏科技有限公司 | The solar energy battery adopted silicon chip diffusion furnace of residual thermal stress Processing for removing can be achieved |
CN107190326B (en) * | 2017-05-13 | 2018-03-13 | 徐州中辉光伏科技有限公司 | The solar energy battery adopted silicon chip diffusion furnace of residual thermal stress Processing for removing can be achieved |
CN117089825A (en) * | 2023-06-01 | 2023-11-21 | 无锡松煜科技有限公司 | Plating chamber with uniform fluid distribution and plating method |
Also Published As
Publication number | Publication date |
---|---|
JP3139101B2 (en) | 2001-02-26 |
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