JPH0522604A - Image data decoder - Google Patents

Abstract

PURPOSE:To obtain an image data decoder which can reduce the deterioration of the picture quality through the interpolation processing even if the correction of an error is impossible in a block when the compressed image data are decoded. CONSTITUTION:If an error correction circuit 101 is impossible to correct errors, the information on an error flag is transmitted to an interpolation processing circuit 105. A fixed length setting circuit 102 sets the length of the corrected data at a fixed level. A scan conversion circuit 103 converts the zigzag scan into the raster scan, and this raster scan is adversely quantized by an adverse quantizing circuit 104. In an error unable state, the circuit 105 performs the interpolation processing circuit 105 with use of the data on the adjacent block. Then an adverse/orthogonal conversion circuit 106 decodes the image data.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image data decoding apparatus for decoding an image compressed by using a two-dimensional orthogonal transform.

[0002]

2. Description of the Related Art In recent years, the necessity of compressing image information for transmission and storage has increased, and techniques for receiving and reproducing images thus obtained without error have been developed.

A conventional image data decoding device will be described below. FIG. 4 shows a block diagram of this conventional image data decoding apparatus. In FIG. 4, an error correction circuit 401 is a circuit for correcting an error generated in a communication path or a recording / reproducing system, a fixed length circuit 402 is a circuit for fixing a variable length coded data to a fixed length, and a scan conversion circuit 4.
Reference numeral 03 is a circuit for raster-scanning the zigzag-scanned data in the block, dequantization circuit 404 is a circuit for dequantizing requantized data, and inverse orthogonal transformation circuit 405 is orthogonal transformation data. Is a circuit for performing an inverse orthogonal transform on.

The operation of the image data decoding apparatus configured as described above will be described below.

First, a coding method for image compression using two-dimensional orthogonal transformation will be described. FIG. 5 shows a block diagram of a general image data encoding device. The digital image data is divided into two-dimensional blocks by the block division circuit 501. The size of the block divided here is 8 × 8.
Pixels or 16 × 16 pixels are used. The divided data is two-dimensionally orthogonally transformed by the orthogonal transformation circuit 502. The orthogonal transform used here is the discrete cosine transform,
There is KL conversion. Since the data after the orthogonal transformation is transformed into the frequency domain, it is quantized by the quantizer 503 based on the visual characteristic of the sensitivity of human spatial frequency. The quantized data is output by the zigzag scan circuit 504 as shown in FIG.
Zigzag scanning (scanning the data of each point on the screen in the direction indicated by the arrow) is performed in the order as shown in, and converted into a one-dimensional data series. The quantized data is variable-length coded by the variable-length encoder 505, the first data in the block to the last non-zero coefficient are coded, and the code indicating the end of the block (End Of Block) Is added. The variable-length encoded data is encoded by the error correction encoder 506 so that it can be corrected even if an error occurs in the transmission or recording / reproducing system.

Next, a conventional decoding apparatus for decoding the data coded by the above coding method will be described. FIG. 4 shows a block diagram of a conventional image data decoding device. First, the error correction circuit 401 corrects an error generated in the transmission or recording / reproducing system. Since the corrected image data is variable-length coded, the fixed-length decoder 402 makes the data fixed-length. The decoding performed here is performed on the entropy coded one. For example, Huffman code, Weyl code, and the like. Since the fixed-length data is scanned in zigzag as shown in FIG. 6, the scan conversion circuit 40
Converted to raster scan by 3. Since the data converted into the raster scan has been requantized, it is inversely quantized by the inverse quantization circuit 404. Since the inversely quantized data is orthogonally transformed data, it is inversely orthogonally transformed by the inverse orthogonal transformation circuit 405 and decoded into image data.

[0007]

However, the above-mentioned conventional configuration has a problem that when an error occurs due to noise in the communication path, a scratch on the storage medium, or the like, the error occurs in block units.

The present invention solves the above-mentioned conventional problems, and provides an image data decoding apparatus in which the image quality is less deteriorated by performing the interpolation process even if the error correction in the block becomes impossible during the decoding. The purpose is to

[0009]

To achieve this object, an image data decoding apparatus according to the present invention uses an error correction circuit for correcting an error in digital image data and an output of the error correction circuit as an input, and a variable length A fixed length circuit for making the encoded data a fixed length, a scan conversion circuit for inputting the output of the fixed length circuit and converting the zigzag scanned data into a raster scan, and the scan conversion The output of the circuit is used as an input, the inverse quantization circuit for inversely quantizing the requantized data and the output of the inverse quantization circuit are used as inputs, and the data that cannot be error-corrected by the error correction circuit is input. An interpolation processing circuit for interpolating, and an inverse orthogonal transformation circuit for receiving the output of the interpolation processing circuit as an input and performing inverse orthogonal transformation on the orthogonally transformed data are provided.

[0010]

According to the present invention, when the error correction becomes impossible, the interpolation processing circuit performs the interpolation processing by using the data of the adjacent blocks.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of an image data decoding apparatus according to an embodiment of the present invention. In FIG. 1, the error correction circuit 101 is a circuit that performs error correction. However, when error correction becomes impossible, error flag information is sent for interpolation processing by an interpolation processing circuit 105 that is performed later. The corrected data is the fixed length circuit 10
2, the data is fixed in length, and the scan conversion circuit 10
A zigzag scan is converted into a raster scan by 3 and the inverse quantization circuit 104 performs inverse quantization. Also,
If the error cannot be corrected, it is interpolated by the interpolation processing circuit 105 and decoded into image data by the inverse orthogonal transformation circuit 106.

The operation of the image data decoding apparatus of this embodiment having the above configuration will be described below. An error occurs in the signal passing through the communication path and the signal detected from the storage medium due to noise in the communication path and scratches on the recording medium. Therefore, the error correction circuit 101 corrects the error. Here, the majority of the errors are corrected, but if they cannot be corrected, an error flag is set and the error is sent to the complementary processing circuit 105 which will be performed later. The error-corrected data is entropy-coded such as Huffman code and Weyl code, and has different code lengths. Therefore, the fixed length conversion circuit 102 converts the data to a fixed data length such as 8 bits. To be done. Since the converted data is zigzag scanned in the block as shown in FIG. 6, the scan conversion circuit 103 converts the converted data into raster scan. Since the two-dimensional data converted into the raster scan is requantized according to the visual spatial frequency, it is dequantized by the dequantization circuit 104. If the inversely quantized data has no error or the error is corrected, the inverse orthogonal transform circuit 106 decodes the orthogonally transformed data into the original image data.
If the error cannot be corrected, the interpolation processing circuit 10
5, the data is interpolated. The variable-length coded data is variable-length coded by a two-dimensional Huffman code or the like with a set of a run length of zero and a coefficient of nonzero. Therefore, if the run-corrected portion has a run length of zero, zero is inserted at the beginning of the data (the zigzag-scanned data) after the position where the error cannot be corrected, as shown in FIG. The shift register is compared with the register that stores the average value of the data after the position where the error correction of the adjacent block becomes impossible between blocks and compares it, and the square addition value of the difference is inserted. Let the number of zeros be the predicted value of the run length of zero. When a non-zero coefficient becomes uncorrectable, it is performed by replacing it with the average value of the coefficients at the same position in adjacent blocks, as shown in FIG.

As described above, according to the present embodiment, by providing the interpolation processing circuit, it is possible to provide the image data decoding apparatus in which the image quality is less deteriorated even if the error correction cannot be performed in the block at the time of decoding. You can

[0015]

As described above, according to the present invention, the error correction circuit (101), the fixed length circuit (102), the scan conversion circuit (103), the inverse quantization circuit (104), and the interpolation processing circuit. By providing (105) and the inverse orthogonal transform circuit (106), even if error correction cannot be performed in a block at the time of decoding, the interpolation processing circuit performs interpolation processing using data of an adjacent block. Because you can
It is possible to provide an image data decoding device with little deterioration in image quality.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an image data decoding device according to an embodiment of the present invention.

FIG. 2 is a block diagram showing an internal configuration of an interpolation circuit for predicting a run length of zero in the embodiment.

FIG. 3 is a schematic diagram for explaining the operation of an interpolation circuit for predicting the value of a non-zero coefficient in the embodiment.

FIG. 4 is a block diagram showing a configuration of a conventional image data decoding device.

FIG. 5 is a block diagram showing a configuration of a conventional image data encoding device.

FIG. 6 is a schematic diagram for explaining the operation of a scan conversion circuit in a conventional example.

[Explanation of symbols]

101 error correction circuit 102 Fixed length circuit 103 scan conversion circuit 104 inverse quantization circuit 105 interpolation processing circuit 106 inverse orthogonal transform circuit 201 shift register 202 register 203 Difference Square Adder

Claims (3)

[Claims] 1. An error correction circuit for correcting an error in digital image data; a fixed length circuit for inputting an output of the error correction circuit to make variable length coded data a fixed length; A scan conversion circuit for converting the zigzag scanned data into a raster scan by using the output of the lengthening circuit as an input, and an output of the scan conversion circuit as an input for dequantizing the requantized data. An inverse quantization circuit, an interpolation processing circuit that receives the output of the inverse quantization circuit as an input, and interpolates data that has become error-correctable by the error correction circuit, and an output of the interpolation processing circuit as an input An image data decoding device, comprising: an inverse orthogonal transformation circuit for performing inverse orthogonal transformation on the transformed data. 2. The interpolation processing circuit, when two-dimensional variable-length coding in which a run length of zero and a value of a coefficient are paired with each other and the run length of zero cannot be error-corrected, an error in a block is generated. A shift register that sequentially inserts zeros at the beginning of data after the uncorrectable position, a register that averages and stores data after the error-corrected position of an adjacent block between blocks, and the shift register And a square adder for calculating a square addition value of a difference between the data in the register and a difference between the data in the register and the square addition value of the difference being a minimum run length prediction value. The image data decoding device according to claim 1. 3. The interpolation processing circuit, in two-dimensional variable-length coding in which a run length of zero and a coefficient value are paired, if the value of the coefficient cannot be error-corrected, the adjacent blocks are the same. The image data decoding device according to claim 1, wherein the image data decoding device performs an interpolation process of replacing with an average value of coefficients at positions.