JPH0522201A - Reception diversity circuit - Google Patents

Abstract

PURPOSE:To use only one diversity receiver for plural antennas arranged apart in data communication and to avoid the deterioration in the efficiency of transmission of information. CONSTITUTION:The circuit consists of a selection circuit 3 selecting either of outputs of plural antennas 1, 2, a level detection circuit 5 detecting a reception level of the selected output, a receiver 4 demodulating the selected output and extracting and outputting a frame timing clock of a reception signal, and a logic circuit 6 fetching the reception level according to the frame timing clock extracted, deciding the selection of the antenna for a succeeding frame in the unit of frames and controlling the changeover of the selection circuit 3.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a reception diversity circuit which is used in a radio receiver for data communication in which transmission information is digitized and is used for the purpose of improving the reception quality.

[0002]

2. Description of the Related Art Conventionally, a post-detection selection diversity system is used as the reception diversity circuit. An example of the configuration is shown in FIG. In FIG. 4, 41 and 43 are receiving antennas, 42 and 44 are receivers, and 45 is a receiving antenna 4.
A level detection / comparison circuit that outputs the result of comparing the levels of the outputs of 1, 43 as an input, and 46 is an output of the level detection / comparison circuit 45.
It is a selection circuit for selecting any one of the outputs.

[0003]

However, in the above-mentioned conventional system, the configuration of the receiver is two systems, the scale of the device is large, and it is about twice as large as that without diversity. Further, as another conventional diversity circuit, there has been proposed a switching diversity in which only a plurality of antenna parts are provided and the antenna output is switched and input to one receiver (Yoshihiko Akaiwa: "Antenna selection diversity system for digital mobile communication"). 1989 IEICE Spring National Convention B-85
6).

However, in this method, it is necessary to add a test signal to the frame for transmission to check which of the plurality of antennas has the best communication quality, and to transmit the test signal, which shortens the frame length of data communication. Accordingly, there is a problem in that the information transmission efficiency decreases.

It is an object of the present invention to provide a reception diversity circuit in a radio receiver for burst communication, which solves the problem of device scale expansion or the problem of information transmission efficiency deterioration caused by using the conventional method. is there.

[0006]

The reception diversity circuit of the present invention is separately arranged for diversity reception of a radio wave modulated by data divided into frames for each unit time by one radio receiver. Multiple receiving antennas,
A selection circuit that selects and outputs one of the plurality of reception antenna outputs according to a switching signal, demodulates and outputs the signal from the selection circuit, and extracts and outputs a timing clock of a reception frame from the demodulation result. Receiver, a level detection circuit that detects the reception level of the selected one reception antenna from the output signal of the selection circuit and outputs a reception level signal, and the reception level signal is input according to the timing clock. A logic circuit for determining the antenna selection of the next reception frame from the past and present reception level changes for each reception frame and the history of selection of the reception antenna and outputting the switching signal. Is.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT FIG. 1 is a block diagram of a receiving diversity circuit according to the present invention. In the figure, 1 and 2 are reception antennas, 3 is a selection circuit for selecting one of the outputs of the reception antennas 1 and 2, and 4 is a demodulation result of the reception signal from the selection circuit 3 and outputs the demodulation result. A receiver for extracting the timing clock of the reception frame, 5 is a level detection circuit for detecting the level of the reception signal from the selection circuit 3 and outputs a reception level signal, and 6 is the level detection circuit 5
A logic circuit for controlling the switching operation of the selection circuit 3 with the reception level signal from the receiver and the timing clock of the reception frame from the receiver 4 as inputs.

[Operation] In FIG. 1, the signals received by the antennas 1 and 2 are selected by the selection circuit 3.
The output of the selection circuit 3 is input to the level detection circuit 5 and the receiver 4. The level detection circuit 5 detects the reception level of the selected antenna during reception and outputs it to the logic circuit 6. The receiver 4 demodulates and outputs the reception signal from the selection circuit 3, and extracts the timing clock of the reception frame from the demodulation result and supplies it to the logic circuit 6. The logic circuit 6 determines the antenna to be selected in the next frame from the reception level signal from the level detection circuit 5, and controls the switching of the selection circuit 3 according to the timing clock of the reception frame from the receiver 4.

Next, the operation of the logic circuit 6 forming the essential part of the present invention will be described in detail with reference to FIG. FIG. 2 is a flowchart showing an example of the operation algorithm of the logic circuit 6.
First, in step 21, the variables used in the logic circuit, the reception levels of the antennas 1 and 2 (each L
₁ and L ₂ ) and the level threshold value for switching judgment (L _th
And)) is initialized.

Next, in step 22 <after initial or after switching>, a flag for storing the presence / absence of switching in the previous frame is turned on. In step 23 <Reception and level detection / update>, one frame is received by the currently selected antenna (eg, antenna 1), and the above L ₁ is updated by the level of the received signal input to the receiver 4. To do.

Then, in step 24 <Comparison of reception level and threshold value>, the reception level L ₁ is compared with the threshold value L _th . When L ₁ is _{equal to} or greater than L _th , it is determined that the currently selected antenna will continue receiving, and the process proceeds to step 25. Conversely, when L ₁ is less than L _th , the process proceeds to step 28. In step 25 <when the reception level is equal to or higher than the threshold value>, reception is continued by the currently selected antenna, but whether the threshold value is updated or not is determined by turning on / off the switching flag.
If the switching flag is ON, the threshold value updating process step 2
When the switching flag is OFF, the threshold value is not updated and the next frame is received in the reception processing step 23 at the currently selected antenna. Step 26
When the operation goes to <Update of threshold value>, the threshold value is updated using a level obtained by subtracting a predetermined margin from the current reception level as a new threshold value, and the process proceeds to step 27. In the above threshold value updating, a more appropriate switching operation is performed by subtracting a large margin when the reception level is high and subtracting a small margin when the reception level is low. In step 27, the switching flag is turned off
After that, the process proceeds to reception of the next frame in the reception processing step 23 at the currently selected reception antenna.

On the other hand, when the process proceeds from step 24 to step 28 <when the reception level is less than the threshold value>, the ON / OFF state of the switching flag is checked in step 28, and when the switching flag is ON, it is currently selected. It is judged that it is just after switching from another receiving antenna different from the receiving antenna of No. 2, and the process proceeds to step 29. When the switching flag is OFF, the process proceeds to step 30, and it is determined that the reception level has dropped below the threshold during reception by the currently selected receiving antenna, and switching is performed in synchronization with the next frame timing. ,
Switch the selection to another receiving antenna. In step 29 <when the reception level is less than the threshold value and the switching flag is ON>, the level L _{1 of} the currently selected reception antenna is compared with the level L ₂ (stored value) obtained by another reception antenna, L
_{If 1} is L ₂ or more, it is assumed that the reception by the currently selected antenna is continued, and the process proceeds to step 27. When L ₁ is less than L ₂ , switching is performed in synchronization with the next frame timing, and the selection is switched to another receiving antenna, and the process proceeds to step 30. In step 30 <immediately after switching>, the switching flag is turned on immediately after the receiving antenna is switched, and the receiving antenna 2 performs the same processing as steps 23 to 29.

FIG. 3 is a characteristic diagram showing an example of a simulation result showing the effect of the reception diversity according to the present invention, and is shown together with the case where the diversity is not used. In FIG. 3, the horizontal axis is the average E _b / N ₀ (ratio of transmission power per signal bit to noise power density), and the vertical axis is the average bit error rate. This simulation is based on mobile communication time division multiplexing, 2-branch reception diversity, π / 4 shift QP.
The SK modulation, 128 symbols / slot, and the fading speed were ^2-14 (fading pitch / symbol rate). In FIG. 3, as for the diversity effect according to the present invention, a gain of 4 dB or more is obtained as compared to the case without diversity. The above embodiment has been described for the case of two antennas, but can be applied to the case of a plurality of antennas.

[0014]

As described above in detail, according to the present invention, since the diversity circuit can be configured by the antenna, one level detection circuit, and a simple logic circuit, the scale of the receiver can be reduced from the conventional one. It can be made significantly smaller than the comparison. Further, when controlling the antenna switching, there is no need for a test signal added to the frame, so that there is an advantage that the transmission efficiency of information is not reduced.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a flowchart showing an example of an operation algorithm of a logic circuit forming a main part of the present invention.

FIG. 3 is a characteristic diagram showing the effect of the present invention.

FIG. 4 is a diagram illustrating a conventional configuration example.

[Explanation of symbols]

 1 reception antenna 2 reception antenna 3 selection circuit 4 receiver 5 level detection circuit 6 logic circuit 41 reception antenna 42 receiver 43 reception antenna 44 receiver 45 level detection / comparison circuit 46 selection circuit 21 to 30 step number

Claims (1)

Claim: What is claimed is: 1. A plurality of receiving antennas, which are arranged apart from each other, for diversity reception of a radio wave modulated by data divided into frames for each unit time by one radio receiver. A selection circuit that selects and outputs one of the plurality of reception antenna outputs according to a switching signal, demodulates and outputs a signal from the selection circuit, and extracts and outputs a timing clock of a reception frame from the demodulation result. A receiver, a level detection circuit that detects a reception level of the selected one reception antenna from the output signal of the selection circuit and outputs a reception level signal, and the reception level signal is input according to the timing clock. , The selection of the antenna for the next received frame from the history of changes in the received level for each received frame in the past and present and the selection of the received antenna. And a logic circuit which determines the selection and outputs the switching signal.