JPH05204757A - Cache memory - Google Patents

Abstract

PURPOSE:To improve the cache hit rate of the cache memory. CONSTITUTION:This cache memory is provided with a cache directory 3 to store addresses from a level '1' to a level '4,' cache directory 4 to store addresses from a level '5' to a level '8,' decoder 2 to convert addresses to column numbers, cache search logics 6 and 7 to search the respective cache directories 3 and 4 based on the column numbers, column conversion register 5 to respectively reload the virtual column numbers and the real column numbers, control part 9 to reload the real column numbers in this column conversion register 5, memory 8 to store the column number retrieved by the cache search logic 7 and the number of times for the retrieval, and used column register 11 to store the MAX used column number and the MIN used column number.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mapping type cache memory.

[0002]

2. Description of the Related Art Conventionally, for example, a hard disk (HD
A disk cache memory is used to retrieve information from D) or the like. This cache memory temporarily stores information frequently used among recorded information such as an HDD in order to speed up information access, and desired information exists in the cache memory. The higher the probability of establishment (hit rate), the greater the effect of shortening the access time, and the improvement of this hit rate is desired.

A memory area structure of a conventional cache memory will be described with reference to FIGS. 5 and 6.

In FIG. 5, reference numeral 51 is a memory area of the cache memory. The memory area 51 is divided into n columns. A column number is attached to each column, and the fixed number of levels m
The cache block 52 is stored in. The level number m is determined from the cache memory size, the cache block size, the number of columns, and the like.

When a disk address such as an HDD is input to the cache memory having such a memory area 51, the search target columns are determined in a one-to-one correspondence with the disk address.

Here, how to obtain the search target column will be described with reference to the disk address configuration diagram of FIG.

The disk address 61 is newly assigned to a different column when the number of levels assigned to one column is exceeded, and is again assigned to the first column when the number of cache blocks × the number of columns is exceeded.

For example, the total size of the memory area 51 shown in FIG. 5 is 4 MByte, and the cache block size is 4 KByt.
e, the sector size of the disk is 256Byte, the number of columns is 6
4. If the number of levels is 16, 16 sectors are allocated from a sector size of 256 bytes to store a 4KByte cache block. To add a sector number to these 16 sectors, 0 bit of the disk address 61
4 bits from 1 to 3 bits are required, and the 4 bits at the end of the disk address 61 are irrelevant to the column number. Since the number of columns is 64, the disk address 61
If the number exceeds 64 × 16 sectors = 1024 sectors, the disk address 61 is again assigned to the same column, so that bits higher than 10 bits of the disk address 61 are also irrelevant to the column number. That is, the disk address 61
Since 4 to 9 bits are the column number, the column number is obtained by extracting a part of the disk address 61 and decoding it.

For example, if the disk address 61 is (12345) h, the binary code is (00010010001101000101) b.
Therefore, 4 to 9 bits are extracted as the column number, and (110100) b = (34) h = 52.

As described above, in the cache memory, the column number is derived from the disk address 61, and the target column is searched based on this column number. In addition, in order to improve the response time, usually, only a predetermined column is searched.

The search result, that is, whether or not there is a cache hit is determined by all cache blocks 5 in the target column.
Search for 2 and detect. If there is no cache hit, the data in a certain cache block 52 is discarded based on the replacement algorithm, and newer data from the HDD is loaded into that cache block 52.

By the way, in this cache memory, the number m of levels of all columns is fixed (same), so the number m of levels is insufficient for columns that are frequently used, while the number of levels m is low for columns that are not frequently used. 52 is not used effectively, and the cache hit rate decreases as a whole cache memory.

[0013]

As described above, in the conventional cache memory described above, since the number of levels of each column is fixed, the number of levels may become insufficient when the frequency of use of a predetermined column becomes high, and the cache may not be cached. There was a problem that the overall hit rate decreased.

In order to achieve the above object, it is an object of the cache memory of the present invention to provide a cache memory which can effectively utilize the number of levels of each column to improve the cache hit rate.

[0015]

In order to achieve the above-mentioned object, a cache memory of the present invention has a plurality of columns in a memory area and has a fixed number of levels for storing cache blocks of these columns. In the memory, first and second cache directories that divide the memory area into a plurality of areas and store addresses corresponding to the respective areas, and when an address as an access request is input, this address is used as a column number. A decoder for conversion, a first search logic for performing a first search for the first cache directory based on a column number output from the decoder, a virtual column number corresponding to the column number, and a second search. And a column conversion register that stores each of the multiple real column numbers A means for searching the virtual column number based on the column number input to the column conversion register and outputting a plurality of real column numbers according to the matched virtual column number; and a second means based on the plurality of real column numbers. A second search logic for performing a second search for the cache directory of, and a column number searched by the second search and a column number with a small number of searches and a column number with a large number of searches among the number of searches. The column register to be used and each column number from the column register to be used are searched, the virtual column number in the column conversion register that matches the column number that is searched many times is searched, and the column conversion register is operated according to the virtual column number. And a means for writing each column number as a column number.

[0016]

In the present invention, when an address is input as an access request, this address is converted into a column number by the decoder. Then, the first search is performed based on the converted column number.

On the other hand, this column number is also input to the column conversion register. In this column conversion register, a plurality of real column numbers according to a virtual column that has been used many times are written, and these plurality of real column numbers are output to the second search logic.

Then, a second search is performed on the basis of these plural real column numbers, and as a result, plural columns of the memory area are searched.

That is, when an access request is made to a column that has been used a large number of times, the number of columns to be searched in the memory area is increased by the first and second searches.

As a result, the cache hit rate of the cache memory is improved.

[0021]

Embodiments of the present invention will now be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing the structure of a cache memory according to an embodiment of the present invention.

In the figure, 1 is a disk address register, which stores a disk address. Reference numeral 2 is a decoder which decodes the disk address output from the disk address register 1 and outputs a column number. Reference numerals 3 and 4 denote cache directories, in which the memory area is divided into a plurality of areas in advance by software, and the disk address and the status flag of each cache block corresponding to each area are stored. For example, in the present embodiment, one cache directory 3 stores disk addresses of 1 to 4 levels out of the number of column levels, and another cache directory 4 stores 5 to 8 levels out of the number of column levels. The disk addresses up to are stored. A column conversion register 5 stores a virtual column corresponding to the decoded column number and a plurality of, for example, two real column numbers according to the virtual column number. A first cache search logic 6 performs a first search for the cache directory 3 based on the decoded column number. A second cache search logic 7 performs a second search for the cache directory 4 based on the actual column number from the column conversion register. Also, this cache search logic 7
The cache directory 4 is searched by the number of real column numbers output from the column conversion register 5 (twice because the real column number is two in this embodiment). A memory 8 stores the number of times the cache search logic 7 has searched the cache directory 4 and the column number. Reference numeral 9 denotes a control unit, which performs disk address control for each register, allocation of column numbers, and writing. Reference numeral 10 is a result register, and the search results of the cache search logics 6 and 7, and when one or a mutual hit occurs, the control unit 9 stores the level number of the column having the lower priority. Reference numeral 11 is a used column register, which is the column number with the largest number of searches and the number of times that it was searched (MAX used columns), and the column number with the smallest number of searches and the number of searches (MIN used columns)
And are temporarily stored.

Next, the operation of this cache memory will be described with reference to the flow chart of FIG.

In this cache memory, the disk address is transferred to the disk address register 1 by an access request.
(Step 201), the controller 9 outputs the disk address from the disk address register 1 to the decoder 2
To output. Then, the decoder 2 converts the disk address into a column number to determine the search target column (step 202). The column number is output from the decoder 2 and input to the cache search logic 6 and the column conversion register 5 (step 203).
). The cache search logic 6 performs a first search for detecting the presence or absence of the disk address of the cache directory 3 based on the input column number.

The control unit 9 searches the column conversion register 5 for a virtual column number that matches the input column number (step 204). When there is a matching virtual column number, a plurality of, for example, two real column numbers according to this virtual column number are read by the control unit 9 and input to the cache search logic 7 (step 20).
Five). The cache search logic 7 performs a second search for detecting the presence or absence of the disk address of the cache directory 4 based on the two real column numbers. Note that the numerical values of the two real column numbers are numerical values from 0 to n, and if 0, it means that there is no search target, and the second search is not performed for the cache directory 4.

In this way, the two cache search logics 6 and 7 simultaneously search the respective cache directories 3 and 4 (step 206).

The search results of the cache search logics 6 and 7 are stored in the memory 8 and the result register 10 (step 207). The memory 8 stores the column number searched by the cache search logic 7 and the number of times of searching. In addition, the result register 10
In, the search results of the two cache search logics 6 and 7 are OR-combined and the number of levels corresponding to each search result is stored. For example, when each other is a hit,
The number of levels with lower priority is stored.

Subsequently, the cache search logic 7
At a certain point of time, for example, when the difference between the number of searches for the column with the largest number of searches and the number of searches for the column with the smallest number of searches becomes 10: 1, the column number stored in the memory 8 and its column number are stored. The number of times of retrieval is read out, and information of a plurality of columns, for example, two columns is taken out from the information on the number of times of retrieval at that time and is stored in the used column register 11 (step 208). For example, the number of searches for the column number of the column with the highest number of searches (MAX used column) and the column with the least number of searches (MIN used column)
And the number of searches for the column numbers are stored in the used column register 11, respectively. Note that the search count information when the actually searched real column number and virtual column number are different and the search count information when the real column number and virtual column number are the same are extracted separately. When each search count information is input to the use column register 11, the control unit 9 reads each search count information from the use column register 11, and the column conversion register 5 in the column conversion register 5 based on the MAX use column number among these column numbers. And writes the MAX used column number and the MIN used column number in the column of the real column according to the virtual column number that matches the MAX used column number (step 209). Also, in the column of the real column that follows the virtual column number that matches the column number used by MIN, 0,
Write 0.

Here, a state in which the memory area column is searched will be described with reference to FIG.

As shown in the figure, a plurality of, for example, 1 to 8 columns are provided in the memory area 31. These columns have a fixed number of levels, for example 1 ~
It has 8 levels, in which hard disk (HDD)
Stores the cache block copied locally from the. For example, at the levels 1 to 4, the cache block corresponding to the disk address derived as a result of the cache search logic 6 searching the cache directory 3 is stored.

On the other hand, at the levels 5 to 8, the cache block corresponding to the disk address derived as a result of the cache search logic 7 searching the cache directory 4 is stored.

Here, the contents of the column conversion register 5 at a certain point in time after the access is performed to some extent are shown in FIG.
Each search operation in the case shown in FIG. The lower column of the actual column column of the column conversion register 5 shows the column column in which the first search is performed, and the upper column shows the column column in which the second search is performed. Also, the number 0
Indicates that there is no search target, and 1 to 8 indicates the actual column number of the search target column. Further, the number in the virtual column column indicates the virtual column number, and this virtual column number is the search target by the control unit 9. Of the virtual column numbers 1 to 8, the real column numbers that follow the virtual column of 2, for example, are two (2, 3) real column numbers.

In this case, when the access request is made with respect to the column number of 2, the control unit 9 searches the column conversion register 5 and the real column numbers of 2 and 3 which follow the virtual column of 2 matching the column number of 2 are obtained. It is output to the cache search logic 7 and the second search is performed.

On the other hand, from the first search result, the second column
The first to fourth levels are searched, and at the same time, the second search result is searched for the fifth to fifth levels in the second column, followed by the fifth to eighth levels in the third column. And the total number of levels searched by the second search result is 12 levels.

Further, when the column number 3 is requested at the access request stage, the virtual column number 3 has the real column number 0
, 0 are stored, there is no search target of the cache search logic 7, and the disk address is not searched.
Therefore, the columns of the memory area 31 are actually searched for from 1 to 3 of the 3 columns by the first search.
There are only 4 levels in total, up to 4 levels. Note that the actual column number of the column conversion register 5 is set to the MAX used column and MI of the used column register 11 each time the access count increases.
N The used column is rewritten, so it changes.

As described above, according to the cache memory of the present embodiment, the column conversion register 5 has two real column numbers according to the virtual column number that coincides with the column number used most frequently, for example, the column used most frequently. The number and the least used column number are written, and the 5 to 8 levels of the most used column are followed by the 5 to 8 levels of the least used column so that the most used column is searched. The number of levels for many columns can be increased. In addition, the number of levels of the column that is used the least is the minimum required.

As a result, the cache hit rate can be improved for the entire cache memory.

The present invention can be used as a cache memory such as a floppy disk and an optical disk in addition to a hard disk (HDD) as an application example.

Further, according to the present invention, the maximum (MAX) and the minimum (MI
Not only N) but also subdividing the used column register and providing the number of columns of the column conversion register by this number, it is possible to increase or decrease the number of levels of each column so that the cache hit rate becomes higher.

[0041]

As described above, according to the cache memory of the present invention, the number of levels in each column can be increased or decreased according to the number of times each column is used, so that the number of levels in each column can be effectively utilized. As a result, the cache hit rate can be improved.

[Brief description of drawings]

FIG. 1 is a block diagram for explaining a hardware configuration of a cache memory according to an embodiment of the present invention.

FIG. 2 is a flowchart for explaining the operation of the cache memory shown in FIG.

FIG. 3 is a diagram showing a state of a memory area of a cache memory according to an embodiment of the present invention.

FIG. 4 shows the contents of a column conversion register at a certain point in time after access has been performed to some extent.

FIG. 5 is a diagram showing a state of a memory area of a conventional cache memory.

FIG. 6 is a diagram showing a configuration of a disk address of a conventional cache memory.

[Explanation of symbols]

1 ... Disk address register, 2 ... Decoder, 3, 4
... cache directory, 5 ... column conversion register,
6, 7 ... Cache search logic, 8 ... Memory, 9 ...
Control unit, 10 ... Result register, 11 ... Used column register.

Claims (1)

[Claims] 1. In a cache memory having a plurality of columns in a memory area and having a fixed number of levels for storing cache blocks of these columns, the memory area is divided into a plurality of areas, and each area is associated with each area. First and second cache directories for storing the addresses to be stored, a decoder for converting the addresses into column numbers when an address as an access request is input, and the first cache directory based on the column numbers output from the decoder. A first search logic for performing a first search for the cache directory of, and a column conversion register for storing a virtual column number corresponding to the column number and a plurality of real column numbers for which a second search is performed, respectively. Based on the column number input to the column conversion register, the virtual A means for searching a RAM number and outputting a plurality of real column numbers according to the matched virtual column number; and a second search logic for performing a second search on the second cache directory based on the plurality of real column numbers. , A column number retrieved by this second search and a column number used for storing a column number having a small number of retrievals and a column number having a large number of retrievals among the number of retrievals, and each column number read from the column column used ,
A means for searching a virtual column number in the column conversion register that matches a column number that is frequently searched and writing each column number as an actual column number according to the virtual column number in the column conversion register. And cache memory.