JPH05199504A - Digital video signal processing circuit - Google Patents

Abstract

PURPOSE:To enable the transfer of resolution having bits more than the number of bits to be spriously transferred by one bit by returning to a video signal at a D/A converter and attenuating the 1/2 component of a quantized clock at a low-pass filter later. CONSTITUTION:This circuit is provided with an A/D converter 13 to convert the input video signal into a digital signal synchronously to a clock, frequency divider 15 to frequency divide the clock into two stages, and digital adder 16 to add the output of the A/D converter and the output of the frequency divider. Further, a means to transfer the signal after cutting the least significant bit of this digital adder 16, a D/A converter 19 to convert the digital signal into the video signal, and a second low-pass filter 20 to remove the frequency component of a frequency dividing period output from the output of the D/A converter are provided. After the video signal is quantized by the A/D converter with the resolution of bits more than the number of bits to be transferred just by one bit, the video signal is added to a signal having the amplitude of 1LSB in the 1/2 cycle of the quantized clock, the added signal is transferred while cutting off the LSB and after the signal is returned to the video signal, it is attenuated by the low-pass filter.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital video signal processing circuit which digitizes an analog video signal and processes it.

[0002]

2. Description of the Related Art In recent years, digital video signal processing circuits have been put into practical use in televisions, videos, video disc players and the like for the purpose of achieving high image quality and high stability. In the future, it is desired to introduce a low-cost, high-quality digital video processing circuit into the market.

A conventional digital video processing circuit will be described below. FIG. 3 shows the configuration of a conventional digital video processing circuit. In FIG. 3, reference numeral 1 is an input terminal. 2 is the first low-pass filter, 3 is 8-bit A /
D converter, 4 is an 8-bit signal processing circuit, 5 is an 8-bit D
A / A converter, 6 is a second low-pass filter, 7 is an output terminal, and 8 is an oscillator.

The operation of the digital video signal processing circuit configured as described above will be described below.
First, the first low-pass filter 2 band-limits the 8-bit A / D converter 3 so that aliasing distortion does not occur when the video signal input from the input terminal 1 is A / D converted. Is entered. The signal input to the 8-bit A / D converter 3 is converted into an 8-bit parallel digital signal in synchronization with the clock input from the oscillator 8.
The output of the 8-bit A / D converter 3 is input to the 8-bit signal processing circuit 4 and subjected to specific signal processing to obtain the 8-bit D / A.
It is input to the converter 5. The 8-bit D / A converter 5 converts the input 8-bit parallel signal into an analog video signal in synchronization with the clock input from the oscillator 8. 8
The output of the bit D / A converter 5 has a second low-pass filter 6 for removing the aliasing distortion, and the video signal passing through this is output from the output terminal 7. The 8-bit signal processing circuit 4 is a circuit such as a field memory or a time axis correction circuit.

[0005]

However, in the above-mentioned conventional configuration, since the A / D converter quantizes the video signal, a quantization error occurs and the quality of the video signal deteriorates. In order to reduce the quantization error, it is necessary to increase the number of transfer bits, which increases the price of the signal processing circuit and D / A converter, so that it is not possible to provide a high-quality video signal processing circuit at low cost. There was a problem.

The present invention solves the above-mentioned conventional problems, and is a digital video signal capable of transferring a low-cost and high-quality digital video signal in which the resolution of one bit is pseudo more than the number of bits of the transfer path. An object is to provide a processing circuit.

[0007]

In order to achieve this object, the digital video signal processing circuit of the present invention is an A / D which converts an input video signal into a digital signal in synchronization with a clock.
A D converter, a frequency divider for dividing the clock by two, a digital adder for adding the A / D converter output and the frequency divider output, and means for truncating and transferring the least significant bit of the digital adder. , D / for converting digital signals to video signals
It has a configuration including an A converter and a filter for removing the frequency component of the frequency divider output from the D / A converter output.

[0008]

With this configuration, it is 1 more than the number of bits to be transferred.
An A / D converter with a high bit resolution quantizes a video signal, adds it with a signal having an amplitude of 1 LSB at a half cycle of the quantized clock, then truncates the LSB and transfers the D / A conversion. After returning to the video signal with a video signal, the 1/2 component of the quantized clock is attenuated by the low-pass filter, so that it is 1 more than the number of bits to be pseudo transferred.
It is possible to provide a digital video signal processing circuit capable of transferring with a resolution of more bits.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

In FIG. 1, 11 is an input terminal, 12 is a first low pass filter, 13 is a 9-bit A / D converter,
Reference numeral 14 is an oscillator, 15 is a frequency divider, 16 is an adder, 17 is a rounding circuit, 18 is an 8-bit signal processing circuit, 19 is an 8-bit D / A converter, 20 is a second low-pass filter, 21
Is an output terminal.

The operation of the digital video signal processing circuit configured as described above will be described with reference to FIG. The first low-pass filter 12 band-limits the 8-bit A / D so that aliasing distortion does not occur when the video signal input from the input terminal 11 is A / D converted.
It is input to the converter 13. When a video signal that changes gently as shown by the thick line in FIG. 2A is output from the terminal 11, the signal is not attenuated by the first low-pass filter 12 in that frequency band, so 9-bit A / The signal indicated by the bold line in FIG. 2A is directly input to the input of the D converter 13. The 9-bit A / D converter 13 converts the input into a 9-bit parallel digital signal in synchronization with the clock input from the oscillator 14, and obtains the output as shown by the thin line in FIG. On the other hand, the output of the oscillator 14 is frequency-divided by the frequency divider 15 to obtain a signal as shown in FIG. This signal has an amplitude of 1 and is 1/2 the quantization clock.
It is a periodic signal. The output of this frequency divider 15 and 9 bits A
The outputs of the / D converter 13 are both input to the adder 16 and added. The output of the adder 16 is as shown in FIG. 2 (c), and the least significant bit of this signal is dropped by the rounding circuit 17 to become an 8-bit signal as shown in FIG. 2 (d).
This 8-bit signal is processed by the 8-bit signal processing circuit 18 and input to the 8-bit D / A converter 19. The 8-bit D / A converter 19 converts the input 8-bit parallel signal into an analog video signal in synchronization with the clock input from the oscillator 14. The output of the 8-bit D / A converter 19 also becomes as shown in FIG. 2 (d), so that when it passes through the second low-pass filter 20, it becomes as shown in FIG. An intermediate gradation of steps, that is, a gradation with 9-bit precision can be obtained. Since the output of the 8-bit D / A converter 19 has aliasing distortion, the second low-pass filter 20 also has a function of removing it. The video signal that has passed through the second low-pass filter 20 is output from the output terminal 21. 8-bit signal processing circuit 1
Reference numeral 8 is a circuit such as a field memory or a time axis correction circuit.

Generally, in a digital video signal processing circuit that handles a video signal, the quantization clock frequency is set to be considerably higher than the video signal band, so that the video signal, as described with reference to FIG. It can be considered that the output changes gently compared to the output of the frequency divider 15. Further, as shown in the present embodiment, the frequency of the signal added to the digital video signal is ½ of the quantization clock frequency. Low pass filter 20
Then, if the component is removed, it does not interfere with the original video signal.

As described above, according to this embodiment, the input terminal, the first low-pass filter, the 9-bit A / D converter, the oscillator, the frequency divider, the adder, the rounding circuit, 8
A bit signal processing circuit, an 8-bit D / A converter, and a second
By providing the low pass filter and the output terminal of A / A, which has a 1-bit resolution higher than the number of bits to be transferred,
After the video signal is quantized by the D converter, it is added with a signal having an amplitude of 1 LSB at a half cycle of the quantized clock, and then the LSB is truncated and transferred, and the D / A converter converts the video signal into a video signal. To provide a digital video signal processing circuit capable of transferring with a resolution one bit larger than the number of bits to be pseudo transferred by attenuating a half component of the quantized clock by a second low-pass filter after returning. You can

Although the rounding circuit 17 is provided for the purpose of explanation in this embodiment, it merely operates to cut off the least significant bit, and it is not necessary to provide it as a circuit and the adders 16 and 8 are simply provided. Bit signal processing circuit 1
With 8 connections, only the least significant bit may be unconnected.

[0015]

As described above, according to the present invention, an A / D converter that converts an input video signal into a digital signal in synchronization with a clock, a frequency divider that divides the clock by two, and an A / D converter. Digital adder for adding output and frequency divider output, means for truncating and transferring the least significant bit of the digital adder, D / A converter for converting digital signal to video signal, and D / A converter output By providing a filter that removes the frequency component of the frequency divider output from the A / D converter, which has a 1-bit resolution higher than the number of bits to be transferred, after quantizing the video signal, 1/2 of the quantized clock is obtained. 1 in the cycle
After adding the signal having the amplitude of LSB, truncating the LSB and transferring it, and returning to the video signal by the D / A converter,
By attenuating the 1/2 component of the quantized clock by the low-pass filter, it is possible to realize an excellent digital video signal processing circuit capable of transferring with a resolution one bit higher than the number of bits to be transferred in a pseudo manner.

[Brief description of drawings]

FIG. 1 is a block diagram of a digital video signal processing circuit according to an embodiment of the present invention.

FIG. 2 is a waveform diagram for explaining the operation of the digital video signal processing circuit according to the embodiment of the present invention.

FIG. 3 is a block diagram of a conventional digital video signal processing circuit.

[Explanation of symbols]

 11 Input Terminal 12 First Low-Pass Filter 13 9-bit A / D Converter 14 Oscillator 15 Frequency Divider 16 Adder 17 Rounding Circuit 18 8-bit Signal Processing Circuit 19 8-bit D / A Converter 20 Second Low-pass Filter 21 Output terminal

Claims (1)

[Claims] 1. An A / D converter for converting an input video signal into a digital signal in synchronism with a clock;
A frequency divider, a digital adder for adding the A / D converter output and the frequency divider output, means for truncating and transferring the least significant bit of the digital adder, and a digital signal for a video signal A digital video signal processing circuit, comprising: a D / A converter for converting to D.A.