JPH05189220A - Generation device for software data structure program - Google Patents

Abstract

PURPOSE:To identify whether an accurate memory boundary is taken as to physical data structure in the generation of the data structure program of software. CONSTITUTION:An interactive management control part 3 receiving a request and data input from an input/output device 1, starting respective corresponding parts and outputting a processing result, a data design editor 8 provided with a graphic symbol and a table, which regulate the order of addresses as editing means, a design editor control part 5 for controlling the editor and a design information check part 4 checking whether design information on the data structure of an editing result is accurate or not are provided. The data structure design document of the design result is managed in a design document management part 6, the data structure design document is inputted and analyzed so as to generate the data structure program.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a software data structure program creating apparatus. In recent years, the sophistication of information and telecommunications equipment has brought about the increase in the scale and complexity of software to realize it. Along with this, the work of designing and programming data structures has also increased. Therefore, it is desired to develop an apparatus that supports a series of operations for designing a data structure of software to be developed and creating a data structure program on a computer.

[0002]

2. Description of the Related Art In the conventional software design and programming work, a design document is created by a word processor or handwriting, a program is created by using a text editor on a computer while referring to the design document, and an execution object is executed by a language compiler. The method of generating is common.

CASE (Computer Aided Soft-ware E), which is a technique for performing software development work on a computer with the recent improvement of CPU performance and sophistication of HMI (Human Machine Interface) technique
ngineering) has been advocated, and research and development related to this has been actively conducted. Even in the development of software data structures, efforts have been actively made to continuously support design work and programming work by introducing CASE technology.

A device to be developed or a CP in the device
From the standpoint of U, when the data on the memory communicates with an external device or CPU, it is placed on the memory directly after being taken out from the memory or from a secondary medium such as a file. The data is exchanged in the order of the data. In some cases, a certain address range may be put together in a packet and collectively exchanged, but in this case, the order of arrangement in the memory is maintained as it is. That is, in software that handles such data, it is possible to keep the same physical data sequence (address) order on the memory between the device or CPU that is the development target and the device / CPU that opposes it. It is a prerequisite.

More specifically, in the conventional example of FIG. As shown in, one character is defined in the software of a certain device (CPU) to be composed of 2 bytes, and the address is higher in the memory (lower address).
If the 8 bits and the lower 8 bits are sequentially arranged, the software having this data structure is used by another device (C
PU) and execute it. At this time, in another device (CPU), the B.I. If the memory has a function of processing that the lower 8 bits of the address are higher than the character and the lower 8 bits are lower of the character, the software cannot operate in another device (CPU).

In such a case, it is necessary to strictly define what kind of data is associated with each address position. For example, by defining what is in the upper 8 bits and what is in the lower 8 bits, other devices (CP
In U), it is necessary to identify where and what is.

A data structure in which the arrangement order of physical data on a physical memory is important as a data structure is hereinafter referred to as "physical data structure". On the other hand, in the case of software that uses data as a closed function in a device or a CPU that is a development target, it is said that logically, what level has any element regardless of the physical location in memory. The data is structured like this, and only the logical data structure, such as how it can be retrieved and written, is of interest. That is, it does not matter how to internally have the logical structure among the devices (CPUs) having the same configuration. For example, in two communication devices having the same CPU, data representing "year / month / day / time" as a failure occurrence time is internally stored in any physical form if logically specified. It doesn't matter. Further, in a generally known relational database, data is embedded so that it can be treated as logical data by a device (CPU) having the same configuration.

Hereinafter, such a data structure will be referred to as a "logical data structure". When the data structure is classified according to the above description, as shown in FIG. 13, the data structure (represented by S1)
Are classified into "physical data structure" (represented by S2) and "logical data structure (represented by S3).

There are many types of CPUs that are currently in widespread use in the world, and some of the memory management methods have different one-word lengths. Even with the same word length, the upper byte (octet) and the lower byte are used. In some cases, the order of bytes is reversed as mentioned above. Therefore, depending on the programming language, even if the same program is written, the data structure of the intended software may be interpreted in a different meaning (eg, offset position from a certain address is handled differently).

[0010]

SUMMARY OF THE INVENTION Due to the above situation,
It is necessary to create a plurality of different programs for the same design specifications depending on the CPU operating environment, and as a result, it is difficult to associate the programs with the design specifications of the data structure in a one-to-one correspondence. In particular, in software that handles data corresponding to a "physical data structure", this problem causes a situation in which a program that operates without error on one CPU does not operate at all when it is implemented on another CPU. In order to avoid this, it is necessary to review a large amount of design assets and modify the program, and there is a problem that the work and cost are enormous.

The problem of handling the data structure of software due to the difference in the memory management system of the CPU has not been solved by the current technology of CASE described in the above-mentioned prior art.

It is an object of the present invention to provide an apparatus capable of identifying or taking a correct memory boundary for a physical data structure when creating a software data structure program.

[0013]

FIG. 1 is a block diagram of the principle of the present invention, and FIG. 2 is an explanatory diagram of input to a data structure program creating apparatus and output of processing results.

In FIG. 1, reference numeral 1 denotes an input / output device operated by a designer for designing a data structure and creating a corresponding program. Means for inputting requests and information and processing results from the data structure program creating device. And means for outputting (displaying) the information of the editor for creating the program. 2 is a data structure program creating device, 3 is a dialogue management control unit that receives requests and input information from the input / output device 1 and outputs processing results, etc. to manage dialogue, and 4 operates based on the request, A design information check unit for checking whether or not there is an error in the design result of the created data structure, 5 is a design editor control unit for providing a place for designing the data structure in response to a design start request, and 6 is a stored data structure design Design editor control for managing the document 9 and presenting a list of the data structure design documents 9 stored by request, and activating the data structure design document 9 that has been requested to be modified as a data structure design editor 8. A design document management unit having a function of notifying the unit 5, a data structure that is activated upon request to generate a data structure program The program generation unit 8 is a data structure design editor which is activated by the design editor control unit 5 and has graphic symbols and tables for defining the order of addresses as editing means and edits the input design specifications. Then, the graphic symbols for representing the physical data structure and the logical data structure are separately stored in advance,
In the data structure design document 9 created as a result of designing using this, these two data structures are held separately.

Reference numeral 9 is a created data structure design document, and 10 is a data structure program generated by the data structure program generation unit 7. In addition, 8-9 is DA
It is stored in a secondary medium such as SD (Direct Access Storage Device).

In the present invention, the device (C
By specifying the PU) and the development language, it is checked whether the corresponding design has the correct memory boundary that matches the memory management method of the corresponding device (CPU), and notifies that an error is detected.

[0017]

The operation of FIG. 1 will be described with reference to FIG. 1 to 7 of FIG. 2 are the same as the respective parts of FIG. 1, and the respective parts of 8 to 10 of FIG. 1 are omitted in FIG. R1 in FIG.
~ R6 is a request input from the input / output device 1,
I1 represents input information from the input / output device 1, and A1 to A4
Represents a processing result (Answer) output from the data structure program creation device 2.

Data structure design request R1 from the input / output device 1
When (Fig. 2) occurs, the dialogue management control unit 3 activates the design document management unit 6. The design document management unit 6 outputs the document list A1 (FIG. 2) from the data structure design document 9 including the data structure design document group created so far and displays it on the display unit of the input / output device 1. To modify a document that has been created in the past,
When a corresponding document is selected by the input / output device 1, a document update request R2 (Fig. 2) is generated, and when a new data structure is designed, a new document creation request R3
(Fig. 2) occurs.

On the other hand, the dialog management design unit 3 activates the data structure design editor 8 via the design editor control unit 5 and presents the design editor A2 (FIG. 2) to the input / output device 1. At this time, the physical data structure and the logical data structure are handled separately, and graphic symbols for expressing each are output and displayed on the input / output device 1.

On the other hand, the data structure design specification information I1 (FIG. 2) which is the design content is input from the input / output device 1 via the data structure design editor 8. Document input request R5 (Fig. 2) at the stage when this specification information is input
Alternatively, when the document check request R4 (FIG. 2) is issued, the design information check unit 4 checks the physical data structure for any request, and if there is a contradiction, a check result A3 (FIG. 2) to that effect. Is output to the input / output device 1. If there is no contradiction and the request at the time of completion of input is the document storage request R5 (FIG. 2), it is stored in the data structure design document 9 via the design document management unit 6 and the design editor control unit 5. A document list including the stored documents is presented to the input / output device 1 upon request.

On the other hand, the data structure program generation request R6
When (FIG. 2) is input in the form of selecting a document to be generated from the document list A1, it is supplied to the dialogue management control unit 3. On the other hand, the dialogue management control unit 3 generates the data structure program 10 via the data structure program generation unit 7, and the generated result is presented to the input / output device 1 as the data structure program list A4 if necessary.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 3 is a block diagram of an embodiment including a design information check unit, which is an essential part of the present invention, and related units, FIG. 4 is a diagram showing a logical structure of a memory management knowledge base, and FIG. It is an example of the types of design parts to be handled and their relationship.

In the configuration of FIG. 3, each part represented by reference numerals 1 to 4, 6, 8 and 9 is the same as the same reference symbol in the principle configuration shown in FIG. 1, and the design information check is performed in the configuration of this embodiment. The internal structure of the section 4 is shown in detail.

The designer requests via the input / output device 1 composed of a keyboard, a display, etc., a document storage request R5 upon completion of specification input together with CPU type information, or a document check request for a previously stored data structure design document. When R4 is generated, the design information check unit 4 is activated by the data structure design editor 8 in response to the document storage request R5 and the created design information check is started. Further, the design document management unit 6 is activated in response to the document check request R4, and the data structure design document already stored (see FIG. 1).
9), the design information check will be started collectively.

In the design information check unit 4, the input specification analysis unit 40 uses a physical data structure (the storage location of data is strictly defined by a physical address) and a logical data structure (the storage location is logically defined). Exists on the memory (memory area used by the data structure design editor) via the data structure design editor (8 in FIG. 1) in order to identify the design parts including the specified data) and the relation between them. The input specification information is analyzed and the design specifications of the physical data structure are extracted.

When the physical data structure is extracted as a result of this analysis, the knowledge base reference unit 41 is driven, and the memory management knowledge relating to the CPU type input at the time of a check request is fetched from the memory management knowledge base 44. Then, the extracted memory management knowledge and the design specifications of the physical data structure are supplied to the contradiction detection unit 42. The contradiction detection unit 42 detects a contradiction (not satisfying the specifications defined by the memory management knowledge) by comparing the two. If there is a contradiction, the contradiction result notification unit 43 notifies that fact, and if there is no contradiction, the check request is the document storage request R5.
In the case of, the control is transferred to the design document management unit 6 and stored in the data structure design document (9 in FIG. 1). On the other hand, when the check request is the document check request R4, the control is transferred to the dialogue management control unit 3 and the response to the input / output device 1 is performed.

FIG. 4 shows the logical structure of the knowledge data relating to memory management held in the memory management knowledge base 44 used by the design information check unit 4 described above. CPU type (P
1) is defined for each word length (represented by P2), address order information within the word (represented by P3), and boundary condition information (represented by P4) for a type depending on the programming language. As a result, the design information check unit 4 can identify whether or not the contents of the input specifications include those inconsistent with the knowledge of the type of CPU.

FIG. 5 shows an example of the configuration of design parts handled in the data structure design editor 8 and their relation. 5A shows an example of the configuration, and FIG. 5B shows the relationship of each design component.

The relationship among the design parts (“table outline”, “structure outline”, “data structure”, etc.) shown in (a) is
Design part A and design part B shown in (b) and represented by a square frame
The meaning of the relation between them is expressed by the type of line segment that connects the two, and it is possible to distinguish whether or not there are a plurality of design parts in one design part entity.

In (b), is one design part A and one
A relationship in which one design part B is connected is a relationship in which one design part A and one or more design parts B are connected,
Represents a relation in which the design component A is connected to zero or one design component B, and represents a relation in which one design component A is connected to zero or one or more design components B.

The relationship between the design parts shown in (a) will be described with reference to the design parts and attribute explanatory diagrams handled in the data structure design editor 8 shown in FIGS. Note that FIG.
In FIG. 8, the “:” mark in the attribute column indicates the meaning of the attribute after that, and the “*” mark or numerical value immediately after the attribute name indicates that the attribute exists more than once for one part. , Or its number.

Reference numeral 50 is a table outline as a design part showing the specifications of the table on the assumption that an area on the memory or the secondary medium is acquired, and FIG. 6 is an explanatory view (1) of the design part and attributes. As the attributes, data number (No.) data name, type, record length, number of records,
It is equipped with the overall size, table outline (purpose of table, etc.), and access method.

Reference numeral 51 is a structural outline as a design part showing the specifications of the data dynamically acquired on the memory classified into the frame format of the communication message between CPUs and the communication means between tasks. As shown in FIG. 6, the attributes include a structure name, type, record length, structure outline (type of frame to be used, communication means, etc.), and access method.

Reference numeral 52 is a design component representing a data structure showing a hierarchical structure between elements in the data and the relationship between them.
As shown in the explanatory diagram (part 2) of the design parts and attributes, the data frame, the component, the size information, and the structure tag name are provided as attributes. Reference numeral 53 is a design component representing an address table for which the address width is to be physically determined like the physical data structure (S2), and is defined in detail in units of address (1 byte or n byte offset) as shown in FIG. It has a row field (consisting of 1 byte and called a tuple) for doing each row, and each row has an address number, a tuple element, a tuple element type, content or meaning as an attribute.

Reference numeral 54 is a design part representing a structure table corresponding to the logical data structure (S3), and one is assigned to each logical component element of the data structure 52. As shown in the explanatory diagram (3) of the design parts and attributes of FIG. 8, each structure table has a row column for detailing the element, and each row has an element number, a tuple element, a tuple element type, as an attribute. Consists of content or meaning. Reference numeral 55 is a design component representing a bit configuration for explaining the meaning of a bit string to be formed in each row (tuple) of the address table 53, and has a bit number and a meaning of each bit as attributes as shown in FIG. Reference numeral 56 is a design component that defines the range of value ranges that the tuple elements in the address table 53 and the structure table 54 can take, or its value and meaning. As shown in FIG. 8, the element name and value (range) are attributes. ， Provide meaning.

As described above, the address table 53 of FIG.
With the structure table 54, the physical data structure S2 and the logical data structure S3 are distinguished on the editor and provided as design parts. This makes it possible to accurately determine the difference in the data structure depending on the memory management method depending on the CPU type. Specifications for associating with addresses can be held inside the data structure design document 9 (FIG. 1) created as a result of information input from the input / output device by the designer.

FIG. 9 shows an embodiment of the data structure design editor (8 in FIG. 1). Reference numerals 50 to 56 in the figure are design components corresponding to the respective numbers in FIG. 5 and FIGS. 6 to 8. FIG. 9 shows the state displayed on the output screen of the input / output device by the operation of the data structure design editor. For each of these pre-arranged design parts, the designer has input means (keyboard, mouse) of the input / output device. , Tablets, etc.) to input or select letters and numbers. For example, table summary 50
For, enter the attribute values of each item “Data No.”, “Data name”, “Type”, etc., and set data structure 52, address table 53, structure table 54, bit structure 5
5. The specification of the data structure is input by selecting a design component required for design input from the range definition 56 and arranging it at an appropriate position.

FIG. 10 shows a specific example of the knowledge base of memory management information (corresponding to 44 in FIG. 3). The knowledge base of the memory management information has the logical configuration shown in FIG. 4, and in the case of FIG. 10, CPUα and CPUβ are examples registered in the knowledge base. To explain the contents, the word length P1 of the CPU α is 16 bits, the CPU β is 32 bits, and the address P2 in the word is arranged in order such that the CPU α continues from the higher order to the lower order. On the other hand, the CPU β means that the CPUs are arranged in order from the lower order to the higher order. Further, as type boundary condition information (boundary), in the CPU α, character type, integer type, short integer type, and unsigned short integer type are 1 byte (8 bits), 2 bytes (16 bits), 2 bytes, and 2 bytes, respectively. Indicates the length. When the boundary condition is set in this way, if a boundary between one type of data and another type of data occurs in the middle of a word, the next type must fit within the rest of the word Is rounded up and the next type is assigned from the beginning of the next word.

That is, when the word length is 16 bits and one type of data has a length of 1 byte, if another type of data adjacent to this has a length of 2 bytes, or if it is divided by 16 bits, the preceding 1 byte The remaining 1 byte (8 bits) is not used, and a word of the next type (2 bytes) is allocated from the beginning of the next word. The CPU α rounds up integer types, short integer types, and unsigned short integer types.

In the case of CPU β, the word length is 32 bits and the character type is 1 byte length, whereas the integer type is 4 bytes length, and the boundary condition is rounded up by 4. In this case, if another type is followed by an integer type, it is assigned to the next first word, which is divided in units of 4 bytes.

When address allocation that does not match the boundary condition is performed on the physical data structure of the software based on the knowledge base of the memory management information shown in FIG. 10, the contradiction detection unit of the design information check unit 4 of FIG. When the contradiction is detected by 42, the contradiction result notifying unit 43 generates a check result notification A3 indicating that, and outputs the check result notification A3 to the input / output device 1 to notify the designer so that the correction can be performed.

FIG. 11 shows an example of the design based on the address table. 11A. Is an example of an incorrect address table,
B. Is an example with a correct address table. A. in the case of,
The structure name is "Call frame" and each address is 0X00-0
Element names, English symbols, and meanings are defined in X03, respectively. A. In the case of, it is considered to handle "dial No." as one logical name, but it is detected by the contradiction detection unit (42 in FIG. 3) that rounding up is performed due to contradiction of boundary conditions. As a result, the check result notification A3 is sent via the dialogue management designing unit 3, for example,
The message “The dialed number is rounded up as a boundary.” Is output and presented to the input / output device 1. In response to this presentation, the state in which the designer has input the correct specifications from the input / output device 1 satisfying the boundary conditions is shown in FIG.
Shown in. B. Then, as the dial number, "Dial No.
"1" and "Dial No. 2" are entered and the contradiction is resolved.

[0043]

As described above, according to the present invention, an error in software that handles data of a physical data structure can be found in the initial stage of software design, and therefore, as in the prior art, it is detected in a later step and goes back to an error. It is possible to significantly reduce the man-hours and time as compared with the case of detecting and correcting. Further, it is possible to prevent in advance the occurrence of an error due to the difference in the handling of the software data structure due to the difference in the CPU memory management method.

[Brief description of drawings]

FIG. 1 is a principle configuration diagram of the present invention.

FIG. 2 is an explanatory diagram of input to a data structure program creation device and output of a processing result.

FIG. 3 is a configuration diagram of an embodiment including each unit related to a design information check unit which is a main part of the present invention.

FIG. 4 is a diagram showing a logical configuration of a memory management knowledge base.

FIG. 5 shows types of design parts handled in the editor and examples of their relationships.

FIG. 6 is an explanatory diagram (1) of design components and attributes.

FIG. 7 is an explanatory diagram (2) of design parts and attributes.

FIG. 8 is an explanatory diagram (part 3) of design parts and attributes.

FIG. 9 is an example of a data structure design editor.

FIG. 10 is a specific example of a knowledge base of memory management information.

FIG. 11 is an example of a design based on an address table.

FIG. 12 is an explanatory diagram of a conventional example.

FIG. 13 is a diagram showing classification of data structures.

[Explanation of symbols]

 1 Input / output device 2 Data structure program creation device 3 Dialog management control unit 4 Design information check unit 5 Design editor control unit 6 Design document management unit 7 Data structure program generation unit 8 Data structure design editor 9 Data structure design document 10 Data structure program

Claims (2)

[Claims] 1. A data structure program creation device for supporting a software data structure design and program creation work, receiving a request and a data input from an input / output device, activating corresponding parts, and outputting a processing result. A dialogue management control unit to perform, a data structure design editor having graphic symbols and tables that define the order of addresses as an editing unit, a design editor control unit for controlling the editor, and design information related to the data structure of the edited result. It is provided with a design information check unit for checking whether it is correct, a design document management unit for managing a data structure design document of a design result, and a data structure program generation unit for inputting and analyzing a correct data structure design document and generating a data structure program. Data structure of software characterized by Program generator. 2. The CPU according to claim 1, wherein the design information check unit is a CPU on which software to be developed operates.
It has a knowledge base for memory management information that defines the word length according to the type of, the address order information within the word, and the boundary condition information for the type that depends on the programming language.
An apparatus for creating a data structure program of software, characterized in that the knowledge base is compared with information on a data structure in the data structure design document, and if the design is inconsistent, the contents are notified to an input / output device.