JPH05181433A - Driving system of display device - Google Patents

Driving system of display device

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Publication number
JPH05181433A
JPH05181433A JP35802191A JP35802191A JPH05181433A JP H05181433 A JPH05181433 A JP H05181433A JP 35802191 A JP35802191 A JP 35802191A JP 35802191 A JP35802191 A JP 35802191A JP H05181433 A JPH05181433 A JP H05181433A
Authority
JP
Japan
Prior art keywords
row
selection
potential
column electrode
drive voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP35802191A
Other languages
Japanese (ja)
Inventor
Heihachiro Ebihara
平八郎 海老原
Mitsumasa Miyabe
光正 宮部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Citizen Watch Co Ltd
Original Assignee
Citizen Watch Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Citizen Watch Co Ltd filed Critical Citizen Watch Co Ltd
Priority to JP35802191A priority Critical patent/JPH05181433A/en
Publication of JPH05181433A publication Critical patent/JPH05181433A/en
Pending legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

PURPOSE:To suppress the generation of crosstalk and a decrease in contrast by executing in-row inversion of the polarity of a driving voltage, applied to liquid crystal, and making both the field to be inverted row by row, and the field not to be inverted together, coexist. CONSTITUTION:The fields T1-Tm (T field) where in-row inversion is performed in each selection period and row-by-row inversion (inversion in the polarity of operation select signal on every change in row) is not performed and the fields t1-tm (t field) where the row-by-row inversion is performed are arranged alternately. In this case, a signal when at a high potential is a signal indicating the row-by-row inversion. Consequently, P1a-P1c are equal in the frequency of variation in column electrode driving voltage in nonselection periods on the average throughout the T fields and (t) fields and the effective value in the nonselection periods is unchanged without reference to a display pattern. Further, the influence of parasitic resistance is reducible.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は複数の列電極と複数の行
電極を有する液晶表示パネルと、前記行電極に走査選択
信号を印加する行電極駆動回路と、前記列電極に表示デ
ータに基づいた列電極駆動信号を印加する列電極駆動回
路と、駆動電源回路と、制御回路で構成され、各表示画
素は選択期間と非選択期間を通して各画素の両端に印加
される駆動電圧の実効値に関係して駆動され、かつ前記
選択期間に各画素の両端に印加される駆動電圧の実効値
の差によって明暗の表示状態を表示する表示装置の駆動
回路に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display panel having a plurality of column electrodes and a plurality of row electrodes, a row electrode drive circuit for applying a scanning selection signal to the row electrodes, and a display data for the column electrodes. A column electrode drive circuit that applies a column electrode drive signal, a drive power supply circuit, and a control circuit.Each display pixel has an effective value of a drive voltage applied to both ends of each pixel through a selection period and a non-selection period. The present invention relates to a drive circuit of a display device that is driven in a related manner and that displays a bright and dark display state by a difference in effective value of a drive voltage applied to both ends of each pixel during the selection period.

【0002】[0002]

【従来の技術】図2は一般的な液晶表示装置の概念構成
図であり、複数の行電極X1 、X2 、・・・Xmは行電
極駆動回路203に接続され、複数の列電極Y1 、Y2
、・・・Ynは列電極駆動回路202に接続され、該
列電極駆動回路202と前記行電極駆動回路203は制
御回路201と駆動電源回路204にそれぞれ接続され
る。ここでmは偶数であるものとする。また表示データ
源は前記制御回路201に含めて考えるものとする。
2. Description of the Related Art FIG. 2 is a conceptual configuration diagram of a general liquid crystal display device. A plurality of row electrodes X1, X2, ... Xm are connected to a row electrode drive circuit 203, and a plurality of column electrodes Y1, Y2.
, Yn are connected to a column electrode drive circuit 202, and the column electrode drive circuit 202 and the row electrode drive circuit 203 are connected to a control circuit 201 and a drive power supply circuit 204, respectively. Here, it is assumed that m is an even number. The display data source is included in the control circuit 201.

【0003】図3は図2に於ける前記列電極駆動回路2
02、行電極駆動電圧回路203をより具体的に示した
ブロック図であり、前記駆動電源回路204は図示して
いない。図3に於いて前記列電極駆動回路202は前記
制御回路201からクロック信号を含む制御信号と表示
データを受け取り、該表示データを記憶する記憶回路3
01と、前記制御回路201からの制御信号によって、
行電極走査の1選択期間、前記記憶回路301の出力を
保持する保持回路302と、前記制御回路201からの
極性反転信号に基づいて前記データ保持回路302の出
力を反転させる電圧切替回路303と該電圧切替回路3
03の出力に基づいて表示パネル307の各列電極に与
える列電極駆動電圧を発生する出力回路304によって
構成され、前記行電極駆動回路203は前記制御回路2
01からクロック信号を含む制御信号を受け取り、行電
極走査選択信号を作成する走査信号発生回路305と、
該走査信号発生回路305の出力信号と前記制御回路2
01からの制御信号によって前記表示パネル307の各
行電極に与える行電極駆動電圧を発生する出力回路30
6によって構成される。
FIG. 3 shows the column electrode drive circuit 2 shown in FIG.
02 is a block diagram showing the row electrode drive voltage circuit 203 more specifically, and the drive power supply circuit 204 is not shown. In FIG. 3, the column electrode drive circuit 202 receives a control signal including a clock signal and display data from the control circuit 201 and stores the display data.
01 and a control signal from the control circuit 201,
A holding circuit 302 that holds the output of the memory circuit 301 for one selection period of row electrode scanning, a voltage switching circuit 303 that inverts the output of the data holding circuit 302 based on a polarity inversion signal from the control circuit 201, and the holding circuit 302. Voltage switching circuit 3
The output circuit 304 generates a column electrode drive voltage to be applied to each column electrode of the display panel 307 on the basis of the output of the display panel 307.
A scan signal generation circuit 305 which receives a control signal including a clock signal from 01 and creates a row electrode scan selection signal;
The output signal of the scanning signal generation circuit 305 and the control circuit 2
An output circuit 30 for generating a row electrode drive voltage to be applied to each row electrode of the display panel 307 according to a control signal from 01.
It is composed of 6.

【0004】図4(a)、(b)は図2、図3に示した
液晶表示装置を駆動する場合の前記行電極、列電極に印
加する電圧の代表的な設定方法を示した図であり、図4
(a)はV1 乃至V6 の6レベルの電圧を用いる方式で
あり、図4(b)は±Vc、±Vsの4レベルの電圧を
用いる方式である。本発明はいずれの方式にも対応する
ものであるが、説明は図4(b)の方式を用いた場合に
ついて行う。
FIGS. 4 (a) and 4 (b) are diagrams showing a typical setting method of voltages applied to the row electrodes and column electrodes when driving the liquid crystal display device shown in FIGS. Yes, Figure 4
(A) is a system using 6 level voltages of V1 to V6, and FIG. 4 (b) is a system using 4 level voltages of ± Vc and ± Vs. The present invention is compatible with any of the methods, but the description will be given for the case of using the method of FIG.

【0005】図5は、図4(b)の駆動方式を採用した
場合のより詳細な駆動波形を示したもので、図5に於い
て期間T1 、t1 は第1番目の行電極X1 を選択する期
間であり、期間T2 、t2 は第2番目の行電極X2 を選
択する期間であり、以下同様にして期間Tm、tmは第
m番目の行電極Xmを選択する期間である。期間T1乃
至Tm、期間t1 乃至tmをそれぞれ1フィールドと定
義すれば、前記第1番目の行電極X1 の各画素、P11乃
至P1nは、1フィールド内に於いて期間T1 もしくはt
1 の期間のみ選択され、その他の期間は非選択期間と言
う事になる。
FIG. 5 shows more detailed driving waveforms when the driving method of FIG. 4B is adopted. In FIG. 5, the first row electrode X1 is selected during the periods T1 and t1. The periods T2 and t2 are periods for selecting the second row electrode X2, and the periods Tm and tm are similarly periods for selecting the mth row electrode Xm. If each of the periods T1 to Tm and the periods t1 to tm is defined as one field, each pixel of the first row electrode X1 and P11 to P1n have the period T1 or t within one field.
Only one period is selected, and other periods are called non-selected periods.

【0006】非選択期間に行電極に印加される電位を基
準電位(0V)と定義した時、期間T1 に於いて前記行
電極X1 には+Vcが印加され、その他の行電極には0
Vが印加される。期間T2 に於いては前記行電極X2 に
+Vcが印加され、その他の行電極には0Vが印加され
る。以下同様にして期間Tmには前記行電極Xmに+V
cが印加され、その他の行電極には0Vが印加される。
次のフィールドに移ると期間t1 には前記行電極X1 に
−Vcが印加され、その他の行電極には0Vが印加さ
れ、期間t2 に於いては前記行電極X2 に−Vcが印加
され、その他の行電極には0Vが印加され、以下同様に
して期間tmには前記行電極Xmに−Vcが印加され、
その他の行電極には0Vが印加される。この方式はフィ
ールド反転方式と呼ばれる。図5に於いて記号Fはフィ
ールド反転信号を示す。
When the potential applied to the row electrodes during the non-selection period is defined as the reference potential (0V), + Vc is applied to the row electrode X1 and 0 to the other row electrodes during the period T1.
V is applied. In the period T2, + Vc is applied to the row electrode X2, and 0V is applied to the other row electrodes. Similarly, + V is applied to the row electrode Xm during the period Tm.
c is applied, and 0V is applied to the other row electrodes.
Moving to the next field, -Vc is applied to the row electrode X1 in the period t1, 0V is applied to the other row electrodes, and -Vc is applied to the row electrode X2 in the period t2. 0V is applied to the row electrode of, and similarly, −Vc is applied to the row electrode Xm during the period tm.
0V is applied to the other row electrodes. This method is called a field inversion method. In FIG. 5, the symbol F indicates a field inversion signal.

【0007】一方列電極に関しては、3つの列電極Y
a、Yb、Ycについて考える。また液晶は高い印加電
圧により明状態を表示する型のものであるとする。該列
電極Ya上の全ての画素の表示が明状態とし、前記列電
極Yb上の全ての画素の表示が暗状態とし、前記列電極
Yc上の画素の表示は交互に明状態と暗状態を行うもの
とすると、前記列電極Yaには前記期間T1 乃至Tmの
全ての期間に渡って−Vsが印加され、前記期間t1 乃
至tmの全ての期間に渡って+Vsが印加される。前記
列電極Ybには前記期間T1 乃至Tmの全ての期間に渡
って+Vsが印加され、前記期間t1 乃至tmの全ての
期間に渡って−Vsが印加される。また前記列電極Yc
には前記期間T1 、T3 、・・・Tmー1とt2 、t4 、
・・・tmには−Vsが印加され、前記期間T2 、T4
、・・・Tmとt1 、t3 、・・・tm-1には+Vs
が印加される。
On the other hand, regarding the column electrodes, three column electrodes Y
Consider a, Yb, and Yc. Further, the liquid crystal is of a type that displays a bright state by a high applied voltage. The display of all pixels on the column electrode Ya is in a bright state, the display of all pixels on the column electrode Yb is in a dark state, and the display of pixels on the column electrode Yc is alternately in a bright state and a dark state. If it is performed, -Vs is applied to the column electrode Ya over the entire period of T1 to Tm, and + Vs is applied over the entire period of the period t1 to tm. + Vs is applied to the column electrode Yb for all the periods T1 to Tm, and -Vs is applied for all the periods t1 to tm. In addition, the column electrode Yc
, The periods T1, T3, ... Tm-1 and t2, t4,
...- Vs is applied to tm, and the periods T2, T4
, ... + Vs for Tm and t1, t3, ... tm-1
Is applied.

【0008】すなわち各列電極には明状態の表示を行う
選択期間に於いては液晶の両端に印加される駆動電圧の
絶対値が|Vc+Vs|となるような列電極駆動電圧
(行電極駆動電圧が+Vcの場合は−Vs、行電極駆動
電圧が−Vcの場合は+Vs)が印加され、暗状態の表
示を行う選択期間に於いては液晶の両端に印加される駆
動電圧の絶対値が|VC−Vs|となるような列電極駆
動電圧(行電極駆動電圧が+Vcの場合は+Vs、行電
極駆動電圧が−Vcの場合は−Vs)が印加される。
That is, the column electrode drive voltage (row electrode drive voltage) such that the absolute value of the drive voltage applied to both ends of the liquid crystal becomes | Vc + Vs | during the selection period in which a bright state is displayed on each column electrode. Is + Vc, + Vs is applied when the row electrode drive voltage is -Vc, and the absolute value of the drive voltage applied to both ends of the liquid crystal is | A column electrode drive voltage (+ Vs when the row electrode drive voltage is + Vc, −Vs when the row electrode drive voltage is −Vc) that is VC−Vs | is applied.

【0009】この時前記第1行目の行電極X1 と前記列
電極Yaとの交点に形成される画素P1a、前記第1行目
の行電極X1 と前記列電極Ybとの交点に形成される画
素P1b、前記第1行目の行電極X1 と前記列電極Ycと
の交点に形成される画素P1cのそれぞれの両端に印加さ
れる駆動電圧は図5に示す如くとなる。該画素P1a、P
1cに印加される駆動電圧の絶対値は選択期間に於いては
|Vs+Vs|、非選択期間に於いては|Vs|とな
り、1フィールドに渡っての実効電圧はともに数1で示
される値となって、該画素P1a、P1cはともに前記明状
態を呈する。また前記画素P1bに印加される駆動電圧の
絶対値は選択期間に於いては|Vs−Vs|、非選択期
間に於いては|Vs|となり、1フィールドに渡っての
実効電圧は数2で示される値となって、該画素P1bは前
記暗状態を呈する。
At this time, the pixel P1a is formed at the intersection of the first row electrode X1 and the column electrode Ya, and the pixel P1a is formed at the intersection of the first row electrode X1 and the column electrode Yb. The driving voltage applied to both ends of the pixel P1b and the pixel P1c formed at the intersection of the row electrode X1 of the first row and the column electrode Yc is as shown in FIG. The pixels P1a, P
The absolute value of the drive voltage applied to 1c is | Vs + Vs | during the selection period and | Vs | during the non-selection period, and the effective voltage over one field is the value shown in Formula 1. Then, both the pixels P1a and P1c exhibit the bright state. The absolute value of the driving voltage applied to the pixel P1b is | Vs-Vs | in the selection period and | Vs | in the non-selection period, and the effective voltage over one field is several 2. The pixel P1b has the indicated value and exhibits the dark state.

【数1】 [Equation 1]

【数2】 [Equation 2]

【0010】数1、数2に於いて(Vc±Vs)2 /m
の項は選択期間に関する項であり、(m−1)・Vs2
/mの項は非選択期間に関する項である。明状態と暗状
態のコントラストはV1 /V2 の値が大きい方が良くな
る。V1 /V2 は数3で与えられ、その理論的最大値は
数4によって与えられる。
In equations 1 and 2, (Vc ± Vs) 2 / m
Is related to the selection period, and is (m-1) .Vs2
The term / m is related to the non-selection period. The larger the value of V1 / V2, the better the contrast between the bright state and the dark state. V1 / V2 is given by the equation 3, and its theoretical maximum value is given by the equation 4.

【数3】 [Equation 3]

【数4】 [Equation 4]

【0011】以上はあくまでも理想状態での説明であっ
て、実際には各波形に歪が生ずるため前記画素P1aとP
1cは同一の表示状態とはならない。この現象は図6に示
す波形図で説明される場合が多い。すなわち各部の波形
が、その状態を変化する度に歪みを生ずるものとする
と、前記画素P1aとP1cのそれぞれの両端に印加される
駆動電圧の実効値は、非選択期間に於ける列電極駆動電
圧の状態変化の回数の差によって異なった値となってし
まうため、前記画素P1aとP1cは同一の表示状態とはな
らず、これがクロストークの原因の1つとされている。
つまり図6に於いて前記数1の非選択期間の項は、前記
画素P1aの方が画素P1cよりも大きいから、前記画素P
1aの方がと前記画素P1cよりもより明るく見える事にな
り、クロストークが発生する。
The above description is for an ideal state only. In reality, since distortion occurs in each waveform, the pixels P1a and P1
1c does not have the same display state. This phenomenon is often explained by the waveform diagram shown in FIG. That is, assuming that the waveform of each part is distorted each time the state changes, the effective value of the drive voltage applied to both ends of each of the pixels P1a and P1c is the column electrode drive voltage in the non-selected period. Since the pixels P1a and P1c do not have the same display state because they have different values depending on the difference in the number of state changes, the crosstalk is one of the causes.
That is, in FIG. 6, the term of the non-selection period of the equation 1 is larger in the pixel P1a than in the pixel P1c.
1a looks brighter than the pixel P1c, and crosstalk occurs.

【0012】この点に関する技術として例えば特開平3
−130797号公報(以下引例1とする)、特開平2
−6921号公報(以下引例2とする)に記載の技術が
上げられる。前者は選択期間近傍の波形歪みの影響に着
眼し、「走査パルスの立ち上がり時及び立ち下がり時の
直前の所定期間、各データ信号の電圧レベルを黒レベル
及び白レベルの一方に設定し、前記立ち上がり時及び立
ち下がり時の直後の所定期間電圧レベルを前記黒レベル
及び白レベルの他方に設定する」ものであるが、非選択
期間に於ける波形歪みの影響も結果的に改善されるので
従来技術とする。また後者の技術は「1走査期間毎に、
液晶セルの印加電圧が0Vとなる期間を設ける」もので
ある。
As a technique related to this point, for example, Japanese Patent Laid-Open No.
No. 130797 (hereinafter referred to as Reference 1)
The technique described in Japanese Patent No. 6921 (hereinafter referred to as Reference 2) can be cited. The former focused on the influence of waveform distortion in the vicinity of the selection period, and said, "The voltage level of each data signal is set to one of a black level and a white level for a predetermined period immediately before the rising and falling of the scanning pulse, and the rising The voltage level is set to the other of the black level and the white level for a predetermined period immediately after the rising edge and the falling edge. "However, since the effect of the waveform distortion in the non-selected period is improved as a result, the prior art And In addition, the latter technology is "each scanning period,
The period during which the voltage applied to the liquid crystal cell is 0 V is provided. "

【0013】図7は前記引例1の技術を図5に示した駆
動方式に適用したものであって、記号Fはフィールド反
転信号であり、また記号M、Nは高電位(論理1とす
る)の時、表示データによらず列電極駆動電圧を特定の
電位に固定する信号である。図7の場合、信号Mは走査
選択信号の立ち上がり時及び立ち下がり時の直前の短時
間論理1となり、信号Nは走査選択信号の立ち上がり時
及び立ち下がり時の直後の短時間論理1となる。記号D
a、Db、Dcはそれぞ列電極Ya、Yb、Ycに表示
されるべき表示データを示し、論理1の時、明状態を表
示し、論理0の時、暗状態を表示するものとする。従っ
て列電極Yaの画素は全て明状態を表示し、列電極Yb
の画素は全て暗状態を表示し、列電極Yc上の画素は行
毎に明状態と暗状態の表示を繰り返す事になる。図7は
走査選択信号の立ち上がり時及び立ち下がり時の直前の
短時間、列電極駆動電圧のレベルを暗表示状態(黒レベ
ル)に設定し、前記立ち上がり時及び立ち下がり時の直
後の短時間、列電極駆動電圧のレベルを明表示状態(白
レベル)に設定した場合であり、更に走査選択信号及
び、列電極駆動電圧(Y)の立ち上がり時及び立ち下が
り時の波形歪みを省略して描いて有る。その結果によれ
ば、各画素の非選択期間に印加される駆動電圧の変化の
回数は、表示データによらずほぼ2m−2回となる事が
分かり、したがってフィールド内に於ける実効電圧の非
選択期間の項は一定となるためクロストークが大幅に減
少する。
FIG. 7 is a diagram in which the technique of the reference 1 is applied to the driving system shown in FIG. 5, the symbol F is a field inversion signal, and the symbols M and N are high potentials (logic 1). At this time, it is a signal that fixes the column electrode drive voltage to a specific potential regardless of the display data. In the case of FIG. 7, the signal M becomes the short-time logic 1 immediately before the rising and falling of the scanning selection signal, and the signal N becomes the short-time logic 1 immediately after the rising and falling of the scanning selection signal. Symbol D
Reference characters a, Db, and Dc represent display data to be displayed on the column electrodes Ya, Yb, and Yc, respectively, and a logic 1 indicates a bright state, and a logic 0 indicates a dark state. Therefore, all the pixels of the column electrode Ya display a bright state, and the column electrode Yb
All the pixels of No. display the dark state, and the pixels on the column electrode Yc repeat the display of the bright state and the dark state for each row. FIG. 7 shows a case where the level of the column electrode drive voltage is set to a dark display state (black level) immediately before the rising and the falling of the scan selection signal, and the short time immediately after the rising and the falling. This is a case where the level of the column electrode drive voltage is set to a bright display state (white level), and the waveform distortion at the time of rising and falling of the scan selection signal and the column electrode drive voltage (Y) is omitted and drawn. There is. The results show that the number of changes in the drive voltage applied to each pixel during the non-selection period is approximately 2 m −2 times, regardless of the display data, and therefore the effective voltage in the field is not changed. Since the term of the selection period is constant, crosstalk is greatly reduced.

【0014】しかしながら図7の従来の実施例に於いて
はクロストークが十分に低減できない場合があり、検討
の結果下記の様な現象によるものと判明した。
However, in the conventional embodiment shown in FIG. 7, there are cases where the crosstalk cannot be sufficiently reduced, and as a result of the investigation, it was found that the following phenomenon occurred.

【0015】液晶の電気的等価モデルは図8によって表
される。図8(a)に於いて、CLは液晶の等価容量で
あり、RLは液晶の等価抵抗である。該液晶は電極に直
接接している訳ではなく、例えば配向膜等を介して電極
に対向している。従ってこれらの膜の等価回路として容
量Cx、Cyが考えられ、寄生抵抗としてrx、ryが
考えられる。今説明を簡単にするためry、Cyを無視
し、図6(b)の等価回路を考えて、この回路にステッ
プ状の入力VIを印加したときに液晶に印加される電圧
VLの応答を考察すると、rx、RLの大きさによりV
Lは図9に示す如く変化する。
The electrically equivalent model of the liquid crystal is represented by FIG. In FIG. 8A, CL is an equivalent capacitance of the liquid crystal and RL is an equivalent resistance of the liquid crystal. The liquid crystal is not in direct contact with the electrodes, but faces the electrodes via, for example, an alignment film. Therefore, capacitors Cx and Cy can be considered as equivalent circuits of these films, and rx and ry can be considered as parasitic resistance. For the sake of simplicity, ry and Cy are ignored, the equivalent circuit of FIG. 6B is considered, and the response of the voltage VL applied to the liquid crystal when the stepwise input VI is applied to this circuit is considered. Then, depending on the size of rx and RL, V
L changes as shown in FIG.

【0016】すなわち図9に於いて、図9(a)に示し
たステップ状の電圧VIを印加すると、 (1)rx=0、RL=∞ではVLはVIそのものとな
る。 (2)rx=∞、RL=∞ではVLはCx、CLの分圧
比で決まる電圧Eまでステップ状に変化した後、その電
圧Eが維持される。 (3)rx=A、RL=∞ではVLは電圧Eまでステッ
プ状に変化した後、rxとCx、CLで決まる時定数に
基づいて上昇する。 (4)rx=∞、RL=BではVLは電圧Eまでステッ
プ状に変化した後、RLとCx、CLで決まる時定数に
基づいて降下する。
That is, in FIG. 9, when the stepwise voltage VI shown in FIG. 9A is applied, (1) VL becomes VI itself when rx = 0 and RL = ∞. (2) When rx = ∞ and RL = ∞, VL is stepwise changed to the voltage E determined by the voltage division ratio of Cx and CL, and then the voltage E is maintained. (3) When rx = A and RL = ∞, VL changes stepwise to the voltage E and then rises based on the time constant determined by rx, Cx, and CL. (4) When rx = ∞ and RL = B, VL changes stepwise to the voltage E and then drops based on the time constant determined by RL, Cx, and CL.

【0017】従って、実際にはrx、RLの値によりV
Lの変化は異なるのであるが、ここでも説明を簡単にす
るため、rx=A、RL=∞の場合を想定して図7に示
したYa、Ycの波形を考察するとその結果は図10に
示す如くとなる。
Therefore, in reality, V depends on the values of rx and RL.
Although the change in L is different, in order to simplify the explanation here as well, when the waveforms of Ya and Yc shown in FIG. 7 are considered assuming rx = A and RL = ∞, the results are shown in FIG. It becomes as shown.

【0018】図10に於いて表示データによらず列電極
駆動電圧を固定する時間が極めて短時間とすれば、Ya
は期間t1 の前縁に於いてステップ状の変化をした後、
ある時定数にしたがって上昇し、十分に時間が経過した
時点ではほぼ+Vsに達する。しかるにYcは選択期間
毎に反転するため、±Vsに達する事無く常に小さな電
圧しか印加されない。従って非選択時に列aの液晶に印
加される実効電圧は列cの液晶に印加される実効電圧よ
りも大きくなり、非選択期間に於ける列電極駆動電圧の
変化回数を同じにしたにも係わらずクロストークが発生
してしまうのである。
In FIG. 10, if the time for fixing the column electrode drive voltage is extremely short regardless of the display data, Ya
After making a stepwise change at the leading edge of period t1,
It rises according to a certain time constant and reaches almost + Vs when a sufficient time has passed. However, since Yc is inverted every selection period, a small voltage is always applied without reaching ± Vs. Therefore, the effective voltage applied to the liquid crystal in the column a during non-selection becomes larger than the effective voltage applied to the liquid crystal in the column c, and the number of changes of the column electrode drive voltage during the non-selection period is the same. Instead, crosstalk occurs.

【0019】[0019]

【発明が解決しようとする課題】そこで本発明が解決し
ようとする第1の課題は、寄生抵抗の影響で液晶駆動電
圧の実効値が表示パターンによって異なる事によりクロ
ストークが発生する現象を軽減する事であり、第2の課
題は第1の課題を解決する為に用いた手段が新たに発生
する問題点を解消する事である。
The first problem to be solved by the present invention is to reduce the phenomenon that crosstalk occurs because the effective value of the liquid crystal drive voltage varies depending on the display pattern due to the effect of parasitic resistance. The second problem is that the means used for solving the first problem solves a new problem.

【0020】[0020]

【課題を解決するための手段】もしYa、Ycの関係が
図11の如くで有れば両者の実効値の差は大幅に縮小さ
れるであろう。この観点から本発明者は先願5に於いて
図12、図13に示す如く、少なくとも各選択期間の一
部に於いて、前記列電極群に印可する前記列電極駆動電
圧の電位を表示データによらず定められた電位に固定す
るとともに、各選択期間内に於いて、液晶に印加する駆
動電圧の極性を反転(行内反転)させる事を提案した。
If the relationship between Ya and Yc is as shown in FIG. 11, the difference between the effective values of the two will be greatly reduced. From this viewpoint, the inventor of the present invention, as shown in FIGS. 12 and 13 in the prior application 5, displays the potential of the column electrode driving voltage applied to the column electrode group at least in a part of each selection period as display data. It was proposed to fix the potential to a fixed potential regardless of the above, and to invert the polarity of the drive voltage applied to the liquid crystal (inversion within a row) within each selection period.

【0021】図12はフィールド反転と行毎反転(行が
変わる毎に操作選択信号の極性を反転させる)と行内反
転を行い、かつ選択期間の前縁に於いて各列電極駆動電
圧を表示データによらず明状態に該当する電位に短時間
固定し、選択期間の後縁に於いて各列電極駆動電圧を表
示データによらず暗状態に該当する電位に短時間固定し
た場合の例示し、図13はフィールド反転と行内反転を
行い、かつ選択期間の後縁に於いて各列電極駆動電圧を
表示データによらず暗状態に該当する電位に短時間固定
した例を示す。
FIG. 12 shows field inversion, row-by-row inversion (the polarity of the operation selection signal is inverted every time the row changes) and in-row inversion, and display data of each column electrode drive voltage at the leading edge of the selection period. An example of a case where the potential corresponding to the bright state is fixed for a short time regardless of the display state, and each column electrode driving voltage is fixed to the potential corresponding to the dark state for a short time at the trailing edge of the selection period, FIG. 13 shows an example in which field inversion and in-row inversion are performed, and each column electrode drive voltage is fixed at a potential corresponding to a dark state for a short time at the trailing edge of the selection period regardless of display data.

【0022】図12、図13に於いては説明の都合上、
列電極駆動電圧の固定時間を長く描いたが、該固定時間
が選択期間に比して十分小さいものとしてYa、Yb、
Ycを書き直すと図14となる。
12 and 13, for convenience of explanation,
Although the fixed time of the column electrode drive voltage is drawn long, it is assumed that the fixed time is sufficiently smaller than the selection period, Ya, Yb,
FIG. 14 is obtained by rewriting Yc.

【0023】図14(a)は図12を書き直したもので
あり、図14(b)は図13を書き直したものである。
寄生抵抗を介しての充放電による波形変形差低減の議論
に於いては、極めて短時間の極性反転は無視しても良い
と言えるから、このような観点に立てば図14(a)に
於いてはフィールド反転の前後を除けばYa、Ybは選
択期間と同じ長さの時間で極性が反転し、Ycは選択期
間の半分の長さの時間で極性が反転していると見る事が
出来る。一方図14(b)に於いてはフィールド反転の
前後を除けばYa、Ybは選択期間の半分の長さの時間
で極性が反転し、Ycは選択期間と同じ長さの時間で極
性が反転していると見る事が出来る。従ってYa、Yb
とYcの関係は図11で示した説明図と同様の結果とな
り、Ya、YbとYcの実効電圧の差は僅かなものとな
り、寄生抵抗の影響によるクロストークは劇的に改善さ
れる。
FIG. 14A is a rewrite of FIG. 12, and FIG. 14B is a rewrite of FIG.
In the discussion of reducing the difference in waveform deformation due to charging / discharging via the parasitic resistance, it can be said that the polarity reversal for a very short time can be neglected. Therefore, from this point of view, FIG. Then, except before and after the field inversion, it can be seen that the polarities of Ya and Yb are inverted in the same length of time as the selection period, and the polarity of Yc is inverted in the half of the selection period. .. On the other hand, in FIG. 14B, except before and after the field inversion, the polarities of Ya and Yb are inverted in half the length of the selection period, and Yc is inverted in the same length of time as the selection period. You can see it while you are doing it. Therefore, Ya, Yb
The relationship between Yc and Yc has the same result as the explanatory diagram shown in FIG. 11, the difference in effective voltage between Ya, Yb and Yc is small, and the crosstalk due to the influence of parasitic resistance is dramatically improved.

【0024】所で図14を子細に検討すると、図14
(a)と図14(b)では前記の如くYa、YbとYc
の関係が逆になっており、列電極駆動電圧の固定操作に
よるスパイクを無視してYa、YbとYcの1フィール
ドあたりの変化回数を見ると、図14(a)ではYa、
YbがYcの半分の変化回数となり、図14(b)では
はYa、YbがYcの倍の変化回数となる事が分かる。
A detailed examination of FIG. 14 shows that FIG.
In FIGS. 14A and 14B, as described above, Ya, Yb, and Yc are used.
14 is reversed, and the spikes due to the fixed operation of the column electrode drive voltage are ignored, and the number of changes per field for Ya, Yb and Yc is
It can be seen that Yb is half the number of changes in Yc, and in FIG. 14B, Ya and Yb are twice the number of changes in Yc.

【0025】すなわち列電極駆動電圧の固定操作を行わ
ず、行毎反転するフィールドと行毎反転しないフィール
ドとを同数組み合わせて1フレームとすると、1フレー
ム内での列電極駆動電圧の変化回数は表示データによら
ず一定となる。
That is, when the column electrode drive voltage is not fixed and the same number of fields that are inverted per row and fields that are not inverted per row are combined into one frame, the number of changes in the column electrode drive voltage within one frame is displayed. It is constant regardless of the data.

【0026】そこで上記課題を解決するために本発明が
用いる第1の手段は、列電極駆動電圧が印加される列電
極群と、走査選択信号に基づく行電極駆動電圧が印加さ
れる行電極群を有する表示装置の駆動方式に於いて、液
晶に印加する駆動電圧の極性を各選択期間内で反転(行
内反転)させるとともに、行毎に駆動電圧の極性を反転
(行毎反転)させるフィールドと行毎反転させないフィ
ールドを混在させる事である。
Therefore, the first means used by the present invention to solve the above-mentioned problems is a column electrode group to which a column electrode drive voltage is applied and a row electrode group to which a row electrode drive voltage based on a scan selection signal is applied. In the driving method of the display device having the above, the polarity of the driving voltage applied to the liquid crystal is reversed (intra-row inversion) within each selection period, and the polarity of the driving voltage is reversed for each row (inversion for each row). It is to mix fields that are not reversed line by line.

【0027】上記課題を解決するために本発明が用いる
第2の手段は、前記第1の手段に加え、少なくとも各選
択期間の前縁に於いて、各列電極に印可する前記列電極
駆動電圧の電位がほぼ安定するまでの期間、前記走査選
択信号の電位を非選択電位とする事である。
The second means used by the present invention to solve the above-mentioned problems is, in addition to the above-mentioned first means, the column electrode drive voltage applied to each column electrode at least at the leading edge of each selection period. That is, the potential of the scan selection signal is set to the non-selection potential until the potential of is almost stable.

【0028】上記課題を解決するために本発明が用いる
第3の手段は、前記第1の手段に加え、少なくとも各選
択期間の後縁に於いて、各列電極に印可する前記列電極
駆動電圧の電位変化が開始するに先だって、前記走査選
択信号の電位を非選択電位とする事である。
A third means used by the present invention to solve the above-mentioned problems is, in addition to the first means, the column electrode drive voltage applied to each column electrode at least at the trailing edge of each selection period. The potential of the scan selection signal is set to the non-selection potential before the potential change of (1) is started.

【0029】上記課題を解決するために本発明が用いる
第4の手段は、前記第1の手段に加え、少なくとも前記
行内反転直後に於いて、各列電極に印可する前記列電極
駆動電圧の電位がほぼ安定するまでの期間、前記走査選
択信号の電位を非選択電位とする事である。
A fourth means used by the present invention for solving the above-mentioned problems is, in addition to the first means, a potential of the column electrode drive voltage applied to each column electrode at least immediately after the in-row inversion. That is, the potential of the scan selection signal is set to a non-selection potential until the temperature becomes substantially stable.

【0030】上記課題を解決するために本発明が用いる
第5の手段は、前記第1の手段に加え、少なくとも前記
行内反転直前に於いて、各列電極に印可する前記列電極
駆動電圧の電位変化が開始するに先だって、前記走査選
択信号の電位を非選択電位とする事である。
A fifth means used by the present invention to solve the above-mentioned problems is, in addition to the first means, at least immediately before the in-row inversion, the potential of the column electrode drive voltage applied to each column electrode. Before the change starts, the potential of the scan selection signal is set to a non-selection potential.

【0031】上記課題を解決するために本発明が用いる
第6の手段は、前記第1の手段に加え、各選択期間の前
縁に於いて、列電極駆動電圧の変化の開始タイミング
を、前行の走査選択信号がほぼ非選択電位になってから
開始するとともに、該列電極駆動電圧が当該行の表示デ
ータに基づく電圧にほぼ安定するまでの間、当該行の走
査選択信号を非選択電位に固定する事である。
In addition to the first means, the sixth means used by the present invention to solve the above-mentioned problem is that the start timing of the change of the column electrode drive voltage is set at the front edge of each selection period. The scan selection signal of the row is set to the non-selection potential, and the scan selection signal of the row is set to the non-selection potential until the column electrode drive voltage is substantially stable to the voltage based on the display data of the row. It is fixed to.

【0032】上記課題を解決するために本発明が用いる
第7の手段は、前記第1の手段に加え、各選択期間の後
縁に於いて、列電極駆動電圧の変化の開始されるに先行
して、走査選択信号を非選択電位に移行させ、選択期間
の終了に先だって該列電極駆動電圧が次行の表示データ
に基づく電圧にほぼ安定させるようにする事である。
The seventh means used by the present invention to solve the above-mentioned problems is, in addition to the above-mentioned first means, prior to the start of the change of the column electrode drive voltage at the trailing edge of each selection period. Then, the scan selection signal is shifted to the non-selection potential so that the column electrode drive voltage is almost stabilized to the voltage based on the display data of the next row before the end of the selection period.

【0033】上記課題を解決するために本発明が用いる
第8の手段は、前記第1の手段に加え、各選択期間の間
に全ての走査選択信号が非選択電位になる安定化期間を
設け、該安定期間内に於いて、各列電極駆動電圧の、前
行の表示データに基づく電圧から次行の表示データに基
づく電圧への移行をほぼ完了させる事である。
In addition to the first means, an eighth means used by the present invention to solve the above-mentioned problem is to provide a stabilization period during which each scanning selection signal becomes a non-selection potential during each selection period. In the stable period, the transition of the drive voltage of each column electrode from the voltage based on the display data of the previous row to the voltage based on the display data of the next row is almost completed.

【0034】上記課題を解決するために本発明が用いる
第9の手段は、前記第1の手段に加え、少なくとも各列
電極駆動電圧が変化していると予測される期間、各走査
選択信号の電位がほぼ非選択電位となる如く操作する事
である。
In addition to the first means, a ninth means used by the present invention to solve the above-mentioned problems is that at least a period for which each column electrode drive voltage is predicted to change, a scan selection signal It is to operate so that the potential becomes almost non-selective potential.

【0035】上記課題を解決するために本発明が用いる
第10の手段は、前記第2乃至第10の手段に加え、選
択期間内に液晶に印加される高圧の駆動電圧が正負同等
となる如く、前記操作選択信号を非選択電位に固定する
時間を設定する事である。
The tenth means used by the present invention to solve the above-mentioned problems is, in addition to the above-mentioned second to tenth means, that the high-voltage driving voltage applied to the liquid crystal within the selection period becomes positive and negative. , Setting the time for fixing the operation selection signal to the non-selection potential.

【0036】[0036]

【作用】上記第1の手段を用いる事により、各列電極駆
動電圧が一定値を保つ時間は選択期間と同じか若しくは
半分の長さとなり、図11(a)、(b)に示す如く寄
生抵抗を介しての充放電による波形変形の影響差が減少
し、しかも非選択期間の実効電圧は表示パターンによら
ず、行毎反転を行うフィールドと行毎反転を行わないフ
ィールドとの平均に於いて同一化されるとともにコント
ラストの低下も最小限に押さえる事が出来る。また上記
第2乃至第10の手段を用いる事により、後述する選択
期間での波形歪みの問題も解消され、従来と同等のフレ
ーム階調を行う事が出来る。
By using the above-mentioned first means, the time for which each column electrode drive voltage maintains a constant value is the same as or half the length of the selection period, and as shown in FIGS. The influence difference of the waveform deformation due to the charge and discharge through the resistor is reduced, and the effective voltage in the non-selected period is the average of the field in which the row inversion is performed and the field in which the row inversion is not performed, regardless of the display pattern. In addition, it is possible to minimize the reduction of contrast as well as making them identical. Further, by using the second to tenth means, the problem of waveform distortion in the selection period, which will be described later, can be solved, and the same frame gradation as the conventional one can be performed.

【0037】[0037]

【実施例】図15は本発明の第1の実施例であり、各選
択期間で行内反転を行うとともに行毎反転(行が変わる
毎に操作選択信号の極性を反転させる)を行わないフィ
ールド(T1 ・・・Tm 、以下Tフィールドとする)と
行毎反転を行うフィールド(t1 ・・・tm 、以下tフ
ィールドとする)とを交互に配置した実施例である。図
15に於いて信号Lは高電位の時、行毎反転を行う事を
指示する信号である。
FIG. 15 shows a first embodiment of the present invention in which a field (inverts the polarity of the operation selection signal every time the row is changed) is performed while the in-row inversion is performed in each selection period. In this embodiment, T1 ... Tm, hereinafter referred to as T field) and fields for performing inversion for each row (t1 ... tm, hereinafter referred to as t field) are alternately arranged. In FIG. 15, the signal L is a signal instructing to invert every row when the potential is high.

【0038】図15によれば非選択期間に於ける列電極
駆動電圧の変化回数は、Tフィールドとtフィールドの
平均をとればP1a、P1b、P1cとも同一となる事が分か
り、表示パターンによらず非選択期間の実効値は変わら
ない。また寄生抵抗の影響が軽減される事は明かであ
る。更に図12若しくは図13を比較すると、列電極駆
動電圧の固定期間が無いため、図12、図13の如く明
状態の実効値が低下したり、暗状態の実効値が増加した
りする事がないからコントラストの低下が改善される事
も明かであろう。
It can be seen from FIG. 15 that the number of changes in the column electrode drive voltage during the non-selected period is the same for P1a, P1b, and P1c if the T field and the t field are averaged. Without change, the effective value during the non-selected period does not change. It is also clear that the effect of parasitic resistance is reduced. Furthermore, comparing FIG. 12 or FIG. 13, since there is no fixed period of the column electrode drive voltage, the effective value in the bright state may decrease or the effective value in the dark state may increase as shown in FIGS. 12 and 13. It is also clear that the reduction in contrast is improved because it is not present.

【0039】所で図15は波形歪みを省略して描いた
が、図15を列電極駆動電圧Ya、Yb、Ycに波形歪
みを付け加えると書き直すと図16が得られる。
Although FIG. 15 is drawn with the waveform distortion omitted, FIG. 16 is obtained by rewriting FIG. 15 by adding the waveform distortion to the column electrode drive voltages Ya, Yb, and Yc.

【0040】図16に於いて画素P1a、P1b、P1cに選
択期間T1 に印加される駆動電圧波形について吟味する
と、T1 の前縁に於いてYcは変化するためP1cには駆
動電圧実効値が減少する方向に波形歪みが生ずるが、Y
a、Ybは変化しないためP1a、P1bには波形歪みが生
じない。一方選択期間t1 に印加される駆動電圧波形に
ついて吟味すると、t1 の前縁に於いてYa、Ybは変
化するためP1aには駆動電圧実効値が減少する方向に波
形歪みが生じ、P1bには駆動電圧実効値が増加する方向
に波形歪みが生じずるが、Ycは変化しないためP1cに
は波形歪みが生じない。同様の議論が行内反転の直後に
於いても存在する。
When the drive voltage waveform applied to the pixels P1a, P1b and P1c in the selection period T1 in FIG. 16 is examined, Yc changes at the leading edge of T1 and therefore the drive voltage effective value decreases in P1c. Waveform distortion occurs in the direction
Since a and Yb do not change, waveform distortion does not occur in P1a and P1b. On the other hand, when the drive voltage waveform applied in the selection period t1 is examined, Ya and Yb change at the leading edge of t1, so that waveform distortion occurs in P1a in the direction in which the effective drive voltage decreases, and P1b drives. The waveform distortion does not occur in the direction in which the effective voltage value increases, but the waveform distortion does not occur in P1c because Yc does not change. A similar argument exists immediately after the inversion.

【0041】図16の波形からクロストークについて考
察すると、非選択期間に於ける列電極駆動電圧の変化回
数は、Tフィールドとtフィールドの平均をとればP1
a、P1b、P1cとも同一であり、また選択期間に印加さ
れる高電圧の実効値もT1 とt1 の平均をとれば同一表
示の画素同志では同一となる。従ってTフィールドとt
フィールドを合わせて1フレームとすれば、1フレーム
内での同一表示状態の画素については実効電圧は等しく
なり、従ってクロストークは生じない。更にコントラス
ト低下は波形歪みの影響のみであるから図13の場合に
比べれば小さいものとなる。
Considering the crosstalk from the waveform of FIG. 16, the number of changes of the column electrode drive voltage in the non-selection period is P1 when the average of T field and t field is taken.
The same applies to a, P1b, and P1c, and the effective value of the high voltage applied during the selection period is also the same for the pixels of the same display if the average of T1 and t1 is taken. Therefore T field and t
If the fields are combined into one frame, the effective voltages are the same for pixels in the same display state within one frame, and therefore crosstalk does not occur. Further, the contrast decrease is smaller than that in the case of FIG. 13 because it is only due to the influence of the waveform distortion.

【0042】但し図16で明かな如く、画素P1a、P1c
には正の直流成分が残留しし、P1bには負の直流成分が
残留してしまう事が分かる。これを避けるためにはフレ
ームの整数倍の周期で駆動電圧の極性を反転(以下フレ
ーム反転とする)させれば良い。これにより複数のフィ
ールドに渡って表示パターンを制御して階調を得る、い
わゆるフレーム階調を行わない場合は問題なく高品質の
表示画像を得る事が出来る。しかしながらフレーム階調
表示を行う場合は直流成分の残留が問題となる場合があ
る。従来の技術の場合、フィールド反転を行って直流分
の残留を防いでおり、2フィールド単位で表示パターン
を変化させれば残留直流成分を残さないでフレーム階調
が行えた。しかるに図16に於いてフレーム反転すれば
最低でも4フィールド単位で表示パターンフを操作しな
いと直流成分が残留してしまう。
However, as is apparent from FIG. 16, the pixels P1a and P1c are
It can be seen that the positive DC component remains in P1b and the negative DC component remains in P1b. In order to avoid this, the polarity of the drive voltage may be inverted (hereinafter referred to as frame inversion) at a cycle that is an integral multiple of the frame. As a result, it is possible to obtain a high-quality display image without problems when a gradation is controlled by controlling a display pattern over a plurality of fields, that is, when so-called frame gradation is not performed. However, when the frame gradation display is performed, the residual DC component may be a problem. In the case of the conventional technique, the field inversion is performed to prevent the DC component from remaining. If the display pattern is changed in units of two fields, the frame gradation can be performed without leaving the residual DC component. However, if the frame is inverted in FIG. 16, the DC component remains unless the display pattern is operated in units of at least 4 fields.

【0043】図1は本発明の第2の実施例であり、図1
6の実施例に更に上記第2乃至第5の解決手段を用いた
ものであり、各選択期間の前縁に於いて、各列電極駆動
電圧(Y)の電位変化がほぼ安定するまでの期間、前記
走査選択信号を非選択電位に保持し、また各選択期間の
後縁に於いて、電位固定に先立って前記走査選択信号を
非選択電位に移行させ、該移行がほぼ終了してから各列
電極駆動電圧の電位固定が開始されるようにするととも
に、行内反転時に各列電極駆動電圧が変化を開始するの
に先立って前記走査選択信号を非選択電位に移行させ、
各列電極駆動電圧の電位変化がほぼ終了してから再び前
記走査選択信号を選択電位に移行させ、更に選択期間内
に液晶に印加される高圧の駆動電圧が正負同等となる如
く、前記操作選択信号を非選択電位に固定する時間を設
定する事である。具体的には信号Hが高電位の時、前記
走査選択信号強制的に非選択電位にするようにし、該信
号Hが高電位となる時間を調整すれば良い。
FIG. 1 shows a second embodiment of the present invention.
In the sixth embodiment, the second to fifth solving means are further used, and a period until the potential change of each column electrode drive voltage (Y) becomes substantially stable at the leading edge of each selection period. , The scanning selection signal is held at the non-selection potential, and at the trailing edge of each selection period, the scanning selection signal is shifted to the non-selection potential prior to fixing the potential, and after the transition is almost completed, While fixing the potential of the column electrode drive voltage is started, the scan selection signal is shifted to a non-selection potential before each column electrode drive voltage starts changing at the time of inversion in the row,
After the potential change of each column electrode drive voltage is almost finished, the scanning selection signal is shifted to the selection potential again, and the operation selection is performed so that the high voltage drive voltage applied to the liquid crystal becomes equal to the positive and negative in the selection period. This is to set the time for fixing the signal to the non-selection potential. Specifically, when the signal H has a high potential, the scanning selection signal may be forcibly set to a non-selection potential, and the time during which the signal H has a high potential may be adjusted.

【0044】図1に示した動作波形を図16の場合と比
較してみると、波形歪みによるコントラスト低下が大幅
に改善されるとともに各フレーム内で直流成分の残留が
無い事が分かり、従って従来の条件と同様に2フィール
ドの単位でフレーム階調を行う事が可能となる。
Comparing the operation waveforms shown in FIG. 1 with the case of FIG. 16, it is found that the contrast deterioration due to the waveform distortion is significantly improved and that no DC component remains in each frame. It is possible to perform frame gradation in units of two fields, as in the condition of.

【0045】所で例えば図1の実施例に於いて、「選択
期間」の定義を変更すると次のような解釈が成り立つ。 (1)図17(a)のごとく、ある行の操作選択信号が
選択電位に移行する時間から次の行の操作選択信号が選
択電位に移行するまでの時間を選択期間と定義すれば、
図1に於いては選択期間の前縁で行われた操作が、選択
期間の後縁で行われる事になる。すなわち各選択期間の
後縁に於いて、列電極駆動電圧の変化の開始されるに先
行して、走査選択信号を非選択電位に移行させ、選択期
間の終了に先だって該列電極駆動電圧が次行の表示デー
タに基づく電圧にほぼ安定させるようにする事になり、
前記第7と第10の解決手段、若しくは第9の解決手段
を用いる事になる。
By the way, for example, in the embodiment of FIG. 1, if the definition of "selection period" is changed, the following interpretation is established. (1) As shown in FIG. 17A, if the time from the time when the operation selection signal of one row shifts to the selection potential to the time when the operation selection signal of the next row shifts to the selection potential is defined as the selection period,
In FIG. 1, the operation performed at the leading edge of the selection period is performed at the trailing edge of the selection period. That is, at the trailing edge of each selection period, the scan selection signal is shifted to the non-selection potential before the change of the column electrode drive voltage is started, and the column electrode drive voltage is changed to the next level before the end of the selection period. It will be almost stable to the voltage based on the display data of the row,
The seventh and tenth solving means or the ninth solving means will be used.

【0046】(2)図17(b)のごとく、ある行の操
作選択信号が最終的に(行内反転の前後を除いて)選択
電位から非選択電位に移行する時間から次の行の操作選
択信号が最終的に選択電位から非選択電位に移行するま
での時間を選択期間と定義すれば、図1に於いては選択
期間の後縁で行われた操作が、選択期間の前縁で行われ
る事になる。すなわち各選択期間の前縁に於いて、列電
極駆動電圧の変化の開始タイミングを、前行の走査選択
信号がほぼ非選択電位になってから開始するとともに、
該列電極駆動電圧が当該行の表示データに基づく電圧に
ほぼ安定するまでの間、当該行の走査選択信号を非選択
電位に固定する事になり、前記第6と第10の解決手
段、若しくは第9の解決手段の解決手段を用いる事にな
る。
(2) As shown in FIG. 17B, the operation selection signal of a certain row is finally selected (except before and after the inversion within the row) from the selection potential to the non-selection potential from the operation selection of the next row. If the time until the signal finally shifts from the selection potential to the non-selection potential is defined as the selection period, the operation performed at the trailing edge of the selection period in FIG. Will be seen. That is, at the leading edge of each selection period, the start timing of the change in the column electrode drive voltage is started after the scan selection signal of the preceding row becomes substantially the non-selection potential, and
Until the column electrode drive voltage becomes substantially stable to the voltage based on the display data of the row, the scan selection signal of the row is fixed to the non-selection potential, and the sixth and tenth solving means, or The solution of the ninth solution will be used.

【0047】(3)図17(c)のごとく、ある行の操
作選択信号が選択電位になった時点から最終的に(行内
反転の前後を除いて)に選択電位から非選択電位に移行
するまでの時間を選択期間と定義すれば、図1に於いて
は選択期間の前縁及び後縁で行われた操作が、選択期間
と選択期間の間で行われる事になる。すなわち各選択期
間の間に走査選択信号が全て非選択電位になる安定化期
間を設け、該安定期間内に於いて、各列電極駆動電圧
の、前行の表示データに基づく電圧から次行の表示デー
タに基づく電圧への移行をほぼ完了させる事になり、前
記第8と第10の解決手段、若しくは第9の解決手段の
解決手段を用いる事になる。
(3) As shown in FIG. 17C, the selection potential finally shifts to the non-selection potential (except before and after the inversion within the row) from the time when the operation selection signal of a certain row reaches the selection potential. If the time until is defined as the selection period, the operations performed at the leading edge and the trailing edge of the selection period in FIG. 1 are performed between the selection periods. That is, a stabilization period in which all the scan selection signals become non-selection potential is provided between each selection period, and within the stabilization period, the voltage based on the display data of the previous row of the voltage of each column electrode drive voltage is changed to the next row. The transition to the voltage based on the display data is almost completed, and the solution means of the eighth and tenth solution means or the ninth solution means is used.

【0048】本発明の図1の実施例を要約すると、「液
晶に印加する駆動電圧の極性を各選択期間内で反転(行
内反転)させるとともに、行毎に駆動電圧の極性を反転
(行毎反転)させるフィールドと行毎反転させないフィ
ールドを混在させるとともに、少なくとも各列電極駆動
電圧が変化していると予測される期間、各走査選択信号
の電位がほぼ非選択電位となる如く操作する事」にな
る。
The embodiment of FIG. 1 of the present invention is summarized as follows: "The polarity of the drive voltage applied to the liquid crystal is inverted (intra-row inversion) within each selection period, and the polarity of the drive voltage is inverted (row-by-row). Fields to be inverted) and fields not to be inverted row by row are mixed, and at least during the period when the column electrode drive voltage is expected to change, the operation is performed so that the potential of each scan selection signal becomes substantially a non-selective potential. " become.

【0049】以上の実施例の説明は図9(b)における
寄生抵抗についてrx=A、RL=∞と想定して行った
が、これ以外の値の場合は波形が異なるだけで本発明の
効果は変わらない。更に寄生抵抗は図9(a)に示した
ものに加え、図18のrzに示したように隣合う列電極
間にも存在し、隣合う列電極駆動電圧が異なった場合に
互いに影響して表示状態が変化する現象が出る場合もあ
るが、この場合も本発明の実施により大幅に改善する事
が出来る。
The above description of the embodiment is made assuming that the parasitic resistance in FIG. 9B is rx = A and RL = ∞, but for other values, the waveform is different and the effect of the present invention is obtained. Does not change. Further, in addition to the parasitic resistance shown in FIG. 9A, the parasitic resistance also exists between the adjacent column electrodes as shown by rz in FIG. 18, and influences each other when the adjacent column electrode drive voltages are different. There may be a case where the display state changes, but in this case as well, it can be greatly improved by implementing the present invention.

【0050】[0050]

【発明の効果】以上述べた如く本発明によれば、非選択
期間の列電極駆動電圧の変化回数の影響によるクロスト
ーク、及び寄生抵抗の影響によるクロストークの発生が
ともに抑えられ、かつコントラストの低下も抑えられ、
極めて良好な表示装置を提供する事が出来、しかも従来
の条件と同様に2フィールドの単位でフレーム階調を行
う事が可能となる。
As described above, according to the present invention, the crosstalk due to the influence of the number of changes of the column electrode drive voltage during the non-selection period and the crosstalk due to the influence of the parasitic resistance are both suppressed, and the contrast is reduced. The decrease is suppressed,
It is possible to provide a very good display device, and it is possible to perform frame gradation in units of two fields as in the conventional condition.

【0051】液晶パネルは高精細化、あるいは微細化の
方向にあり、電極面積が小さくなるにつれて等価容量が
減少し、更に電極間のスペースが狭くなるにつれて例え
ば前記寄生抵抗rzの値は小さくなり、容量との時定数
も小さくなる方向にある。結果として本発明が解決すべ
き課題として取り上げた問題点は今後ますます大きくな
るものと考えられるが、本発明によれば起こり得る問題
を全て解決する事が出来る。
The liquid crystal panel is in the direction of high definition or miniaturization, the equivalent capacitance decreases as the electrode area decreases, and the parasitic resistance rz decreases, for example, as the space between the electrodes decreases. The time constant with the capacity is also decreasing. As a result, the problems taken up as the problems to be solved by the present invention are expected to grow more and more in the future, but the present invention can solve all possible problems.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第2の実施例を示す動作波形図であ
る。
FIG. 1 is an operation waveform diagram showing a second embodiment of the present invention.

【図2】液晶駆動回路の構成を示す図である。FIG. 2 is a diagram showing a configuration of a liquid crystal drive circuit.

【図3】液晶駆動回路のより詳細なブロック図である。FIG. 3 is a more detailed block diagram of a liquid crystal drive circuit.

【図4】液晶駆動電圧の設定法を示す波形図である。FIG. 4 is a waveform diagram showing a method of setting a liquid crystal drive voltage.

【図5】液晶の基本的な駆動波形を示す図である。FIG. 5 is a diagram showing a basic drive waveform of liquid crystal.

【図6】基本的な駆動方式の問題点を説明するための波
形図である。
FIG. 6 is a waveform diagram for explaining problems of a basic driving method.

【図7】従来例を説明するための動作波形図である。FIG. 7 is an operation waveform diagram for explaining a conventional example.

【図8】従来例の問題点を説明するための液晶の等価回
路図である。
FIG. 8 is an equivalent circuit diagram of a liquid crystal for explaining the problems of the conventional example.

【図9】寄生抵抗の影響を説明するための動作波形図で
ある。
FIG. 9 is an operation waveform diagram for explaining the influence of parasitic resistance.

【図10】寄生抵抗が液晶駆動電圧の実効値に与える影
響を説明する動作波形図である。
FIG. 10 is an operation waveform diagram for explaining the influence of parasitic resistance on the effective value of the liquid crystal drive voltage.

【図11】本発明の作用を説明するための動作波形図で
ある。
FIG. 11 is an operation waveform diagram for explaining the operation of the present invention.

【図12】本発明を説明するための参考動作波形図であ
る。
FIG. 12 is a reference operation waveform diagram for explaining the present invention.

【図13】本発明を説明するための参考動作波形図であ
る。
FIG. 13 is a reference operation waveform diagram for explaining the present invention.

【図14】本発明の効果を説明するための動作波形図で
ある。
FIG. 14 is an operation waveform diagram for explaining the effect of the present invention.

【図15】本発明の第1の実施例を示す動作波形図であ
る。
FIG. 15 is an operation waveform diagram showing the first embodiment of the present invention.

【図16】本発明の第1の実施例を示す他の動作波形図
である。
FIG. 16 is another operation waveform diagram showing the first embodiment of the present invention.

【図17】本発明の他の実施例を説明する説明図であ
る。
FIG. 17 is an explanatory diagram illustrating another embodiment of the present invention.

【図18】他の寄生抵抗を示す等価回路図である。FIG. 18 is an equivalent circuit diagram showing another parasitic resistance.

【符号の説明】[Explanation of symbols]

201 制御回路 202 列電極駆動回路 203 行電極駆動回路 204 駆動電源回路 301 記憶回路 302 保持回路 303 電圧切替回路 304 出力回路 305 走査信号発生回路 306 出力回路 307 表示パネル 201 control circuit 202 column electrode drive circuit 203 row electrode drive circuit 204 drive power supply circuit 301 storage circuit 302 holding circuit 303 voltage switching circuit 304 output circuit 305 scanning signal generation circuit 306 output circuit 307 display panel

Claims (10)

【特許請求の範囲】[Claims] 【請求項1】 列電極駆動電圧が印加される列電極群
と、走査選択信号に基づく行電極駆動電圧が印加される
行電極群を有する表示装置の駆動方式に於いて、各選択
期間内に於いて、液晶に印加する駆動電圧の極性を反転
(行内反転)させるとともに、行毎に駆動電圧の極性を
反転(行毎反転)させるフィールドと行毎反転させない
フィールドを混在させた事を特徴とする、表示装置の駆
動方式。
1. A driving method of a display device having a column electrode group to which a column electrode driving voltage is applied and a row electrode group to which a row electrode driving voltage based on a scanning selection signal is applied, in each selection period. In this case, the polarity of the drive voltage applied to the liquid crystal is inverted (intra-row inversion), and a field for inverting the polarity of the drive voltage for each row (inversion for each row) and a field for not inverting each row are mixed. To drive the display device.
【請求項2】 少なくとも各選択期間の前縁に於いて、
各列電極に印可する前記列電極駆動電圧の電位がほぼ安
定するまでの期間、前記走査選択信号の電位を非選択電
位とする事を特徴とする請求項1に記載の表示装置の駆
動方式。
2. At least the leading edge of each selection period,
The driving method of the display device according to claim 1, wherein the potential of the scan selection signal is set to a non-selection potential until the potential of the column electrode drive voltage applied to each column electrode is substantially stabilized.
【請求項3】 少なくとも各選択期間の後縁に於いて、
各列電極に印可する前記列電極駆動電圧の電位変化が開
始するに先だって、前記走査選択信号の電位を非選択電
位とする事を特徴とする請求項1に記載の表示装置の駆
動方式。
3. At least at the trailing edge of each selection period,
2. The driving method of the display device according to claim 1, wherein the potential of the scan selection signal is set to a non-selection potential before the potential change of the column electrode drive voltage applied to each column electrode is started.
【請求項4】 少なくとも前記行内反転直後に於いて、
各列電極に印可する前記列電極駆動電圧の電位がほぼ安
定するまでの期間、前記走査選択信号の電位を非選択電
位とする事を特徴とする請求項1に記載の表示装置の駆
動方式。
4. At least immediately after the inline inversion,
The driving method of the display device according to claim 1, wherein the potential of the scan selection signal is set to a non-selection potential until the potential of the column electrode drive voltage applied to each column electrode is substantially stabilized.
【請求項5】 少なくとも前記行内反転直前に於いて、
各列電極に印可する前記列電極駆動電圧の電位変化が開
始するに先だって、前記走査選択信号の電位を非選択電
位とする事を特徴とする請求項1に記載の表示装置の駆
動方式。
5. At least immediately before the inline inversion,
2. The driving method of the display device according to claim 1, wherein the potential of the scan selection signal is set to a non-selection potential before the potential change of the column electrode drive voltage applied to each column electrode is started.
【請求項6】 各選択期間の前縁に於いて、列電極駆動
電圧の変化の開始タイミングを、前行の走査選択信号が
ほぼ非選択電位になってから開始するとともに、該列電
極駆動電圧が当該行の表示データに基づく電圧にほぼ安
定するまでの間、当該行の走査選択信号を非選択電位に
固定する事を特徴とする請求項1に記載の表示装置の駆
動方式。
6. At the leading edge of each selection period, the start timing of the change of the column electrode drive voltage is started after the scan selection signal of the preceding row becomes substantially the non-selection potential, and the column electrode drive voltage is changed. The driving method of the display device according to claim 1, wherein the scan selection signal of the row is fixed to a non-selection potential until is substantially stable to the voltage based on the display data of the row.
【請求項7】 各選択期間の後縁に於いて、列電極駆動
電圧の変化の開始されるに先行して、走査選択信号を非
選択電位に移行させ、選択期間の終了に先だって該列電
極駆動電圧が次行の表示データに基づく電圧にほぼ安定
させるようにする事を特徴とする請求項1に記載の表示
装置の駆動方式。
7. A scanning selection signal is shifted to a non-selection potential at the trailing edge of each selection period prior to the start of a change in the column electrode drive voltage, and the column electrode is preceded by the end of the selection period. 2. The driving method of the display device according to claim 1, wherein the driving voltage is made substantially stable to the voltage based on the display data of the next row.
【請求項8】 各選択期間の間に全ての走査選択信号が
非選択電位になる安定化期間を設け、該安定期間内に於
いて、各列電極駆動電圧の、前行の表示データに基づく
電圧から次行の表示データに基づく電圧への移行をほぼ
完了させる事を特徴とする請求項1に記載の表示装置の
駆動方式。
8. A stabilization period in which all scanning selection signals are at non-selection potential is provided between each selection period, and within the stabilization period, each column electrode drive voltage is based on the display data of the preceding row. The driving method of the display device according to claim 1, wherein the transition from the voltage to the voltage based on the display data of the next row is almost completed.
【請求項9】 少なくとも各列電極駆動電圧が変化して
いると予測される期間、各走査選択信号の電位がほぼ非
選択電位となる如く操作する事を特徴とする請求項1に
記載の表示装置の駆動方式。
9. The display according to claim 1, wherein the operation is performed such that the potential of each scan selection signal becomes substantially a non-selection potential at least during a period in which each column electrode drive voltage is predicted to change. Device drive system.
【請求項10】 選択期間内に液晶に印加される高圧の
駆動電圧が正負同等となる如く、前記操作選択信号を非
選択電位に固定する事を特徴とする、請求項1、請求項
2、請求項3、請求項4、請求項5、請求項6、請求項
7、請求項8、請求項9に記載の表示装置の駆動方式。
10. The method according to claim 1, wherein the operation selection signal is fixed to a non-selection potential so that the high voltage drive voltage applied to the liquid crystal during the selection period becomes equal to positive and negative. The driving method of the display device according to claim 3, claim 4, claim 5, claim 6, claim 7, claim 8, or claim 9.
JP35802191A 1991-12-27 1991-12-27 Driving system of display device Pending JPH05181433A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP35802191A JPH05181433A (en) 1991-12-27 1991-12-27 Driving system of display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP35802191A JPH05181433A (en) 1991-12-27 1991-12-27 Driving system of display device

Publications (1)

Publication Number Publication Date
JPH05181433A true JPH05181433A (en) 1993-07-23

Family

ID=18457140

Family Applications (1)

Application Number Title Priority Date Filing Date
JP35802191A Pending JPH05181433A (en) 1991-12-27 1991-12-27 Driving system of display device

Country Status (1)

Country Link
JP (1) JPH05181433A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6118421A (en) * 1995-09-29 2000-09-12 Sharp Kabushiki Kaisha Method and circuit for driving liquid crystal panel

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6118421A (en) * 1995-09-29 2000-09-12 Sharp Kabushiki Kaisha Method and circuit for driving liquid crystal panel

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