JPH05180904A - Testing device - Google Patents

Abstract

PURPOSE:To obtain a faithful response waveform from an element to be tested by using an impedance correction circuit which removes distortion caused by multiple reflection due to the input capacity of a comparator circuit. CONSTITUTION:This testing device 1 is composed of a driver 3, an impedance correction circuit 2, and a comparator circuit 4 and the signals inputted to or outputted from the device 1 are connected to an element 6 to be tested through a transmission line 5. In the above-mentioned constitution, a testing waveform generated from the driver 3 is impressed upon the element 6 to be tested after it is transmitted through the correction circuit 2 and a transmission line 5. The comparator circuit 4 performs comparison tests for confirming whether or not a specific voltage is outputted by comparing the voltage of the output signal of the element 6 outputted as a response to the testing waveform with a reference voltage 4c.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an impedance correction circuit, and more particularly to a semiconductor test device, particularly when a response signal is sent from a device under test to the test device and when a test signal is sent from the test device to the device under test. The present invention relates to a test device that removes a reflected wave that occurs.

[0002]

2. Description of the Related Art Conventionally, semiconductor test equipment is "" Subnan
osecond Timing Measurements on MOSDevices Using Mo
dern VLSI Test System ”IEEE.Procedings of Internat
ionalTest Conference. By MR Barber. P170 ~ P180 (198
As described in P171 in `` 3) '', a driver that applies an arbitrary voltage to the device under test, a comparator that compares whether the signal from the device under test has a specified value or not with a reference voltage, It consisted of a transmission line that electrically connected them.

[0003]

In the test apparatus, a comparison circuit (comparator) for comparing the output signal of the device under test with the reference signal is indispensable. This comparison circuit detects whether the output of the device under test is high level or low level.

Corresponding to the increase in the speed of the device under test, the edge (rising, falling) speed of the output signal (response signal) of the device under test becomes fast, and especially when the test equipment detects the edge changing at high speed, Due to the influence of the input capacitance of the comparator of the test apparatus, a mismatch occurs in the characteristic impedance of the transmission line connecting the driver of the test apparatus, the comparison circuit and the device under test. As a result, multiple reflections occur and the accurate waveform from the device under test is not transmitted to the comparator, and accurate waveform measurement cannot be performed.

An object of the present invention is to provide an impedance correction circuit capable of preventing the response waveform from the device under test from being multi-reflected on the transmission line between the device under test and the pin electronics to deteriorate the test accuracy.

[0006]

In order to achieve the above object, the test apparatus of the present invention is provided with an impedance correction circuit composed of a resistor, a capacitor and a transmission line near the input end of the comparison circuit.

[0007]

The impedance of the transmission line of the impedance correction circuit is made equal to the characteristic impedance of the transmission line connecting the impedance correction circuit and the device under test with the input capacitance of the comparator, the voltage dividing resistor and the capacitor, and the reflected wave component is The transmission lines are matched so as not to occur, and multiple reflections are prevented, which enables accurate measurement of the output waveform from the device under test.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the present invention will be described below with reference to FIGS.

The test apparatus 1 comprises a driver 3, an impedance correction circuit 2 and a comparison circuit 4. Input / output signals to / from the test apparatus 1 are connected to a device under test 6 via a transmission line 5. With the above configuration, the test waveform created by the driver 3 is transmitted through the impedance correction circuit 2 and the transmission line 5 and applied to the device under test. The comparison circuit 4 compares the output signal from the device under test 6 as a response of the test waveform with the comparison voltage 4c to perform a comparison test to determine whether a prescribed voltage is output. The LSI tester that performs such a test checks whether the logic operates correctly and also checks whether the logic circuit responds within a specified time. In order to improve the time accuracy of this latter test, the impedance correction circuit 2 is provided near the input end of the comparison circuit 4.

FIG. 2 is a circuit diagram showing another embodiment of the present invention.

In FIG. 2, the impedance correction circuit is composed of a transmission line 2a, a capacitor 2b connected in parallel with a resistor 2c, a resistor 2d connected between the ground and a terminal connected to an input 4a of the comparison circuit. The other configuration is the same as that of FIG. Capacitor 4b
Is the input capacitance of the comparison circuit.

Here, considering the characteristic impedance Z ₀ in a coaxial line,

[0013]

## EQU1 ## Represented by [Ω], L is inductance [H], C is capacitance [F]
Is. The characteristic impedance of the transmission line 5 is Z ₀ , the length, inductance, and capacitance of the transmission line 2a are X, respectively.
Letting Ls and Cs be the input capacitance of the comparison circuit 4 is 4b, and the same value as the input capacitance 4b of the comparison circuit 4 is the capacitance 2b, the capacitance is Cs + 1/2 × 4b / X, and from the equation 1,

[0014]

[Equation 2] [Ω]. From this, by determining Ls and Cs and setting the characteristic impedance Z ₀ to the same value as the characteristic impedance of the transmission line 5, matching with the transmission line 5 is achieved, and the comparison circuit 4
There is an effect that multiple reflection does not occur at the input 4a and the response waveform is not distorted.

However, there is a restriction on the length X of the transmission line 2a. If the transmission line 2a is longer than ¼ of the wavelength λ, multiple reflection will occur even if the characteristic impedances are matched. Therefore, from the relational expressions described below, it is better to avoid making the transmission line length longer than necessary, but by making the transmission line length short, multiple reflection does not occur. The corner frequency fc is

[0016]

(3) [Hz] and the propagation delay T ₀ is

[0017]

## EQU4 ## It is represented by T ₀ = L × C [sec / m]. The length X of the transmission line 2a is

[0018]

[Expression 5] X = 1 / (2π × T ₀ × fc) [m], and the wavelength λ is

[0019]

## EQU6 ## λ = Cc / fc [m], where Cc is the speed of light.

By setting the resistors 2c and 2d to the same value, the response waveform from the device under test at the input 4a of the comparison circuit 4 does not become blunt due to the time constant τ of the equation (2). The voltage of 1/2 is input to the comparison circuit input 4a.

[0021]

## EQU00007 ## .tau. = C.times.R [s] According to the present embodiment, when handling a high-speed signal, the comparison circuit 4
Input capacitance 4b is connected to the output path of the device under test 6,
Even if the characteristic impedance is disturbed, the characteristic correction circuit 2 causes the characteristic impedance Z ₀ of the transmission line 5 to be disturbed.
Since there is no reflection, no reflection occurs and the waveform is not distorted at the input 4a of the comparison circuit 4.

[0022]

Since the present invention is configured as described above, it has the following effects.

By providing the impedance correction circuit in the vicinity of the comparison circuit that constitutes the test apparatus, multiple reflection does not occur in the response waveform from the device under test, so that accurate measurement can be performed.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a test apparatus according to the present invention.

FIG. 2 is a diagram showing another embodiment of the test apparatus according to the present invention.

[Explanation of symbols]

 2 ... Impedance correction circuit 2a ... Transmission line 2b ... Capacitor 2c ... Resistor 2d ... Resistor 3 ... Driver 4 ... Comparison circuit 4b ... Input capacitance 5 ... Transmission line 6 ... Device under test

Claims (2)

[Claims] Claim: What is claimed is: 1. An impedance correction circuit is connected to an input of a comparison circuit (comparator) to make the input impedance of the comparator constant over a wide range.
A test device characterized by matching with a transmission line. 2. The impedance correction circuit connected between a transmission line for applying a driver output to an element under test according to claim 1, wherein the impedance correction circuit includes a transmission line and a first resistance and a second resistance connected in series thereto. , The other end of the second resistor is connected to the ground, the capacitor connected in parallel to the first resistor, and the circuit connecting the input of the comparison circuit to the connection point of the first resistor and the second resistor. Test equipment.