JPH05175663A - Multilayer wiring board - Google Patents

Multilayer wiring board

Info

Publication number
JPH05175663A
JPH05175663A JP34125191A JP34125191A JPH05175663A JP H05175663 A JPH05175663 A JP H05175663A JP 34125191 A JP34125191 A JP 34125191A JP 34125191 A JP34125191 A JP 34125191A JP H05175663 A JPH05175663 A JP H05175663A
Authority
JP
Japan
Prior art keywords
layer
layers
wiring board
signal
multilayer wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP34125191A
Other languages
Japanese (ja)
Inventor
Haruo Ogino
晴夫 荻野
Masayoshi Ikeda
正義 池田
Kanji Murakami
敢次 村上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Showa Denko Materials Co Ltd
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP34125191A priority Critical patent/JPH05175663A/en
Publication of JPH05175663A publication Critical patent/JPH05175663A/en
Pending legal-status Critical Current

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To reduce an external moise and a self noise with reference to a wiring at board and to increase an interconnection capacity. CONSTITUTION:In a multilayer wiring board, a power supply layer 1, a grounding layer 2 and pads 4 for component connection use exist on the same planes at outermost layers, two or more signal layers 3(a) to 3(d) exist in inner layers, buried holes 6(a), 6(b) which connect the inner layers are provided, and blind holes 5 which connect the land parts 4(a) at the outermost layers to the inner- layer signal layer 3(a) or 3(b) are provided.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、多層配線板に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer wiring board.

【0002】[0002]

【従来の技術】従来の多層配線板は、複数の信号層、電
源層又はグランド層をバイアホールで接続して構成され
る。近年、配線板に搭載される素子の高速化・低電圧化
に伴い配線板への外来ノイズ低減と自己ノイズ防止が信
頼性上特に重要となっている。この外来ノイズ、自己ノ
イズを低減するものとして、特開昭64−89585号
公報に示されているように、貫通したバイアホール付両
面配線板の両面に絶縁層を形成した後、導電性ペースト
と銅めっきで外層シールド層を形成した配線板がある。
2. Description of the Related Art A conventional multilayer wiring board is constructed by connecting a plurality of signal layers, power supply layers or ground layers with via holes. In recent years, reduction in external noise and prevention of self-noise on the wiring board have become particularly important in terms of reliability as the speed and the voltage of the elements mounted on the wiring board become higher. In order to reduce the external noise and the self-noise, as disclosed in Japanese Patent Laid-Open No. 64-89585, an insulating layer is formed on both sides of a penetrating double-sided wiring board with a via hole, and then a conductive paste is formed. There is a wiring board in which an outer shield layer is formed by copper plating.

【0003】[0003]

【発明が解決しようとする課題】特開昭64−8958
5号公報に示される方法は、多層配線板への外来ノイ
ズ、自己ノイズ低減効果は有するものの、シールド層と
シールド層の開口部に設けられた部品接続用ライドが同
一平面に存在しないため、シールド層自身を部品接続用
ランドとしにくく、また、内層とシールド層を接続する
開口部が必要であるため、多層配線板の配線収容量を多
くできないという問題点があった。本発明は、配線収容
量が多く、且つ外来ノイズ、自己ノイズ低減効果に優れ
る配線板を提供するものである。
Problems to be Solved by the Invention JP-A-64-8958
Although the method disclosed in Japanese Patent Publication No. 5 has the effect of reducing external noise and self-noise to the multilayer wiring board, the shield layer and the component connecting rides provided in the openings of the shield layer do not exist in the same plane, so that the shield is provided. There is a problem that it is difficult to use the layer itself as a land for component connection and an opening for connecting the inner layer and the shield layer is required, so that the wiring capacity of the multilayer wiring board cannot be increased. The present invention provides a wiring board that has a large amount of wiring accommodated and is excellent in the effect of reducing external noise and self-noise.

【0004】[0004]

【課題を解決するための手段】本発明を図1を用いて説
明する。本発明においては、電源層(1)とグランド層
(2)及び2層以上の信号層(3(a)〜3(d))を
有する多層配線板において、最外層(1又は2)が電源
層(1)とグランド層(2)と、この層と同一平面に形
成された部品接続パッド(4(a),4(b))からな
る。最外層(1又は2)は、いずれも電源層又はグラン
ド層であることが必要であるが、両方とも電源層又はグ
ランド層でもよい。最外層(1又は2)に、部品接続パ
ッド(4(a)又は4(b))が必要である。その位置
は少なくとも電源層又はグランド層と同一平面上であれ
ば任意でよく、また片方の面にのみ位置していてもよ
い。外層(1又は2)には、その他に信号層の一部を配
置してもよいが、全表面積の30%以上が電源層、グラ
ンド層で構成されていることが、ノイズ低減効果が高く
なるために好ましい。また全表面績の60%以上を電源
層、グランド層で構成すると、ノイズ低減効果を著しく
高くできるため特に好ましい。内層(3(a)〜3
(d))は信号層で構成されていることが必要であり、
配線密度を向上させるため、これら信号層間を接続する
ベリドホール(6(a)又は6(b))が存在すること
が望ましい。内層において、最外層(1又は2)に隣接
する内層(3(a)又は3(d))のいずれかは、信号
層を含むことが必要であるが、その他の内層は信号層で
も電源・グランド層でもよい。ベリドホールは6(a)
に示すように隣接する層間(例えば3(a)と3
(b))を接続するものでも、6(b)に示すように離
れた層間(例えば3(a)と3(d))を接続するもの
でもよい。最外層の部品接続用ランド部(4(a))と
内層信号層(3(a)〜3(d))を接続するブライン
ドホール(5)が必要である。このブライドホールは、
少なくとも最外層の部品接続用ランド部と接続する必要
があるが、その位置はランド上、ランド端部又はランド
外に電気的に接続された別ランド等任意の場所に形成し
てよい。但し、配線収容量を多くし、ノイズ低減のため
の外層電源、グランド又はランド部の面積を多くできる
ため、ランド上又はランド端部が好ましい。
The present invention will be described with reference to FIG. In the present invention, in a multilayer wiring board having a power supply layer (1), a ground layer (2), and two or more signal layers (3 (a) to 3 (d)), the outermost layer (1 or 2) is a power supply. It comprises a layer (1), a ground layer (2), and component connection pads (4 (a), 4 (b)) formed on the same plane as this layer. Both outermost layers (1 or 2) need to be power supply layers or ground layers, but both may be power supply layers or ground layers. Component connection pads (4 (a) or 4 (b)) are required in the outermost layer (1 or 2). The position may be any position as long as it is on the same plane as at least the power supply layer or the ground layer, and may be located only on one side. A part of the signal layer may be arranged in the outer layer (1 or 2), but the noise reduction effect is enhanced when 30% or more of the total surface area is composed of the power supply layer and the ground layer. Preferred for. Further, it is particularly preferable that 60% or more of the total surface quality is constituted by the power supply layer and the ground layer, because the noise reduction effect can be remarkably enhanced. Inner layer (3 (a) -3
(D)) needs to be composed of a signal layer,
In order to improve the wiring density, it is desirable that there is a buried hole (6 (a) or 6 (b)) connecting these signal layers. In the inner layer, one of the inner layers (3 (a) or 3 (d)) adjacent to the outermost layer (1 or 2) needs to include a signal layer, but the other inner layers include a signal layer and a power source. It may be the ground layer. Berido Hall is 6 (a)
As shown in FIG.
(B)) may be connected, or separate layers (for example, 3 (a) and 3 (d)) may be connected as shown in 6 (b). A blind hole (5) for connecting the outermost component connecting land (4 (a)) and the inner signal layer (3 (a) to 3 (d)) is required. This bridehole is
It is necessary to connect to at least the outermost layer component connecting land portion, but the position may be formed on the land, at an end portion of the land, or another land electrically connected to the outside of the land. However, since the wiring accommodation amount can be increased and the area of the outer layer power supply, the ground, or the land portion for noise reduction can be increased, it is preferable to be on the land or at the land end portion.

【0005】[0005]

【作用】本発明においては、最外層に電源又はグランド
を配置したため、特開昭64−89585公報に示され
ると同様にノイズを低減できる共に、部品接続用ランド
と電源又はグランド層が同一平面上にあるため、電源又
はグランド層自身を部品接続用ランドとしても利用でき
るため、配線収容量を多くできる。また、特開昭64−
89585公報に必要であった内層とシールド層を接続
する開口部が必要なくなるため、配線収容量を多くでき
る。
In the present invention, since the power source or the ground is arranged in the outermost layer, noise can be reduced in the same manner as shown in Japanese Patent Laid-Open No. 64-89585, and the component connecting land and the power source or the ground layer are on the same plane. Therefore, since the power supply or the ground layer itself can be used as a land for connecting components, it is possible to increase the wiring accommodation amount. In addition, JP-A-64-
Since the opening for connecting the inner layer and the shield layer, which is required in Japanese Patent Publication No. 89585, is not necessary, the amount of wiring accommodated can be increased.

【0006】[0006]

【実施例】本発明の配線板の一実施例を、製造方法の一
例を含めて説明する。まず、0.2mm厚のMCL−E
−67(ガラス布・エポキシ銅張積層板、日立化成工業
(株)商品名)に常法の穴あけ、20μmの銅めっき、
エッチングレジスト形成、エッチングを行い、所望パタ
ーンのスルーホール付両面配線板(図1,3(a),3
(b)層)を得た。同一方法で(図1,3(c),3
(d)層となる)もう一枚の両面配線板を得た。これら
2板の両配線板の間と上下にGE−67N(ガラス布・
エポキシプリプレグ)を配し、その上下に18μm銅箔
を配し、常法の加熱・加圧プレスすることで、多層化接
着した。その後、常法のドリル加工を用いてブラインド
ホール用非貫通穴(5)とスルーホール用貫通穴(7)
を加工した。最後に、常法の30μm銅めっき、エッチ
ングレジスト形成、エッチングを行い、本発明の構造を
有する多層配線板を得た。この際の外層(電源、グラン
ド、パッド)はそれぞれの面で同一平面上に形成され、
その厚みは55μmであった。内層は3(a)〜3
(d)の計4層の信号層からなり、この厚みはいずれも
35μmであった。層間を接続するホールは、3(a)
と3(b)層を接続するベリドホール6(a),3
(c)と3(d)層を接続するベリドホール6(a),
4(a)と3(b)層を接続するブラインドホール5,
4(a)と3(d)を接続するブラインドホール5、全
層を貫通するスルーホール7からなる。本発明の多層配
線板の内層信号層数と外層シールド率(*1)を変えた
際の配線収容量とノイズレベルを従来法多層配線板と比
較して表1に示す。
EXAMPLES An example of a wiring board of the present invention will be described including an example of a manufacturing method. First, 0.2 mm thick MCL-E
-67 (Glass cloth / epoxy copper clad laminate, Hitachi Chemical Co., Ltd. product name), conventional drilling, 20 μm copper plating,
An etching resist is formed and etching is performed to form a double-sided wiring board with through holes having a desired pattern (see FIGS. 1, 3 (a), 3).
(B) layer) was obtained. In the same way (Fig. 1, 3 (c), 3
Another double-sided wiring board (to be the layer (d)) was obtained. The GE-67N (glass cloth /
Epoxy prepreg) was placed, and 18 μm copper foils were placed on the top and bottom of the epoxy prepreg, and the layers were adhered in a multilayer manner by heating / pressing in a conventional manner. After that, blind hole non-through holes (5) and through hole through holes (7) are formed by using a conventional drilling process.
Was processed. Finally, conventional 30 μm copper plating, etching resist formation and etching were performed to obtain a multilayer wiring board having the structure of the present invention. The outer layers (power supply, ground, pads) at this time are formed on the same plane on each surface,
Its thickness was 55 μm. Inner layer is 3 (a) -3
It was composed of a total of 4 signal layers of (d), and each had a thickness of 35 μm. The hole connecting the layers is 3 (a)
And the berid holes 6 (a), 3 connecting the layers 3 and 3 (b)
The buried holes 6 (a) connecting the layers (c) and 3 (d),
Blind hole 5 connecting layers 4 (a) and 3 (b)
It comprises a blind hole 5 connecting 4 (a) and 3 (d) and a through hole 7 penetrating all layers. Table 1 shows the wiring capacity and the noise level when the number of inner signal layers and the outer layer shield ratio (* 1) of the multilayer wiring board of the present invention are changed in comparison with the conventional multilayer wiring board.

【0007】[0007]

【表1】 (*1)外層シールド率は外層の電源層、グランド層の面
積を外層全面積で除した値(%)
[Table 1] (* 1) The outer layer shield ratio is the value obtained by dividing the area of the outer power layer and the ground layer by the total area of the outer layer (%).

【0008】[0008]

【発明の効果】以上に説明したように、本発明によっ
て、配線収容量が多く、且つ外来ノイズ、自己ノイズ低
減効果に優れる配線板を提供することができる。
As described above, according to the present invention, it is possible to provide a wiring board which has a large amount of wiring accommodated and is excellent in the effect of reducing external noise and self-noise.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例を示す多層配線板の断面図で
ある。
FIG. 1 is a cross-sectional view of a multilayer wiring board showing an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1 電源層 2 グランド層 3 信号層 4 部品接続用ラ
ンド 5 ブラインドホール 6 ベリドホール 7 スルーホール
1 Power Layer 2 Ground Layer 3 Signal Layer 4 Component Connection Land 5 Blind Hole 6 Verid Hole 7 Through Hole

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】電源層とグランド層及び2層以上の信号層
を有する多層配線板において、最外層が電源層又はグラ
ンド層とこの層と同一平面に形成された部品接続用ラン
ドからなり、内層が信号層からなり、且つ最外層のラン
ド部と内層信号層を接続するブラインドホールを有する
ことを特徴とする多層配線板。
1. A multilayer wiring board having a power supply layer, a ground layer, and two or more signal layers, wherein the outermost layer is composed of a power supply layer or a ground layer and a component connection land formed on the same plane as this layer, and an inner layer. Is a signal layer, and has a blind hole connecting the outermost land portion and the inner signal layer.
【請求項2】前記内層の信号層が2層以上存在し、且つ
これら信号層間を接続するベリドホールを有することを
特徴とする請求項1に記載の多層配線板。
2. The multilayer wiring board according to claim 1, wherein the signal layer of the inner layer is present in two or more layers and has a buried hole connecting the signal layers.
JP34125191A 1991-12-24 1991-12-24 Multilayer wiring board Pending JPH05175663A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP34125191A JPH05175663A (en) 1991-12-24 1991-12-24 Multilayer wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP34125191A JPH05175663A (en) 1991-12-24 1991-12-24 Multilayer wiring board

Publications (1)

Publication Number Publication Date
JPH05175663A true JPH05175663A (en) 1993-07-13

Family

ID=18344586

Family Applications (1)

Application Number Title Priority Date Filing Date
JP34125191A Pending JPH05175663A (en) 1991-12-24 1991-12-24 Multilayer wiring board

Country Status (1)

Country Link
JP (1) JPH05175663A (en)

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