JPH05175535A - Optical semiconductor device using quantized silicon - Google Patents

Abstract

PURPOSE:To quantize an energy level for vertical transition of carriers by providing an active silicon region between p-type and n-type silicon regions. CONSTITUTION:A thin layer 5 is formed of undoped single-crystal silicon. An n-type electrode 3 is formed on an n-type region 1, and a p-type electrode 4 with a window 8 in its center is formed on a p-type region 2. Light passes through the window 8, the p-type region 2, a thin SiO2 film 7, a thin Si film 5, and a thin SiO2 film 6 to the n-type region 1. A bias source 9 is connected at its positive end to the n-type electrode 3 and at its negative end to the p-type electrode 3 through a load resistor R so that the p-n junction can be reverse- biased. In response to light of a given wavelength through the window, electron- hole pairs are produced and thus a photocurrent flows across the p-n junction. The undoped silicon layer 5 provides quantum wells.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to an optical semiconductor device using Si.

[0002]

2. Description of the Related Art Si is an indirect transition type semiconductor and is used as a light receiving element such as a photodiode or a phototransistor, but it is not easy to cause radiative recombination and most of it is used as a light emitting element. It has not been.

FIG. 2 shows an example of the structure of a Si photodiode according to the prior art. A p-type Si layer 2 is formed on the n-type Si substrate 1 to form a diode. An n-side electrode 3 is formed on the surface of the n-type Si substrate 1, and a p-side electrode 4 having a window region 8 is formed on the surface of the p-type Si layer 2.

In the diode structure thus formed,
When the reverse bias voltage is applied from the bias source 9, no current flows in that state. By the way, when light hν having an energy of a certain level or more is incident on the window region 8, electron-hole pairs are generated in the silicon region, and electrons flow to the n-type region 1 according to the reverse bias voltage applied to the pn junction, The holes flow into the p-type region 2. That is, a current proportional to the amount of light flows only when light is incident.

Although the structure in which the n-type region 1 and the p-type region 2 are laminated is shown, in many actual semiconductor devices,
A photodiode structure is formed by selectively forming a p-type region on the surface of the n-type region.

As an optical semiconductor device having a light emitting function,
A compound semiconductor having a direct transition type energy gap such as III-V group and II-VI group has been mainly used. By the way, in recent years, studies have been conducted to develop a new functional device by modifying the physical properties of the matrix by using a superlattice structure or the like.
If the degree of freedom of carriers in the semiconductor is limited, new physical properties will occur. For example, a two-dimensional carrier is formed when the degree of freedom of the carrier is made into a planar two-dimensional state by a quantum well layer or the like.

Even in the plane, if the degree of freedom in one direction is further restricted to form a quantum wire, a one-dimensional carrier is realized, and if the degree of freedom in all directions is restricted to form a quantum box, it becomes 0-dimensional. Carrier is realized.

In these quantized states, carriers are no longer in the bulk state, and the band structure is changed to the quantum level. A resonant tunnel diode has a structure in which a quantum well layer sandwiched between tunnel barrier layers is inserted between an anode and a cathode,
The characteristics of realizing negative resistance and the like by utilizing discrete quantum levels in the quantum well layer are shown.

[0009]

The research of functional devices in which the state of carriers in a semiconductor is quantized is being advanced.
Conventionally, the target characteristics have been electrical characteristics. Also,
The semiconductor material was a compound semiconductor such as a III-V group compound semiconductor.

An object of the present invention is to provide a quantized Si optical semiconductor device having a novel mechanism. Another object of the present invention is to quantize S having a Si region capable of direct transition.
It is to provide an i-optical semiconductor device.

[0011]

A quantized Si optical semiconductor device according to the present invention comprises an active Si region having a quantized level, an insulator region surrounding the active Si region, and one of the insulator regions. A p-type Si region arranged on the side, an n-type Si region arranged on the other side of the insulator region, and a window region formed near the active Si region.

[0012]

In the active Si region, the carriers have quantized levels, so that the interband transition changes to an interlevel transition. No wave vector is required for level-to-level transitions, and all transitions are direct transitions. P through the insulator area
By sandwiching the active Si region between the type Si region and the n-type Si region, carriers can be injected into the active Si region by tunneling. The carriers injected into the active Si region can perform radiative recombination.

[0013]

FIG. 1 shows a photodiode according to an embodiment of the present invention. On the n-type region 1 made of n-type polycrystalline silicon (Si), a Si thin layer 5 made of single crystal Si having a thickness of about 100 Å is interposed via a SiO ₂ thin layer 6 having a thickness of about 50 Å. A p-type Si region 2 formed of p-type polycrystalline Si is formed on the SiO ₂ thin layer 7 having a thickness of about 50Å.

The Si thin layer 5 is formed of a non-doped single crystal. An n-side electrode 3 is formed on the n-type region 1,
On the surface of the p-side region 2, a window region 8 is opened in the center p
The side electrode 4 is formed.

Light incident from the right side of the figure passes through the window region 8 and the p-side region 2, the SiO ₂ thin layer 7, the Si thin layer 5, and the SiO 2.
_{2 The} light can enter the thin layer 6 and the n-side region 1. The positive electrode of the bias source 9 is connected to the n-side electrode 3 via the load resistor R, the negative electrode is connected to the p-side electrode 4, and a reverse bias voltage is applied to the pn junction.

When a reverse bias voltage is applied,
When light of a certain wavelength or less enters from the window region 8, electron-hole pairs are generated and a photocurrent flows through the pn junction. It should be noted that the amount of incident light can be known by measuring the voltage generated across the load resistance R by this photocurrent.

The operation of the photodiode shown in FIG.
The band structure will be described with reference to FIG. In the structure shown in FIG. 1, a thin Si layer 5 sandwiched between insulators is inserted between an n-type region 1 and a p-type region 2. A band structure having this structure is shown in FIG. In the SiO ₂ thin layers 6 and 7 which are insulators, the band gap is wide and a potential barrier against electrons and holes is formed. Due to these potential barriers, carriers in the Si thin layer 5 are n-type region 1 and p-type region 2
Separated from.

Since the thickness of the Si thin layer 5 is as thin as about 100Å, the energy state in the Si thin layer 5 is quantized, and the level Lc is generated in the conductor and the level Lv is generated in the valence band. These levels are generally in a higher energy state than the bottom of the bulk band.

FIG. 3B shows a band structure in the state where a reverse bias voltage is applied to the structure of FIG. A positive voltage is applied to the n-type region 1, and the level of the n-type region 1 is pushed down in the figure.

Although the n-type region 1, the p-type region 2 and the non-doped region 5 are all made of Si, the non-doped Si thin layer 5 becomes a quantum well layer and its energy state is at a level. Therefore, the wavelength dependence of the absorption coefficient for the level-to-level transition is extremely sharp.

Therefore, when light having an energy corresponding to that level is incident, the Si thin layer 5 strongly absorbs and generates a carrier pair. In these carrier pairs, electrons are n-type region 1
In addition, the holes are transported through the SiO ₂ thin layers 6 and 7 to the p-type region 2 by tunneling, and generate photocurrent. When the wavelength of the incident light changes, the energy difference between the levels does not match and the absorption decreases rapidly.

FIG. 4 shows a light emitting diode according to another embodiment of the present invention. FIG. 4A shows the configuration, and FIG. 4B is a band diagram for explaining the operation.
Similar to the photodiode of FIG. 1, a Si thin layer 5 sandwiched between SiO ₂ thin layers 6 and 7 is inserted between an n-type region 1 and a p-type region 2. The thin Si layer 5 has a thickness of, for example, about 100.
The Å non-doped single crystal Si layer, and the SiO ₂ thin layers 6 and 7 each have a thickness of, for example, about 50 Å.
In addition, the n-side region 3, the p-type region 2, the n-side electrode 3,
The point to which the p-side electrode 4 is connected is also the same as in FIG.

The bias source 9a has its positive electrode connected to the p-side electrode 4
, And its negative electrode is connected to the n-side electrode 3. A load resistor R is inserted in the current path. In this configuration, a forward bias voltage is applied to the diode structure from the bias source 9a.

FIG. 4B shows the band structure of the diode in the state where such forward bias is applied. n-type region 1
When a negative voltage is applied to, the level is raised upward in the figure. Therefore, the electrons in the n-type region 1 have a level equal to the level Lc in the Si thin layer 5, and the n-type region 1
Thus, electrons can be tunneled into the Si thin layer 5. Also,
Holes can be tunneled from the p-type region 2 into the Si thin layer 5.

In the Si thin layer 5, radiative recombination is performed from the conduction band level Lc to the valence band level Lv, and light hν is generated. This light is emitted to the outside from the window region 8 opened in the p-side electrode 4. It is possible to emit light having a narrow wavelength region width corresponding to the energy between levels.

In the embodiment described above, the Si thin layer 5 is formed of a single crystal, and the carrier state is quantized by reducing the thickness thereof. By making a transition involving this quantized level, the detection of light,
Light is generated. By using a single crystal, it is possible to obtain a region in the crystal where the quantization levels are uniform.

A manufacturing method for producing such a diode structure will be described with reference to FIGS. First, FIG. 5 (A)
First, as shown in FIG.
A high-concentration Si substrate 11 including 2 is prepared. For example,
The Si substrate 11 is an n ⁺ type which is heavily doped with n-type impurities.

An oxide film 13 and a nitride film 14 are laminated on the surface of the non-doped Si epitaxial layer 12, and other portions are patterned and removed except the element region. Next, an oxidation process is performed using the nitride film 14 as a mask to form a LOCOS region 15 which is an oxide film having a desired thickness in the exposed region. After this LOCOS process, the nitride film 14 and the oxide film 13 used as the mask are removed.

Next, as shown in FIG. 5B, a SiO ₂ layer 17 is further laminated on the surface by CVD, a photoresist layer is formed on the surface, and patterning is performed to form a photoresist mask.

The recess 18 is formed by etching the SiO ₂ layer using a photoresist mask.
The etching is continued until the non-doped Si epitaxial layer 12 appears.

After the non-doped Si epitaxial layer 12 is exposed, the etching is stopped and the photoresist mask is removed. Then, the non-doped Si epitaxial layer 1
The surface of 2 is lightly oxidized, and a SiO ₂ thin layer 2 with a thickness of about 50Å
Form 0. After that, the recess 18 is filled in, an n-type polycrystalline Si layer 19 is deposited, and polishing is performed to form a flat surface.

Next, another Si substrate 21 having an oxide film 22 formed on one surface is prepared. Since this Si substrate plays a role of physical support, it may be p-type or n-type. Figure 6
As shown in (C), another oxide film 22 on the Si substrate 21 is formed.
And the polycrystalline Si layer 19 of the Si substrate shown in FIG. 5B are overlapped, and the two substrates are bonded at a predetermined temperature. For example, the bonding step may be performed at about 950 ° C. for about 20 minutes.

After the bonding, the bonded structure as shown in FIG. 5C is polished from the lower side. FIG. 6A is the same as FIG.
The state where the bonded substrate shown in (C) is inverted and polished from above is shown.

The n ⁺ Si substrate 11 can be easily removed by etching by using the difference in impurity concentration, and then the non-doped Si epitaxial layer 12 is polished to a desired thickness. For example, the thickness is set so that a single crystal Si layer of about 100 Å remains in the end.

As shown in FIG. 6B, S is formed by CVD.
An iO ₂ layer 24 is deposited and the recess 2 is formed by photolithography.
5 is formed to expose the non-doped Si epitaxial layer 12.

The exposed surface of the non-doped Si epitaxial layer 12 is oxidized to form a thin SiO ₂ layer 2 having a thickness of about 50Å.
6 is formed. In this state, the non-doped Si epitaxial layer 12 has a thickness of about 100Å, and both sides thereof are sandwiched between the SiO ₂ thin layers 20 and 26 having a thickness of about 50Å.

Then, as shown in FIG. 6C, SiO ₂
A p-type polycrystalline Si layer 28 is deposited on the surface of the thin layer 26, patterned, covered with the surface, and further Si is deposited by CVD.
An O ₂ layer 31 is formed, and a contact portion is opened by photolithography. After that, by depositing an electrode metal layer and patterning by photolithography,
The anode electrode 32 and the cathode electrode 33 are formed.

According to such a manufacturing method, a predetermined thickness
The single crystal Si thin layer has a predetermined thickness of SiO. ₂Sandwiched by thin layers
In addition, it has a certain conductivity and conductivity on both sides.
Obtaining a diode structure in which a crystalline silicon layer is arranged
You can

In the step of FIG. 5B, instead of forming the n-type polycrystalline Si layer 19, if a Si single crystal substrate is directly attached to the surface, one region of the diode becomes single crystal Si. ..

The Si region sandwiched by the thin insulating layers has a sharper level and sharper wavelength selectivity when formed of a single crystal, but it is not always required to be formed of a single crystal. FIG. 7 schematically shows a photodiode structure according to another embodiment of the present invention. A SiO ₂ thin layer 42 having a thickness of, for example, about 50 Å is deposited on the surface of the single crystal p-type Si substrate 41, and a non-doped polycrystalline Si thin layer 43 is formed thereon by CVD or the like.

On the surface of the polycrystalline Si thin layer 43, a thickness of about 50Å
A thin SiO ₂ layer 44 is formed. In this state, the Si thin layer 43 has a thickness of about 100 Å. Although the SiO ₂ thin layers 42 and 44 can be formed by CVD or the like, it is preferable to form them by thermal oxidation.

An n-type polycrystalline Si layer 45 is further deposited on the surface of the SiO ₂ thin layer 44 to form a pn junction structure with a quantum well layer sandwiched therebetween. Then, a p-side electrode 47 is formed on the surface of the p-type Si substrate 41, and an n-side electrode 48 is formed on the surface of the n-type polycrystalline Si layer 45 to form a diode structure. A window region 49 is formed by patterning and removing a predetermined region of the n-side electrode 48 by photolithography.

When a reverse bias voltage is applied between the p-side electrode 47 and the n-side electrode 48, a photodiode as a light receiving element is formed, and when a forward bias voltage is applied, a light emitting diode is formed.

In this embodiment, Si which becomes the active region is formed.
Since the thin layer 43 is made of polycrystal, the quantization level varies, but the manufacturing process thereof is easier than when a single crystal Si active layer is used.

At the stage of forming the polycrystalline Si thin layer 43, the polycrystalline Si thin layer 4 is formed by oxygen ion implantation or the like.
Quantum wires and quantum boxes can also be formed by selectively oxidizing 3 to leave a linear or dot-shaped semiconductor region.

By the same means, the active layer of the diode shown in FIGS. 1 and 4 can be made into a quantum wire or a quantum box. FIG. 8 shows a semiconductor laser according to another embodiment of the present invention. FIG. 8A shows a structure and FIG. 8B shows a light absorption spectrum of silicon for explaining the operation.

FIG. 8B shows the optical absorption spectrum of silicon. The horizontal axis represents the photon energy in eV, and the vertical axis represents the absorption coefficient (cm ⁻¹ ). In the figure, ◯ indicates an absorption coefficient of 300K, and ● indicates an absorption coefficient of 77K.

Silicon is an indirect transition semiconductor, and its absorption coefficient near the band edge rises relatively gently. Therefore, the absorption coefficient is relatively small for light having an energy of about 1.5 eV or less.

For example, for 1.2 eV light, the absorption coefficient is about 15 cm ^-1 . Therefore, it is also possible to cause laser oscillation by quantizing the state of carriers in silicon, causing radiative recombination with a level difference of about 1.5 eV or less, and making light reciprocate in the cavity.

Further, even for light having an energy of 1.5 eV or more, laser oscillation can be realized by changing the length of the resonator in consideration of the loss due to absorption or the like. FIG. 8A shows a structure of a semiconductor laser using such silicon. SiO on the n-type Si region 51
_The Si thin layer 55 sandwiched between the _two thin layers 56 and 57 is arranged, and the p-type Si region 52 is arranged thereon to form a pn diode structure. This pn diode structure is similar to that of the above-mentioned embodiment.

An n-side electrode 53 is formed on the surface of the n-type Si region 51, and a p-side electrode 54 is formed on the surface of the p-side Si region 52. In the present embodiment, since light is emitted from the end face, it is not necessary to form openings in these p-side electrode 54 and n-side electrode 53 to form a window region.

In order to reflect light, the two end faces 58a, 58b of the diode structure are mirrored surfaces parallel to each other.
Therefore, the diode structure is sandwiched between the pair of mirror surfaces. A forward bias voltage is applied from the bias source 59 between the p-side electrode 54 and the n-side electrode 53.

By the forward bias voltage, the p-side Si region 5
2. When carriers are injected from the n-side Si region 51 into the Si thin layer 55 and radiative recombination occurs in the Si thin layer 55, the generated light is amplified while reciprocating between the mirror surfaces 58a and 58b. A part of the amplified light is emitted to the outside from the mirror surface 58a. In this way, the laser light 60 is obtained.

The Si thin layer 55 serving as an active layer is, for example, a non-doped layer having a thickness of about 100Å, and the SiO ₂ thin layers arranged on both sides thereof have a thickness of about 50Å. Also,
The mirror surface of the resonator can be formed, for example, by utilizing the (111) plane of the crystal and etching with a KOH solution. Further, the mirror surface of the resonator may not be formed by the surface of the semiconductor, but a mirror formed separately may be arranged outside. In this case, it is preferable that the end face of the semiconductor be antireflection.

Further, in order to increase the current density injected into the active layer, the shape of the Si thin layer may be patterned to have an elongated shape with a width of several nm and a length of several hundred nm.

In FIG. 9, 61 is a Si substrate and 62 is an S substrate.
iO ₂ region, 63 is n-type poly-Si region, 64 and 66 are S
iO ₂ thin layer, 65 is a Si thin layer, 67 is a p-type poly-Si region, and 68 is a SiO ₂ region.

The formation of this shape can be realized by using a technique such as EB exposure when forming the element region in FIG. For example, when the width is 5 μm and the length is 200 μm, a current density of 10 ⁵ Å / cm ² which is sufficiently large for laser oscillation can be obtained. Further, as shown in FIG. 9, by forming a plurality of thin plate-shaped Si thin layers by patterning, the density of the active layer can be increased.

In the above embodiments, the structure in which one Si quantum well layer having a quantized level is used has been described, but a structure in which a plurality of Si quantum well layers are laminated can also be used. When using a plurality of quantum well layers, it is necessary to interpose a potential barrier layer formed of an insulator or the like between them.

When the optical semiconductor device is made of Si, the optical integrated circuit can be easily formed. For example, in Figure 1,
In the structure shown in FIGS. 4 and 8, the Si thin layer is extended,
An integrated circuit device can be formed by incorporating various semiconductor elements.

Further, as shown in FIG. 7, in a structure using a single crystal substrate, various semiconductor elements can be formed on the surface of the substrate to easily form an integrated circuit. As described above, by forming the light receiving or light emitting diode on the same Si substrate as the other Si devices, it is possible to provide the Si integrated circuit device in which the signal transmission between the devices using light is easy.

The present invention has been described above with reference to the embodiments.
The present invention is not limited to these. For example,
It will be apparent to those skilled in the art that various modifications, improvements, combinations and the like can be made.

[0062]

As described above, according to the present invention,
By using the Si region having a physically limited dimension, a high-efficiency Si optical semiconductor device that quantizes the energy level and causes carriers to make a vertical transition is provided.

[Brief description of drawings]

FIG. 1 is a perspective view showing a photodiode according to an embodiment of the present invention.

FIG. 2 is a perspective view showing a configuration example of a photodiode according to a conventional technique.

3 is a diagram showing a band structure of the photodiode shown in FIG. 1. FIG.

FIG. 4 is a perspective view showing a light emitting diode according to an embodiment of the present invention and a diagram showing a band structure.

FIG. 5 is a cross-sectional view showing a manufacturing method for manufacturing a diode structure according to an embodiment of the present invention.

FIG. 6 is a cross-sectional view showing a manufacturing method for manufacturing a diode structure according to an embodiment of the present invention.

FIG. 7 is a sectional view showing a diode structure according to an embodiment of the present invention.

FIG. 8 is a perspective view showing a semiconductor laser according to an example of the present invention and an optical absorption spectrum of silicon.

FIG. 9 is a perspective view showing a semiconductor laser according to another embodiment of the present invention.

[Explanation of symbols]

1 n-type region 2 p-type region 3 n-side electrode 4 p-side electrode 5 Si thin layer 6, 7 SiO ₂ thin layer 8 window region 9 bias source 11 high-concentration Si substrate 12 non-doped Si epitaxial layer 13 oxide film 14 nitride film 15 LOCOS region 17 CVD SiO ₂ layer 18 recess 19 n-type poly Si layer 20 SiO ₂ thin layer 21 Si substrate 22 oxide film 24 CVDSiO ₂ layer 25 recess 26 SiO ₂ thin layer 28 p-type poly Si layer 31 CVDSiO ₂ layer 32 anode electrode 33 Cathode electrode 41 p-type Si substrate 42, 44 SiO ₂ thin layer 43 poly Si thin layer 45 n-type poly Si layer 47 p-side electrode 48 n-side electrode 49 window region 51 n-type Si region 52 p-type Si region 53 n-side electrode 54 p-side electrode 55 Si thin layer 56, 57 SiO ₂ thin layer 58 mirror 59 bias source 61 Si substrate 62 Si ₂ region 63 n-type poly-Si region 64, 66 SiO ₂ thin layer 65 Si thin layer 67 p-type poly-Si region 68 SiO ₂ region

Claims (4)

[Claims] 1. An active Si region (5) having a quantized level and an insulator region (6, 7) surrounding the active Si region (5).
A p-type Si region (2) arranged on one side of the insulator region (6, 7) and an n-type Si region (2) arranged on the other side of the insulator region (6, 7). 1) and a quantized Si optical semiconductor device having a window region (8) formed near the active Si region. 2. The p-type Si region (2) and the n-type
The quantized Si optical semiconductor device according to claim 1, further comprising a power source (9) connected to the type Si region (1) and capable of applying a reverse bias voltage. 3. The p-type Si region (2) and the n-type
The quantized Si optical semiconductor device according to claim 1, further comprising a power supply (9) connected to the type Si region (1) and capable of applying a forward bias voltage. 4. The quantized Si optical semiconductor device according to claim 3, further comprising a resonance structure capable of reciprocating light.