JPH05168038A - Recording and reproducing device - Google Patents

Abstract

PURPOSE:To record a standard television signal without any exclusive converter by using a field memory for time division multiplexing also as a memory for signal conversion to convert the standard television signal to a high fidelity television signal. CONSTITUTION:A color difference signal PB and a luminance signal PR constituting a high fidelity television signal are supplied to a time division multiplexing circuit, a recorded signal of a multi-channel is formed, and address controllers 75 and 76 for write and read to a field memory 73 for time division multiplexing are controlled corresponding to the kind of a television signal to be inputted. Namely, when the standard television signal is inputted, a write clock corresponding to a field frequency is generated and a write processing is executed. Concerning a read clock, reading is executed by a clock corresponding to the field frequency for a high fidelity television signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a recording / reproducing apparatus suitable for application to a high-definition analog VTR or the like, and more particularly to a recording / reproducing apparatus capable of converting a standard television signal into a high-definition signal for recording.

[0002]

2. Description of the Related Art In a magnetic recording / reproducing apparatus such as an analog VTR for high-definition, a standard definition television signal (for example, NTSC television signal) can be recorded / reproduced in addition to a high-definition high-definition signal. It has been known.

FIG. 5 is a conceptual diagram showing an example of a recording / reproducing system used in that case, which is composed of a recording circuit REC and a reproducing circuit PB. There are two recording channels.

In the recording circuit REC, the high-definition signal HD is directly supplied to the recording system 10R and two-channel recording signals SA and SB are formed. One of the recording signals of the two channels is a color difference signal PB that is time-axis compressed.
Is a multiplex signal multiplexed with the luminance signal, and the other recording signal is a multiplex signal with the time-axis-compressed color difference signal PR multiplexed with the luminance signal.

On the other hand, the standard television signal N
The TSC is once supplied to the NTSC-HD converter 80, and the signal form thereof is changed to a high definition television signal HD (NTSC), and then supplied to the recording system 10R. Then, the recording signals of the same two channels as described above are formed in the recording system 10R.

The reproducing circuit PB has the same structure, and the reproduced recording signals SA and SB are subjected to conversion processing opposite to the recording processing in the reproducing system 10P, and the high-definition signal is output as it is. Converted television signal HD (NTS
C) is inversely converted by the converter 81 and the standard television signal NTSC is output.

[0007]

As described above, in order to record and reproduce the standard television signal NTSC in addition to the high-definition signal HD, the standard television signal NTSC is converted into the high-definition signal HD. Since the converters 80 and 81 are required, the circuit scale is increased and the cost is increased.

Therefore, the present invention solves such a conventional problem and proposes a recording / reproducing apparatus capable of recording the standard television signal NTSC without using a dedicated converter for system conversion. To do.

[0009]

In order to solve the above-mentioned problems, according to the present invention, there is provided a recording / reproducing apparatus for digitally performing time-division multiplexing processing on a luminance signal and a chrominance signal to perform multi-channel recording. In the invention of 1,
A pair of color difference signals and luminance signals that form a high-definition signal are supplied to a time division multiplexing circuit to form a multi-channel recording signal, and a field memory for time division multiplexing provided in this time division multiplexing circuit It is characterized in that it is also configured to be used as a signal conversion memory for converting a standard television signal into a high-definition signal.

According to a second aspect of the invention, a pair of color difference signals and a luminance signal forming a high-definition signal are supplied to a time division multiplexing circuit to form a multi-channel recording signal, and the time division multiplexing circuit provided in this time division multiplexing circuit. The field memory for multiplexing is configured to be used also as a signal conversion memory for converting a standard television signal into a high-definition signal, and the discrimination information of the interpolated field interpolated during the signal conversion processing is time-divided. It is characterized in that it is adapted to be inserted into a multiplexed recording signal.

[0011]

In the time division multiplexing circuit 11 shown in FIG. 2, the address controller 7 for writing and reading to and from the field memory 73 used for the time division multiplexing processing.
The control is performed according to the type of television signal input by 5, and 76.

That is, when the high-definition signal HD is used, a write clock and a read clock corresponding to a field frequency of 60.00 Hz are generated and writing and reading are performed.

On the other hand, the standard television signal N
When TSC input, its field frequency 5
A write clock corresponding to 9.94 Hz is generated,
This completes the writing process. Then, the read clock is read by a clock corresponding to the field frequency for the high-definition signal. By doing so, the standard television signal NTSC can be converted into the high-definition signal HD (NTSC) and output.

When the standard television signal NTSC is converted into a high-definition signal HD (NTSC), field interpolation processing is performed at the time of recording due to the difference in field frequency, and thinning processing of the interpolated field is performed at the time of reproduction. At this time, a field discrimination signal indicating which field has been subjected to the interpolation processing is added to the recording signal, and during reproduction, the thinning-out processing of the field is performed based on this field discrimination signal.

Then, the interpolated fields can be reliably thinned out. This is because thinning out different fields results in an unnatural playback screen.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an example of a recording / reproducing apparatus according to the present invention will be described in detail with reference to the drawings when applied to the above-mentioned magnetic recording / reproducing apparatus.

FIG. 1 shows an example of the present invention, and is a system diagram showing an example of an analog VTR configured to record and reproduce a high-definition signal HD, and a 2-channel recording system is adopted. In the figure, 10R
Indicates the recording system and 10P indicates the reproducing system. Recording system 1
It will be described from 0R.

The luminance signal Y and the pair of color difference signals PB (=
B-Y) and PR (= RY) are band-limited by low-pass filters 1, 2 and 3, respectively, and then A / D converters 4, 5 and 5.
It is converted into a digital signal by 6. The digitized luminance signal Y and the pair of color difference signals PB and PR are supplied to the vertical non-linear emphasis circuits 7, 8 and 9, respectively, to emphasize the edges in the vertical direction and to increase the luminance level. Has a non-linear characteristic such that the edges are not emphasized too much.

Vertical non-linear emphasis circuits 7, 8,
After the vertical emphasis processing is performed by 9, the horizontal non-linear emphasis circuit 16, 17, 2
It is supplied to 6 and the emphasis processing in the horizontal direction is performed.

The emphasis processed luminance signal Y and the pair of color difference signals PB and PR are subjected to time division compression multiplexing processing and shuffling processing in a time division multiplexing circuit (TDM circuit) 11 having a shuffling function. That is, the color difference signals are compressed, and a pair of color difference signals are line-sequentially multiplexed with the luminance signal Y.

When two channels of video signals are recorded,
For example, in the A channel, the color difference signal PB is compressed on the time axis to form a compressed color difference signal, and this and the luminance signal Y are line-sequentially time division multiplexed to generate a video signal. In the B channel, the color difference signal PR is time-axis compressed to form a compressed color difference signal, and this and the luminance signal Y are line-sequentially line-sequentially time-axis multiplexed to generate a video signal. Then, shuffling processing is performed on each channel. Reference numeral 12 is a clock generation circuit for generating various clocks used in the recording system 10R.

The video signals SA and SB which have been subjected to the time division multiplexing process and the shuffling process are added with the synchronizing signal and the burst signal output from the signal generating circuit 13, and in that state, the D / A converter 14, At 15, it is converted to an analog signal.

The analog video signals SA and SB are band-limited by the low-pass filters 18 and 19 and then supplied to the linear horizontal emphasis circuits 20 and 21 composed of CR circuits.

As the horizontal emphasis circuits, the horizontal non-linear emphasis circuits 16, 17, 26 and the linear horizontal emphasis circuits 20, 21 are provided because only the linear horizontal emphasis circuits 20, 21 provide a flat screen (when the amplitude is small). Noise reduction effect on the
This is because the horizontal non-linear emphasis circuits 16, 17 and 26 are provided to increase the emphasis amount on a particularly flat screen, that is, when the amplitude is small, to enhance the noise reduction effect.

When a signal with a large amplitude is input, the amplitude of the signal is limited by the horizontal non-linear emphasis circuits 16, 17, and 26, so there is no noise reduction effect for a signal with a large amplitude. However, since the noise at that level is reduced by the horizontal linear emphasis circuits 20 and 21 in the subsequent stage, a noise suppressing effect is produced as a whole.

The emphasized video signals SA and SB are combined with the discrimination signal of the interpolation field generated by the discrimination signal generation circuit 60. The discrimination signal of the interpolation field will be described later.

The video signals SA and SB, into which the discrimination signal of the interpolated field is inserted, are then supplied to the FM modulators 22 and 23 to be FM-modulated so as to be suitable for recording. And
After that, two channels are recorded through the recording amplifiers 24 and 25 by using a dedicated magnetic head (not shown).

In the reproducing system 10P, first, the video signal reproduced by the above-mentioned magnetic head is transferred to the head amplifier 3.
The video signal is supplied to the FM demodulators 32 and 33 via 0 and 31 to be FM-demodulated, and also to the horizontal non-linear de-emphasis circuits 38 and 39 via the horizontal de-emphasis circuits 34 and 35 and the low pass filters 36 and 37. It is supplied and subjected to de-emphasis processing in the horizontal direction. 6
Reference numeral 1 is a determination signal detection circuit.

The outputs of the low-pass filters 36 and 37 are also supplied to clock generation circuits 40 and 41 corresponding to the respective channels in order to generate a clock used in the digital signal processing of the reproduction system 10P.

The de-emphasis processed emphasis is supplied to A / D converters 42 and 43 to be converted into digital signals, and then supplied to a time division separation circuit 44 having a deshuffling function.

In the time division separation circuit 44, the time axis is first corrected (TBC processing), and deshuffling processing for the time axis compressed video signals SA and SB and time axis expansion and separation processing of the color difference signals PB and PR are performed. Then, the luminance signal Y for the line simultaneous with the time axis aligned and the pair of color difference signals PB,
Returned to PR.

The luminance signal Y and a pair of color difference signals PB,
PR is a horizontal non-linear de-emphasis circuit 38, 3
9, 54 and vertical non-linear de-emphasis circuit 4
After de-emphasis in the horizontal and vertical directions through 5, 46 and 47, D / A converters 48, 49 and 5 are performed.
At 0, it is converted to an analog signal, and then low-pass filter
Band-limited processing is performed at 1, 52 and 53 to form a final high-definition luminance signal Y and a pair of color difference signals PB and PR.

The recorded signal is a standard television signal N
When the signal is a signal obtained by converting TSC into a high-definition signal HD, the write clock in the time division separation circuit 44 is a write clock corresponding to the field frequency for the high-definition signal HD, whereas the read clock is a standard television signal. It is a read clock corresponding to the field frequency for NTSC. By this conversion processing, the time division separation circuit 44 outputs in a standard television signal form.

The horizontal non-linear emphasis circuit 1
6, 17 and horizontal non-linear de-emphasis circuit 38,
39, as well as horizontal linear emphasis circuits 20, 2
1 and the horizontal linear de-emphasis circuits 34 and 35 may also be configured as digital processing. In this case, however, the emphasis processing is linear processing, so the error length increases accordingly and the circuit scale of the digital circuit increases. It is hard to say that it is a very good solution because it will increase Therefore, in the example shown in FIG. 1, the linear emphasis processing system is analog processing.

FIG. 2 shows a specific example of the time division multiplexing circuit 11 provided in the recording system 10R. The input luminance signal Y has its time axis expanded by a predetermined length by a time axis expansion circuit (TBE) 71. After that, it is supplied to the field memory (or frame memory) 73. Similarly, a pair of color difference signals P
B and PR are supplied to a time axis compression circuit (TBC) 72, whose time axis is compressed, and this is supplied to a field memory 73.

In the field memory 73, a reading process is performed so that the time-axis-compressed color difference signals PB or PR are alternately multiplexed in line units with respect to the luminance signal Y. Therefore, a write address controller 75 and a read address controller 76 are provided, and a controller 77 for them is provided, and by controlling the read addresses, desired time-division multiplexed video signals SA and SB are output. ..

By the way, when the standard television signal NTSC is converted into the high-definition signal format in this VTR capable of recording and reproducing the high-definition signal, the field frequency is different as described above. It is necessary to convert the field frequency during reproduction.

This field frequency conversion processing is performed using the field memory 73 in the time division multiplexing circuit 11 described above. That is, the standard television signal N
A luminance signal Y and a pair of color difference signals PB relating to TSC,
When PR is input, the field frequencies for standard television signals 59, 94 are sent to the field memory 73.
The address controller 75 is controlled so that writing is performed with a write clock corresponding to Hz.

On the other hand, the address controller 76 is controlled so that the reading is performed by the reading clock corresponding to the field frequency 60.00 Hz for the high-definition signal HD. Along with this, field interpolation processing is performed.

When the field frequencies are different from each other in this way, the interpolation processing for one field is performed every 1000 fields. That is, as shown in FIG. 3A, interpolation of one field is performed on the input field in units of predetermined fields. In the figure, interpolation is performed in each of the 0th field and the 999th field.
For convenience, the interpolation fields are 0'field and 999 'field.

For this interpolation processing, the controller 77 gives the read address controller 76 a control signal for performing the read processing twice in a predetermined field.

Since the standard television signal NTSC has 525 horizontal lines and the high-definition signal HD has 1125 horizontal lines, the number of lines is approximately double that of the standard case. Therefore, in this example, the read address controller 76 is controlled so as to read and output the line signal twice. With this, a pseudo high definition signal HD (NTSC) can be formed.

When fields are interpolated as shown in FIG. 3A, the reverse processing, that is, thinning processing is performed in the reproducing system, but it is a principle to thin out the interpolated fields at that time. This is because the reproduction screen becomes unnatural if a field other than the interpolation field is thinned out.

Therefore, the discriminating signal generating circuit 60 forms a discriminating signal (B in the same figure) indicating an interpolated field.
The controller 77 determines to which position the discrimination signal is output.
Instructed by. An example of the insertion position of the discrimination signal is shown in FIG.

FIG. 4 shows an example of one track pattern.
The direction of head rotation is as shown. PA is a preamble area for synchronization, and an audio signal is divided into two blocks and recorded. The first half is an area for 3 channels and 4 channels, and the latter half is an area for 1 channel and 2 channels.

The ID is an identification code area in which a recording field number or the like is recorded. Most of the latter half area is a recording area of a video signal (video signal). And
The BSC area is a video subcode area, in which time information (time code etc.), table of contents information, etc. are inserted. In this example, the discrimination signal is coded and recorded in this BSC area.

In the reproducing system 10P, the conversion process opposite to that in the recording system 10R is performed. At that time, the time division separation circuit 44
The thinning-out process is performed by using the discrimination signal as shown in FIG. 3C. That is, in the field where the discrimination signal is obtained, the field signals (0 'field and 999' field) supplied at that time are thinned out without being used as the conversion processing signal. Through this thinning-out processing, the television signal NTSC having the same number of fields as that at the time of recording is obtained from the time division separation circuit 44.

[0048]

As described above, according to the present invention, the field memory for time division multiplexing provided in the time division multiplexing circuit is
It is also used as a signal conversion memory for converting a standard television signal into a high-definition signal.

According to this, the target conversion processing can be performed without using a dedicated signal form conversion converter as in the conventional case. Therefore, the circuit scale is reduced as compared with the conventional one, which contributes to cost reduction.

Further, in another invention, since the discrimination information of the interpolated field interpolated during the signal conversion processing is inserted into the time-division multiplexed recording signal, the thinning-out in the reproducing system is performed. The same field as the interpolated field can be thinned out during processing.

Therefore, it has a feature that it is possible to eliminate the unnaturalness of the reproduction screen caused by thinning out a field different from the interpolation field.

[Brief description of drawings]

FIG. 1 is a system diagram showing an example in which a recording / reproducing apparatus according to the present invention is applied to a high definition analog VTR.

FIG. 2 is a system diagram showing a specific example of a time division multiplexing circuit.

FIG. 3 is a diagram for explaining the operation of a recording / reproducing process.

FIG. 4 is a diagram showing an example of a tape pattern.

FIG. 5 is a system diagram showing an example of a conventional recording / reproducing apparatus.

[Explanation of symbols]

 10 High-definition analog VTR 10R Recording system 10P Playback system 11 Time division multiplexing circuit 44 Time division separation circuit 60 Discrimination signal generation circuit 61 Discrimination signal detection circuit 71 Time axis expansion circuit 72 Time axis compression circuit 73 Field memory 75 Write address counter 76 Read Address counter 77 controller

Claims (2)

[Claims] 1. A recording / reproducing apparatus adapted to digitally perform time-division multiplex processing on a bright luminance signal and a color signal to perform multi-channel recording, wherein a pair of color difference signals and luminance signals constituting a high-definition signal are time-division multiplexed circuit. To form a multi-channel recording signal, and the time-division multiplexing field memory provided in this time-division multiplexing circuit is also used as a signal conversion memory for converting a standard television signal into a high-definition signal. A recording / reproducing apparatus characterized by being configured as described above. 2. A recording / reproducing apparatus for digitally performing time-division multiplexing processing on a luminance signal and a chrominance signal to perform multi-channel recording, wherein a pair of color difference signals and luminance signals constituting a high-definition signal are time-division multiplexing circuits. The supplied multi-channel recording signal is formed, and the time-division multiplexing field memory provided in this time-division multiplexing circuit is also used as a signal conversion memory for converting a standard television signal into a high-definition signal. The recording / reproducing apparatus is characterized in that the discrimination information of the interpolated field interpolated at the time of the signal conversion processing is inserted into the time-division multiplexed recording signal.