JPH05165912A - Consumed energy calculator for semiconductor integrated circuit - Google Patents

Consumed energy calculator for semiconductor integrated circuit

Info

Publication number
JPH05165912A
JPH05165912A JP3330462A JP33046291A JPH05165912A JP H05165912 A JPH05165912 A JP H05165912A JP 3330462 A JP3330462 A JP 3330462A JP 33046291 A JP33046291 A JP 33046291A JP H05165912 A JPH05165912 A JP H05165912A
Authority
JP
Japan
Prior art keywords
circuit
information
semiconductor integrated
power consumption
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3330462A
Other languages
Japanese (ja)
Inventor
Yojiro Uchimura
陽治郎 内村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP3330462A priority Critical patent/JPH05165912A/en
Publication of JPH05165912A publication Critical patent/JPH05165912A/en
Pending legal-status Critical Current

Links

Landscapes

  • Test And Diagnosis Of Digital Computers (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

PURPOSE:To obtain a high-accuracy calculated result with a processing in a short time by calculating energy consumption for the unit of each circuit from a library for consumed energy calculation corresponding to a logical arithmetic signal. CONSTITUTION:This device is equipped with a circuit information file 5 to store the information of a network, logical simulation means to output the logical arithmetic signal at an input/output terminal for the unit of the circuit by executing the logical arithmetic of a semiconductor integrated circuit while extracting required information from this circuit information file 5, and library 8 for consumed energy calculation to store energy consumed for the unit of each circuit as the function of the logical arithmetic signal at the input/output terminal for the unit of the circuit. Then, the consumed energy in the semiconductor integrated circuit is calculated from the information obtained from the library 8 for consumed energy calculation corresponding to the logical arithmetic signal outputted by the logical simulation means and the information of the wiring load capacity of the network calculated from the circuit information file 5.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は半導体集積回路の消費
電力計算装置に係り、特に論理シミュレーションの出力
結果を用いて効率的に半導体集積回路の消費電力を計算
するものに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power consumption calculation device for a semiconductor integrated circuit, and more particularly to a device for efficiently calculating the power consumption of a semiconductor integrated circuit using an output result of a logic simulation.

【0002】[0002]

【従来の技術】図4は従来の半導体集積回路の消費電力
計算装置を示すブロック図である。図において、1はキ
ーボード、2は入出力インターフェイス、3はCRT、
4はCPU、5は回路情報ファイルで、半導体集積回路
を構成する素子、機能ブロックおよびこれらの入出力端
子間を接続するネットの情報が格納されている。6はR
AM、7はROMで、消費電力計算のための各手段であ
るソフトプログラムが格納されている。
2. Description of the Related Art FIG. 4 is a block diagram showing a conventional power consumption calculation device for a semiconductor integrated circuit. In the figure, 1 is a keyboard, 2 is an input / output interface, 3 is a CRT,
Reference numeral 4 is a CPU, and 5 is a circuit information file, which stores information about elements, functional blocks, and nets connecting these input / output terminals, which form the semiconductor integrated circuit. 6 is R
AM and 7 are ROMs, in which software programs which are means for calculating power consumption are stored.

【0003】次に、処理フローを図5を参照して説明す
る。先ず、回路情報ファイルから接続情報を抽出して一
旦接続情報ファイルに格納する。また、同じく回路情報
ファイルから各ネットの配線負荷容量を抽出して一旦配
線負荷容量ファイルに格納する。次に、各ファイルの情
報に基づき回路シミュレーションを行なう。これから、
各ネットの信号従って電流値を求め、更に各素子、機能
ブロックおよびネットに発生する消費電力を計算し、そ
れらを半導体集積回路の全体にわたって積算することに
より半導体集積回路の消費電力が求められる。
Next, the processing flow will be described with reference to FIG. First, the connection information is extracted from the circuit information file and temporarily stored in the connection information file. Similarly, the wiring load capacitance of each net is extracted from the circuit information file and is temporarily stored in the wiring load capacitance file. Next, circuit simulation is performed based on the information in each file. from now on,
The power consumption of the semiconductor integrated circuit is obtained by calculating the signal value of each net and the current value, calculating the power consumption generated in each element, the functional block and the net, and integrating them over the entire semiconductor integrated circuit.

【0004】[0004]

【発明が解決しようとする課題】従来の半導体集積回路
の消費電力計算装置は以上のように構成されているの
で、回路シミュレーションにより、各ネットの信号は、
その大きさのみでなく信号遅延や信号鈍りの状態も詳細
に算出され、これら詳細な信号出力に基づき各部の消費
電力が計算されるので、高い計算精度が得られるが、反
面処理時間が長くなるという問題点があった。これに対
し、信号鈍りを一次近似等で簡略化してトランジスタレ
ベルの論理シミュレーションを用いることにより消費電
力を計算する方式もあるが、上記問題点の有効な解決策
とはなり得なかった。この発明は以上のような問題点を
解消するためになされたもので、計算精度をほとんど低
下させることなく処理時間を大幅に短縮することができ
る半導体集積回路の消費電力計算装置を得ることを目的
とする。
Since the conventional power consumption calculation apparatus for a semiconductor integrated circuit is configured as described above, the signal of each net is determined by the circuit simulation.
Not only the magnitude but also the signal delay and signal bluntness are calculated in detail, and the power consumption of each part is calculated based on these detailed signal outputs, so high calculation accuracy can be obtained, but the processing time becomes longer. There was a problem. On the other hand, there is also a method of calculating the power consumption by simplifying the signal blunting by a first-order approximation or the like and using a transistor level logic simulation, but it has not been an effective solution to the above problems. The present invention has been made in order to solve the above problems, and an object thereof is to obtain a power consumption calculation device for a semiconductor integrated circuit capable of significantly shortening the processing time without substantially lowering the calculation accuracy. And

【0005】[0005]

【課題を解決するための手段】この発明に係る半導体集
積回路の消費電力計算装置は、素子または機能ブロック
からなり計算対象である半導体集積回路を構成する複数
の回路単位およびこれら回路単位の入出力端子間を接続
するネットの情報を格納する回路情報ファイル、この回
路情報ファイルから必要な情報を抽出して上記半導体集
積回路の論理演算を行ない上記各回路単位の入出力端子
における論理演算信号を出力する論理シミュレーション
手段、および上記各回路単位で消費する電力を当該回路
単位の入出力端子における論理演算信号の関数として格
納する消費電力計算用ライブラリを備え、上記論理シミ
ュレーション手段の出力である論理演算信号に対応して
上記消費電力計算用ライブラリから求まる情報と上記回
路情報ファイルから求まる上記ネットの配線負荷容量の
情報とから上記半導体集積回路における消費電力を計算
するようにしたものである。
A power consumption calculation apparatus for a semiconductor integrated circuit according to the present invention comprises a plurality of circuit units which are made up of elements or functional blocks and constitute a semiconductor integrated circuit to be calculated, and input / output of these circuit units. A circuit information file that stores information on nets that connect terminals, and necessary information is extracted from this circuit information file to perform a logical operation of the semiconductor integrated circuit and output logical operation signals at the input / output terminals of each circuit unit. And a power consumption calculation library for storing the power consumed in each circuit unit as a function of the logic operation signal at the input / output terminal of the circuit unit, and the logic operation signal output from the logic simulation unit. Corresponding to the information obtained from the power consumption calculation library and the circuit information file Obtained from the information of the wiring load capacity of the net is obtained so as to calculate the power consumption in the semiconductor integrated circuit.

【0006】[0006]

【作用】この発明においては、回路情報ファイルからの
情報を基に論理シミュレーションを実行する。これによ
って得られる各回路単位の入出力端子における論理演算
信号を基に、消費電力計算用ライブラリから当該回路単
位で発生する消費電力を読み取り、これらを積算して全
回路単位の消費電力を算出する。
In the present invention, the logic simulation is executed based on the information from the circuit information file. Based on the logical operation signal at the input / output terminal of each circuit unit obtained by this, the power consumption generated in the circuit unit is read from the power consumption calculation library, and these are integrated to calculate the power consumption of all the circuit units. ..

【0007】[0007]

【実施例】図1はこの発明の一実施例による半導体集積
回路の消費電力計算装置を示すブロック図で、従来と異
なるのは、消費電力計算用ライブラリ8が追加されてい
ること、およびROM7に格納された処理フローの内容
である。以下、これらを中心に詳細に説明する。
FIG. 1 is a block diagram showing a power consumption calculation apparatus for a semiconductor integrated circuit according to an embodiment of the present invention, which is different from the conventional one in that a power consumption calculation library 8 is added and a ROM 7 is provided. It is the content of the stored processing flow. Hereinafter, these will be mainly described in detail.

【0008】先ず、消費電力計算用ライブラリ8につい
て説明する。半導体集積回路は多数の素子または機能ブ
ロックの組合せで構成されているが、これら各素子また
は機能ブロックを回路単位とする。そして、この回路単
位から導出される入出力端子の信号に応じて当該回路単
位に実際に発生する移動電荷量を予め求めておき、これ
を消費電力計算用ライブラリ8に格納しておく。
First, the power consumption calculation library 8 will be described. A semiconductor integrated circuit is composed of a combination of many elements or functional blocks, and each of these elements or functional blocks is a circuit unit. Then, the amount of mobile charges actually generated in the circuit unit is obtained in advance according to the signal of the input / output terminal derived from the circuit unit, and this is stored in the power consumption calculation library 8.

【0009】即ち、図2はこの消費電力計算用ライブラ
リ8のファイル内容の一部を具体的に示したもので、図
において、A1は回路単位となる素子名あるいは機能ブ
ロック名、B1は回路単位A1から導出される1個の入
出力端子名、B2は同じく回路単位A1から導出される
他の入出力端子名である。C1,C2は入出力端子B1
における信号状態あるいは信号変化で、後述するが、こ
の信号はいわゆる論理シミュレーションの出力として得
られる形態の信号で、ここではこれを論理演算信号と定
義するものとする。従って、この論理演算信号では従来
技術で触れた例えば信号鈍り等は考慮されていない。
That is, FIG. 2 concretely shows a part of the file contents of the power consumption calculation library 8. In the figure, A1 is an element name or a functional block name which is a circuit unit, and B1 is a circuit unit. One input / output terminal name derived from A1 and B2 are other input / output terminal names derived from the circuit unit A1. C1 and C2 are input / output terminals B1
As will be described later, this signal is a signal obtained in the form of a so-called logic simulation output, which is defined as a logical operation signal here. Therefore, the logical operation signal does not take into consideration, for example, signal blunting mentioned in the prior art.

【0010】D1,D2は端子B1における信号がそれ
ぞれC1およびC2のときに回路単位A1に発生する移
動電荷量である。論理シミュレーションでは電圧一定と
考えてよいので、この移動電荷量は、そのまま消費電力
に比例する値となる。そして、消費電力計算用ライブラ
リ8に格納されるこの移動電荷量には、論理演算信号が
それぞれC1やC2となる場合に当該回路単位A1に実
際に発生する移動電荷量の値を別途回路シミュレーショ
ン等により予め求めて使用している。C3,D3…も同
様であるので、説明は省略する。
D1 and D2 are the amounts of mobile charge generated in the circuit unit A1 when the signals at the terminal B1 are C1 and C2, respectively. Since it can be considered that the voltage is constant in the logic simulation, this mobile charge amount is a value that is directly proportional to the power consumption. Then, for this mobile charge amount stored in the power consumption calculation library 8, the value of the mobile charge amount actually generated in the circuit unit A1 when the logical operation signal becomes C1 or C2 is separately calculated by circuit simulation or the like. Is used by being obtained in advance. Since the same applies to C3, D3 ..., Description thereof will be omitted.

【0011】次に処理フローを図3に基づき説明する。
従来と同様、回路情報ファイルから接続情報とネットの
配線負荷容量とを抽出し、ここでは、それらの情報を基
に論理シミュレーションを実行する。そして、各回路単
位の入出力端子における論理演算信号が得られると、消
費電力計算用ライブラリ8にアクセスして各信号に対応
する回路単位の移動電荷量を読み取り、これらを消費電
力量に換算して半導体集積回路全体について積算する。
配線負荷容量の情報から求まる消費電力と上記した消費
電力計算用ライブラリ8の情報から求まる消費電力とを
合算して半導体集積回路の消費電力が求められる。
Next, the processing flow will be described with reference to FIG.
Similar to the conventional method, the connection information and the net wiring load capacity are extracted from the circuit information file, and the logic simulation is executed based on these pieces of information. Then, when the logical operation signal at the input / output terminal of each circuit unit is obtained, the power consumption calculation library 8 is accessed to read the mobile charge amount of the circuit unit corresponding to each signal and convert these to the power consumption amount. The total is integrated for the entire semiconductor integrated circuit.
The power consumption of the semiconductor integrated circuit is obtained by summing the power consumption obtained from the information of the wiring load capacitance and the power consumption obtained from the information of the power consumption calculation library 8 described above.

【0012】この発明では、信号波形の鈍り等まで詳細
に算出する回路シミュレーションではなく、論理シミュ
レーションによっているので、高速処理が可能となり、
しかも、消費電力については十分高精度な結果が得られ
る。
According to the present invention, since the logic simulation is used instead of the circuit simulation for calculating the signal waveform dullness in detail, high-speed processing is possible.
Moreover, it is possible to obtain a sufficiently accurate result regarding the power consumption.

【0013】[0013]

【発明の効果】この発明は以上のように、論理シミュレ
ーションを実行して論理演算信号を求め、この信号に対
応して消費電力計算用ライブラリから各回路単位の消費
電力を算出するようにしたので、高精度の計算結果が短
時間の処理で得られる。
As described above, according to the present invention, the logic simulation is executed to obtain the logic operation signal, and the power consumption of each circuit unit is calculated from the power consumption calculation library corresponding to this signal. Highly accurate calculation results can be obtained in a short time.

【図面の簡単な説明】[Brief description of drawings]

【図1】この発明の一実施例による半導体集積回路の消
費電力計算装置を示すブロック図である。
FIG. 1 is a block diagram showing a power consumption calculation device for a semiconductor integrated circuit according to an embodiment of the present invention.

【図2】図1の消費電力計算用ライブラリのファイル内
容の一部を示す図である。
FIG. 2 is a diagram showing a part of file contents of a power consumption calculation library in FIG.

【図3】この発明の一実施例の場合の処理フローを示す
図である。
FIG. 3 is a diagram showing a processing flow in the case of an embodiment of the present invention.

【図4】従来の半導体集積回路の消費電力計算装置を示
すブロック図である。
FIG. 4 is a block diagram showing a conventional power consumption calculation device for a semiconductor integrated circuit.

【図5】従来の場合の処理フローを示す図である。FIG. 5 is a diagram showing a processing flow in a conventional case.

【符号の説明】[Explanation of symbols]

5 回路情報ファイル 8 消費電力計算用ライブラリ 5 Circuit information file 8 Power consumption calculation library

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 素子または機能ブロックからなり計算対
象である半導体集積回路を構成する複数の回路単位およ
びこれら回路単位の入出力端子間を接続するネットの情
報を格納する回路情報ファイル、この回路情報ファイル
から必要な情報を抽出して上記半導体集積回路の論理演
算を行ない上記各回路単位の入出力端子における論理演
算信号を出力する論理シミュレーション手段、および上
記各回路単位で消費する電力を当該回路単位の入出力端
子における論理演算信号の関数として格納する消費電力
計算用ライブラリを備え、上記論理シミュレーション手
段の出力である論理演算信号に対応して上記消費電力計
算用ライブラリから求まる情報と上記回路情報ファイル
から求まる上記ネットの配線負荷容量の情報とから上記
半導体集積回路における消費電力を計算する半導体集積
回路の消費電力計算装置。
1. A circuit information file for storing information of a plurality of circuit units which constitute a semiconductor integrated circuit to be calculated and which comprises elements or functional blocks, and a net which connects input / output terminals of these circuit units, and this circuit information. Logic simulation means for extracting necessary information from a file to perform a logical operation of the semiconductor integrated circuit and outputting a logical operation signal at an input / output terminal of each circuit unit, and power consumed by each circuit unit And a circuit information file which is obtained from the power consumption calculation library corresponding to the logic operation signal output from the logic simulation means. From the information on the wiring load capacitance of the net obtained from A power consumption calculation device for a semiconductor integrated circuit for calculating power consumption.
JP3330462A 1991-12-13 1991-12-13 Consumed energy calculator for semiconductor integrated circuit Pending JPH05165912A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3330462A JPH05165912A (en) 1991-12-13 1991-12-13 Consumed energy calculator for semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3330462A JPH05165912A (en) 1991-12-13 1991-12-13 Consumed energy calculator for semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPH05165912A true JPH05165912A (en) 1993-07-02

Family

ID=18232897

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3330462A Pending JPH05165912A (en) 1991-12-13 1991-12-13 Consumed energy calculator for semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPH05165912A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5754435A (en) * 1994-05-24 1998-05-19 Kabushiki Kaisha Toshiba Method and apparatus for calculating power consumption of integrated circuit
US6321168B1 (en) 1998-01-21 2001-11-20 Matsushita Electric Industrial Co., Ltd. Means of calculating power consumption characteristic and method thereof
US6493659B1 (en) 1998-05-29 2002-12-10 Nec Corporation Power consumption calculating apparatus and method of the same
US7343276B1 (en) 1996-06-20 2008-03-11 Ricoh Company, Ltd. Recording media including code for estimating IC power consumption

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5754435A (en) * 1994-05-24 1998-05-19 Kabushiki Kaisha Toshiba Method and apparatus for calculating power consumption of integrated circuit
US7343276B1 (en) 1996-06-20 2008-03-11 Ricoh Company, Ltd. Recording media including code for estimating IC power consumption
US6321168B1 (en) 1998-01-21 2001-11-20 Matsushita Electric Industrial Co., Ltd. Means of calculating power consumption characteristic and method thereof
US6493659B1 (en) 1998-05-29 2002-12-10 Nec Corporation Power consumption calculating apparatus and method of the same

Similar Documents

Publication Publication Date Title
US4272816A (en) Overcurrent protecting apparatus
EP0445713B1 (en) Electric power system simulator
KR920004856A (en) Event-limited inspection architecture
JPS592060B2 (en) Calculator
US5712791A (en) Method and apparatus for designing a circuit by analyzing selected artificial hardware dependencies inserted into a dynamic dependency graph
JPH05165912A (en) Consumed energy calculator for semiconductor integrated circuit
CN107784185A (en) The extracting method in pseudo- path, device and terminal device in a kind of gate level netlist
US6510404B1 (en) Gate delay calculation apparatus and method thereof using parameter expressing RC model source resistance value
CN110941932B (en) Demand modeling and verifying method for hardware logic design
US3555514A (en) Digital computer instruction sequencing to carry out digital differential analysis
Grosenbaugh Rex fortran 4 system for combinatorial screening or conventional analysis of multivariate regressions
JP2639212B2 (en) Multiply-accumulate unit
EP0925545A1 (en) Field programmable analogue processor
US20050050486A1 (en) Systems and methods utilizing fast analysis information during detailed analysis of a circuit design
US5504694A (en) Method of cell characterization for energy dissipation
US10521529B2 (en) Simulation method for mixed-signal circuit system and related electronic device
US7124393B1 (en) System and method for processing configuration information
US20020194091A1 (en) Method and virtual support system for providing semiconductor components and standalone simulators tagged to an individual component
JP2817455B2 (en) Timing verification system
JPH04260973A (en) Circuit constant optimizing system
JPH0116013Y2 (en)
JP2786017B2 (en) Method for manufacturing semiconductor integrated circuit
JPH10124539A (en) Simulation method and library data base
Ndeekor Algorithm for output of floating-point numbers in fixed-point form
US20050050492A1 (en) Systems and methods for performing circuit analysis on a circuit design