JPH05163998A - Backup control device for processor - Google Patents

Abstract

PURPOSE:To realize cost reduction and to improve controlprocessing speed by composing a multi-processor type backup control device to be fully applicable at normal time and to display a sufficient function even at backup time. CONSTITUTION:In the case where a main processor is normal, a subprocessor 3 inputs a car speed signal SPD and outputs a control ISC for the fine control of the target number of revolutions in the control of the number of idle revolutions. In the case where the main processor is abnormal, the input of the car speed signal SPD is changed into the input of engine speed signal Ne by a multiplexer 17, and a processing program to be executed is changed from a fuel-cut signal processing program into a fuel injection rate control signal processing program.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a backup control device for a processor which has two processors and executes arithmetic processing in the other processor when one of the processors is abnormal.

[0002]

2. Description of the Related Art Conventionally, a multiprocessor type backup control device is known as an electronic control device for an internal combustion engine of a vehicle described in JP-A-63-183254 and JP-A-3-70837. In the devices described in these publications, a full backup system using a sub-processor having the same arithmetic function as the main processor is adopted.

Therefore, in the main processor and the sub-processor, main input signals and output signals must be arranged in parallel to perform input / output with each processor. Therefore, both the main processor and the sub processor are required to have the same number of input / output ports (hereinafter referred to as I / O ports).

[0004]

By the way, it is known that an increase in the number of I / O ports in a processor causes a significant increase in cost. Further, when a large number of I / O ports are used, interrupt processing for each port must be performed, and the control processing speed is restricted as the number of interrupts increases.

Therefore, in the conventional full backup system, there is a problem that the control processing speed in a normal condition is restricted as the cost increases. Therefore, the present invention has been completed for the purpose of providing a backup control device for a processor which has a backup function and does not require a large number of I / O ports in the entire system like a full backup. Although the main object is to reduce the number of I / O ports, it is another object to provide a backup control device for a processor that can achieve an improvement in control processing speed in a normal state.

[0006]

In order to achieve such an object, in the present invention, as described in claim 1, the first arithmetic processing program is executed based on the signal input from the detection target. A first processor for outputting the obtained control signal to a control target; an abnormality detecting means for detecting an abnormality of the first processor; and the first arithmetic processing in place of the first processor when the first processor is abnormal In a backup control device for a processor including a sub-processor that executes a program, the second processor is one of the arithmetic processing to be executed by the first processor as a whole when normal, except the first arithmetic processing. Input / output for the control processing of the first processor is executed, and the arithmetic processing that does not overlap with the arithmetic processing executed by the first processor is executed. When an abnormality of the first processor is detected, the input / output allocation state of the second processor is changed to the input / output allocation state capable of executing the first arithmetic processing that was being executed by the first processor. It is characterized by comprising an allocation state switching means for switching to.

According to the backup control apparatus for a processor of the first aspect, when the first processor is normal, the second processor performs a control process which does not overlap with the first processor. Therefore, it is not necessary for the first processor side to receive an input signal from the detection target peculiar to the control process that is to be handled by the second processor.
Moreover, there is no need to output based on such control processing.
Therefore, the number of input / output ports that the first processor should have can be reduced by these amounts. This is
In addition, the number of interrupt processes for the first processor can be reduced, and the first processor can quickly execute the control process under its control. on the other hand,
When an abnormality occurs in the first processor, the allocation status switching means switches the allocation status of the input / output port of the second processor.

Specifically, for example, like the backup controller of the processor according to claim 2, the allocation state switching means is connected to a specific input / output port of the second processor when the first processor is normal. Means for switching to a connection state with a detection target or a control target necessary for the first arithmetic processing instead of the detection target or the control target being present, and after the switching, it is related to the switched input / output port. Then, instead of the arithmetic processing program that was being executed when the first processor was operating normally, a program switching means for switching the first arithmetic processing program to an executable state can be provided.

As a result, when the first processor is abnormal,
The second processor replaces the first processor with the first processor
The calculation processing program of is executed. For this reason, for example, if the first arithmetic processing program is configured as an arithmetic processing having a high degree of importance among the arithmetic processing to be executed in the entire system, at least a control processing having a high degree of importance is executed. Even when the first processor is abnormal, it can be backed up and executed, which can be said to be sufficient as control processing at the time of backup.

As described above, according to the processor backup control device of the first aspect, it is possible to provide a sufficient backup function and reduce the number of I / O ports. Then, the interrupt processing load of the first processor at the normal time is also reduced, and the remarkable effect that it becomes possible to execute the speedy processing is exerted. According to the processor backup control device of the second aspect, the allocation necessary for the first arithmetic processing does not have to be allocated to the second processor from the beginning, so that the entire system is compared with the case of the full backup. The effect of reducing the number of I / O ports is extremely high, and in the end, the entire system can be configured by reducing the number of I / O ports of the conventional full backup device by half.

By the way, reducing the number of I / O ports of the first processor is extremely effective not only in reducing the number of I / O ports in the entire system, but also reduces the interrupt processing load during normal operation, which results in quick processing. It also has a very remarkable effect from the viewpoint of achievement. Therefore, if such an action is achieved without reducing the number of I / O ports in the entire system by half, the device is extremely technically effective.

From this point of view, in the backup control device for a processor according to claim 1, as described in claim 3, the second processor detects from the beginning the detection related to the first arithmetic processing program. An input / output port allocated to a target or a control target is also provided, and the allocation state switching means allocates a detection target or a control target related to the first arithmetic processing program of the second processor when the first processor is normal. Backup control of the processor, which is means for setting prohibition of input or output to the input / output port or prohibition of execution of the first arithmetic processing program and canceling the prohibition when the first processor is abnormal. Even when configured as a device, the object of the present invention can be sufficiently achieved.

According to the apparatus of the third aspect, during normal operation, the second processor performs input / output and accompanying arithmetic processing only for processing other than the first arithmetic processing program, and is required for full backup only during abnormal operation. All input / output and arithmetic processing are performed. As a result, the first arithmetic processing program (for example, the arithmetic processing with high importance in the arithmetic processing to be executed by the entire system as claimed in claim 4) is started on the second processor side only when an abnormality occurs. Will be done. Therefore, it is the same as that there is no input / output port required for important control processing under normal conditions, and the number of ports for interrupt processing in the second processor under normal conditions can be reduced, enabling quick processing. it can. It goes without saying that the interrupt processing load can be reduced for the first processor as well. Moreover, all processes including important processes can be backed up at the time of abnormality.

According to the apparatus of the third aspect, although the number of I / O ports in the entire system cannot be reduced to half, the number of I / O ports in the entire system is much smaller than that in the conventional full backup system. The entire device can be configured and full backup can be performed.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment in which the present invention is applied to a backup control device for a device for controlling fuel injection in an internal combustion engine of a vehicle will be described below with reference to the drawings. In the first embodiment, as shown in FIG. 1, a main processor 1 (first processor) and a sub processor 3 (second processor).
And a monitor circuit 5 (abnormality detecting means) for monitoring both of them, which is a multiprocessor type backup control device, and a backup output switching circuit 9 relating to the injection amount control signal TF to the injection valve 7 as a particularly important process. have.

The main processor 1 includes a rotation speed sensor 11
The rotation speed signal Ne from is input to the capture port CP11 and signals IN11 and IN from other detection targets are input.
12 and IN13 are also input to calculate the fuel injection amount control signal TF and other control signals OUT11 and OUT12, and the injection valve 7
Etc. to each controlled object.

The sub-processor 3 inputs the vehicle speed signal SPD from the vehicle speed sensor 13 to the capture port CP31, and also receives signals IN31, IN32,
IN33 is also input, for example, fine adjustment of the target speed of idle speed control and calculation for fuel cut are performed, and output to each control target.

Here, one feature of the apparatus of this embodiment is that the rotation speed signal Ne is not input to the sub-processor 3 under normal conditions. Therefore, on the side of the sub-processor 3, when compared with the conventional full backup system (including the full backup system for only the main processing), the capture port CP31 normally outputs another signal (vehicle speed signal SPD in this embodiment). It can be used as an input port of.

That is, in the system of this embodiment, the main processor 1 takes charge of calculation and output of the fuel injection amount control signal TF, which is the most important processing, and fine adjustment of the target rotational speed of the idle rotational speed control, which is less important, is performed. The sub-processor 3 is in charge of the calculation and output of. Therefore, during normal operation, the main processor 1 does not need to have a function of performing calculation / output of fine adjustment of the target rotation speed of the idle rotation speed control based on the vehicle speed signal SPD. Therefore, when looking at the main processor 1, the sub processor 3
Not only is it possible to save the input port for control processing, which has been taken charge of by, but also the number of times interrupt processing is required when performing various normal control processing is reduced, and control processing can be speeded up.

The monitor circuit 5 monitors by a so-called watchdog timer circuit, and when it detects that the main processor 1 has an abnormality, it outputs an abnormality detection signal SF1 to the sub processor 3 based on the abnormality.
This abnormality detection signal SF1 is given to the reset terminal RST of the main processor 1 and at the same time to the backup output switching circuit 9 to switch the connection state between the injection valve 7 and each processor 1, 3. The monitor circuit 5 also monitors whether or not the sub-processor 3 is abnormal. When the sub-processor 3 is abnormal, the monitor circuit 5 gives an abnormality detection signal SF2 to that effect to the main processor 1 and at the same time. Is also applied to the reset terminal RST. As a result, when the abnormality detection signal SF1 is input, the main processor 1 enters the reset state, and the sub processor 3 detects that the main processor 1 is abnormal. On the contrary, when the abnormality detection signal SF2 is input, the sub processor 3 is in the reset state, and the main processor 1 detects that the sub processor 1 is abnormal. The important point in this embodiment is when the abnormality detection signal SF1 is input, that is, when the main processor 1 becomes abnormal. Hereinafter, the control process executed when the main processor 1 is abnormal will be described.

When the main processor 1 becomes abnormal and the abnormality detection signal SF1 is read, the sub processor 3 executes the arithmetic processing program to be executed by the input from the capture port CP31 for fine adjustment of the target rotational speed of the idle rotational speed control. Processing for switching from the arithmetic processing program to the fuel injection amount control signal arithmetic processing program is performed.

On the other hand, the vehicle speed sensor 13 and the sub processor 3
A multiplexer 17 (allocation state switching means) for switching the input signal to the capture port CP31 from the vehicle speed signal SPD to the rotation speed signal Ne is provided in the middle of the input path 15 connecting the capture port CP31 of the above. .. As shown schematically in FIG. 1, this multiplexer 1
7 has a Ne terminal 17a and an SPD terminal 17b on the sensor side and a capture terminal 17c on the processor side. Then, the abnormality detection signal S from the monitor circuit 5
While F1 is not input, the terminal 17b-1
7c are connected, but when the abnormality detection signal SF1 is input, switching between terminals 17a-17c is performed as indicated by the dotted line in the figure.

With such a configuration, in the backup control device of the embodiment, when the main processor 1 is abnormal, the monitor circuit 5 switches the backup output switching circuit 9, the sub processor 3, and the multiplexer 17 to each other.
At the same time, the abnormality detection signal SF1 is input. Then, the multiplexer 17 switches the sub-processor input signal from the vehicle speed signal SPD to the rotation speed signal Ne. Further, in the sub-processor 3, the reset processing of the main processor 1 and the arithmetic processing program to be executed by the input from the capture port CP31 are used to calculate the fuel injection amount control signal from the arithmetic processing program for the fine adjustment of the target rotational speed of the idle rotational speed control. The processing of switching to the processing program is executed together. Then, the backup output switching circuit 9 switches the control signal output processor to the injection valve 7. When the output state of the main processor 1 is determined by the reset input as the output state peculiar to the abnormality, it is not necessary to input the abnormality detection signal SF1 to the switching circuit 9, and the output state peculiar to the abnormality is accepted. It may be configured as a non-gate.

As a result, after the main processor 1 becomes abnormal, the fuel injection amount control, which is the most important process, is executed by the sub processor 3. Then, at the time of abnormality, the control of fine adjustment of the target rotation speed of the idle rotation speed control, which is of low importance, is not performed. Next, a second embodiment will be described. As shown in FIG. 2, the second embodiment has substantially the same configuration as that of the first embodiment, except that the input that is switched to the rotation speed signal Ne at the time of backup by the multiplexer 117 is the switch input, and the output at the time of backup. In the switching circuit 109, the output compare OCR, which was normally output to the switch control target 120, is injected into the injection valve 10
The difference is that the output is switched to 7.

That is, the sub processor 103 inputs a detection signal SW from a certain type of switch 113 to the capture port CP 1031 and outputs a control signal to the corresponding switch control target 120. When the abnormality detection signal SF1 is output from the monitor circuit 105, the multiplexer 117 switches the input to the capture port CP1031 of the sub-processor 103 to the rotation speed signal Ne. At the same time, the sub processor 103 outputs the reset signal RST to the main processor 101 and switches the arithmetic processing program to be executed by the input from the capture port CP 1031 from the switch control processing program to the fuel injection amount control signal arithmetic processing program. Perform processing. Further, the output switching circuit 10 at the time of backup
9 is an output compare OCR of the sub-processor 103 which has been connected to the switch control target 120 until then.
Is switched to a state in which it is connected to the injection valve 107, and
The fuel injection amount control signal output port of the main processor 101 is switched off.

As described above, in the second embodiment, not only the multiplexer 117 but also the backup output switching circuit 109 corresponds to the allocation state switching means. With this configuration, in the backup control device according to the second embodiment, when the main processor 101 has an abnormality,
The fuel injection amount control, which is the most important process, is the sub processor 1
03, the control according to the less important switch input is not performed.

As described above, according to each embodiment, the main processor 1, 101 and the sub processor 3, 1 are normally operated.
In 03, various control processes are shared. As a result, it is possible to eliminate the delay in the processing time due to the interruption in the arithmetic processing of the main processor 1, 101 and the sub processors 3, 103. On the other hand, when the main processor is abnormal,
The important processing that was being executed by the main processors 1 and 101 until then can be backed up accurately by the sub processors 3 and 103. The number of input / output ports can be reduced by switching between the normal sharing and the abnormal input / output, which helps to prevent the processor from becoming expensive. Reducing the interrupt processing load during normal operation has a very favorable effect particularly when applied to an object such as a race car that normally runs at high speed.

Further, by setting the capture port as a switching target at the time of backup, it is possible to reduce the number of main and sub capture ports together, and it is highly effective in reducing the chip area of the processor. Although one embodiment of the present invention has been described above, the present invention is not limited to this embodiment and can be implemented in various modes within the scope not departing from the gist thereof.

For example, the calculation processing of the ignition signal instead of the fuel injection amount control signal can be configured to be backed up, and the invention can be applied not only to the control device of the internal combustion engine of the vehicle but also to various electronic control devices. it can. Further, the configuration may be such that the normal port is switched instead of the capture port or the output compare, or only the output port is switched, or in the case of an abnormality, a plurality of input ports and / or a plurality of output ports may be simultaneously switched. Needless to say, it doesn't matter.

Further, the sub-processor is configured as a full backup system having the necessary number of input / output ports for all processing, and the input / output of only some ports is permitted until an abnormality is detected. I / O ports of other I / O ports (where I / O targets assigned to the main processor are input / output in parallel with the main processor) can be prohibited, and these prohibitions can be released when an error is detected. Good. Specifically, the interrupt execution of a specific control processing program can be prohibited during normal operation, and can be canceled during abnormal operation. Further, a switching circuit for switching connection / disconnection between these input / output ports which are parallel inputs to the main processor and the input / output target may be provided. That is, claim 3
The object of the present invention can be sufficiently achieved even with the configuration described above.

[0031]

As described in detail above, according to the backup control device for a processor described in each claim of the present invention,
It is possible to reduce the number of input / output ports that the processor of FIG. As a result, the number of interrupt processes in the first processor can be reduced, and in normal times, for example, important processes can be executed quickly.
On the other hand, in the event of an abnormality, it is possible to accurately back up highly important control processing. Therefore, the processor itself can have a simple structure and low cost, and in addition to backing up the minimum necessary control processing in the event of an abnormality, the burden of interrupt processing in normal control processing can be reduced, and Can also perform a quick control process.

According to the processor backup control device of the second aspect, it is possible to achieve the saving of the input / output port and the reduction of the interrupt processing even for the second processor provided for backup. Further, according to the processor backup control device of the third aspect, in addition to the effect of the device of the first aspect, full backup is possible.

[Brief description of drawings]

FIG. 1 is a schematic configuration diagram of a multiprocessor type backup control device of a first embodiment.

FIG. 2 is a schematic configuration diagram of a multiprocessor type backup control device of a second embodiment.

[Explanation of symbols]

1, 101 ... Main processor, 3, 103 ...
Sub-processor, 5,105 ... Monitor circuit, 7,1
07 ... injection valve, 9,109 ... backup output switching circuit, 11,111 ... rotation speed sensor, 13 ...
..Vehicle speed sensor, 15 ... Input path, 17,117 ...
..Multiplexers, 17a, 117a ... Ne terminals, 17b, 117b ... SPD terminals, 17c, 11
7c ... Capture terminal, 120 ... Switch control target, CP11, CP31, CP1011, CP1031 ... Capture port, OCR ... Output compare.

Claims (4)

[Claims] 1. A first processor that outputs a control signal obtained by executing a first arithmetic processing program to a control target based on a signal input from the detection target, and detects an abnormality of the first processor. A backup control device for a processor, comprising: an abnormality detecting means; and a sub processor that executes the first arithmetic processing program in place of the first processor when the first processor is abnormal, wherein the second processor is the second processor. Of the arithmetic processing to be executed by the one processor as a whole in the normal state, the input / output for the control processing other than the first arithmetic processing is allocated and does not overlap with the arithmetic processing executed by the first processor. When the abnormality detecting means detects an abnormality in the first processor by executing arithmetic processing, the input / output allocation state of the second processor is changed. First processor that was running the first processing backup control unit of a processor, comprising the allocation status switching means for switching the allocation status of viable input and output. 2. The backup control device for a processor according to claim 1, wherein the allocation state switching means is a detection target or a control target to which a specific input / output port of the second processor is connected when the first processor is normal. Instead of the above, it is a means for switching to a connection state with a detection target or a control target necessary for the first arithmetic processing, and after the switching, the first processor normal in relation to the switched input / output port. A backup control device for a processor, further comprising program switching means for switching the first arithmetic processing program to an executable state in place of the arithmetic processing program that is being executed at the time. 3. The backup control device for a processor according to claim 1, wherein the second processor also has an input / output port assigned to a detection target or a control target related to the first arithmetic processing program from the beginning. The allocation state switching means includes, when the first processor is normal, prohibiting or inputting or outputting to an input / output port allocated to a detection target or a control target related to the first arithmetic processing program of the second processor. A backup control device for a processor, which is means for setting prohibition of execution of the first arithmetic processing program and canceling the prohibition when the first processor is abnormal. 4. The first arithmetic processing program is an arithmetic processing having a high degree of importance among the arithmetic processing to be executed in the entire system. Backup controller for the processor.