JPH05153642A - Line registration control system - Google Patents

Abstract

PURPOSE:To automatically register information on line circuits in a communication device, etc., equipped with the line circuits as to the system which registers the information on the line circuits. CONSTITUTION:When the line circuits 2 provided corresponding to lines 1 are mounted in a shelf 3, the mount ports 4 of the respective line circuits in the shelf 3 are in one-to-one correspondence relation to the addresses of a control bus 6 wired to a processor 5 and the correspondence relation between the addresses on the control bus 6 and information specifying the respective line circuits is registered in the processor. In this case, the information specifying the line circuit is provided in each of the line circuits 2 and when an optional line circuit is mounted in an optional mount port of the shelf 3 of the communication device, the processor 5 reads the information out of the line circuit through the control bus 6. Consequently, the information specifying each line circuit 2 is registered corresponding to the address of the control bus 6.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a communication device or the like containing a plurality of line function blocks (hereinafter referred to as a line circuit) for automatically registering information of the line circuit in the communication device.
The present invention relates to a line registration control method.

[0002] In recent years, with the strategicization of business activities of companies, the role of information communication in companies has become more and more important. In addition, the business environment is uncertain, and therefore information communication that can be updated and used in a timely manner is desired. Therefore, for example, it is necessary to urgently increase the number of lines and introduce new information and communication equipment with a short delivery time. However, for all of these, urgent operation start is essential.

[0003] In such an environment, the information communication device can be quickly and efficiently used for new installation or line expansion of the information communication device (hereinafter referred to as "line work").
Providing a mechanism that can be dealt with economically is an important issue.

Switch, time division multiplexer, LAN, CCP
In such a communication device, a plurality of lines are accommodated and a plurality of line circuits including a subscriber circuit, a trunk, a line set, a network port, etc. connected to these lines are provided, and a processor is provided. Then, how to operate the line circuits connected to these lines is controlled.

FIG. 6 shows a schematic structure of a communication device.
Therefore, focusing on the control system between the line circuit and the processor
3 is a block diagram of the communication device 11 represented by FIG. Communication equipment
In position 11, 12_1,12_2,12₃Is the line circuit
Connected to the processor 14 via the control bus 13
There is. Reference numeral 15 indicates a shelf accommodating each line circuit
There is. In addition, each line circuit 12_1,12_2,12₃Respectively
Line 16_1,16_2,16 ₃Via the terminal 17, other
The communication device 18 and the public network 19 are connected. further,
A computer that inputs and outputs various information to and from the communication device 11.
It has a sole 20. 21 is a processor 14
Corresponding table that stores information of address-to-line circuit
22_1,22_2,22₃Is each line circuit 12_1,12_2,12
₃The processing functions of the
Is it a function that combines information and sends it back to the processor 14?
It consists of Also, 24_1,24_2,24₃The shelf
Each line circuit 12 provided in 15._1,12_2,12₃Fruit of
It is a port.

In this case, there is a one-to-one correspondence between the information such as the type of each line circuit mounted on the communication device and the address of the control bus 13 connected to each line circuit, which the processor 14 has. Registered in the table 21, the processor controls the operation of each line circuit based on the correspondence table 21.

By automatically registering the correspondence table showing the correspondence between the information such as the type of the line circuit and the control bus address, without using a manual operation, it is possible to efficiently and quickly It is desired to be economically viable.

[0008]

2. Description of the Related Art In a conventional communication device such as a circuit switch, a packet switch, a time division multiplexer, etc., a worker is required to register a large number of circuit circuits in the communication device due to new installation or expansion as follows. It was done by work.

(1) The builder creates a list in which the control bus addresses and the mounting ports of the shelf of the communication device are associated with each other on a one-to-one basis. (2) The operator is required to specify the type of individual circuit circuit to be newly installed or added,
Investigate various information such as attributes beforehand. Further, allocation is made to which mounting port of which shelf the line circuit is mounted. This is done by assigning a control bus address to each line circuit. Based on this allocation result, the builder adds various information such as line circuit type and attributes to the list created in section (1), and makes a pair of various information of these line circuits and control bus address. A list corresponding to 1 is further created.

(3) According to this list, the worker inserts each line circuit to be newly installed or added into the mounting port (position corresponding to the control bus address) in the shelf of the communication device and mounts it. (4) According to this list, the operator can operate various information such as address information on the control bus, type of line circuit, attributes, etc. corresponding to each new / added line circuit from the console of the communication device. Register with the processor in the communication device.

[0011]

The conventional method of registering a line circuit in a communication device has the following problems in order to provide information communication in a timely manner in response to the above-mentioned flexible corporate activities. There is. A skilled worker is required for each work described in (1) to (4) above. Also, in a multi-vendor environment, the contractor must be familiar with these tasks for communication devices from multiple manufacturers.

When the number of short-term line construction increases, it becomes difficult to secure a contractor having specialized knowledge. Further, it takes a lot of time and money to train such a highly skilled engineer. Therefore, efficient use of management resources is hindered. The work of the registration process shown in the above (1) to (4) is
Since the manual work of the builder is the main task, there is a limit to the reduction of the registration processing time, and the registration processing cannot be completed in a short time.

Further, since a manual process is required, it is difficult to eliminate the occurrence of line circuit registration error. That is, when the physical mounting position of the line circuit does not match the logical mounting position stored in the processor by console operation, or when the type and attribute information of the line circuit stored in the processor does not match the actual line circuit. Occurs.

The present invention is intended to solve the problems of the prior art as described above, and performs the process of registering the line circuit in the communication device by the worker described in the above items (2) to (4). The purpose is to mechanize and enable automatic processing. It should be noted that the preparation of the list showing the correspondence between the control bus address and the mounting port of the shelf of the communication device shown in the item (1) is out of scope of the present invention.

[0015]

FIG. 1 shows the basic configuration of the present invention. According to the present invention, when a plurality of line circuits 2 provided respectively corresponding to a plurality of lines 1 are mounted in a shelf 3, a mounting port 4 of each line circuit in the shelf is wired between the processor 5 and the control. There is a one-to-one correspondence with the address of the bus 6, or when the line circuit monitors the address information on the control bus and the address information matches the address information provided in the line circuit, the address information By receiving the information and the information associated therewith, there is a one-to-one correspondence between the control bus address and the mounting port of each line circuit, and the address on this control bus and the information specifying each line circuit In the communication device for registering the correspondence relationship of each line circuit in the processor, information for specifying the line circuit is provided to each line circuit 2
When an arbitrary line circuit is installed in an arbitrary mounted port of the shelf 3 of the communication device, the processor 5 reads the information in the line circuit via the control bus 6 to identify each line circuit 2. The information to be registered is registered in correspondence with the address of the control bus 6.

Further, according to the present invention, in the above-mentioned line registration control system, the processor 5 transmits the address information on the control bus and the registration instruction information to the control bus 6, and the line circuit 2 instructed by this address is transmitted. , The registration instruction information in the received information is identified by its processing function, and the received address information on the control bus and the information specifying this line circuit are transmitted to the processor 5 via the control bus 6, and the processor 5 Information for identifying this line circuit corresponding to the address on the control bus is registered in the internal correspondence table 7.

Further, according to the present invention, in these cases, the information for identifying the line circuit includes information indicating whether the line circuit is mounted or not mounted, information indicating the type and attribute of the line circuit, and the like. It is all information about control over the circuit.

[0018]

(1) The processor combines one piece of address information in the control bus address: XY (hereinafter, simply referred to as one piece of address information: XY) and the registration instruction information, and connects them via the downlink control bus. Control bus address: Send to the line circuit mounted on XY.

(2) The line circuit stores various information such as the type and attribute of the circuit itself in the memory in advance. Upon receiving the registration instruction information from the processor, the processing function in the line circuit combines the accumulated information of the line circuit with the received one piece of address information: XY, and through the upstream control bus. Send to processor.

Here, "stored in advance" means
This means that various information is stored in the line circuit in terms of hardware and software at the design stage or the manufacturing stage of the line circuit. Generally, for example, there is a setting using a DIP switch and a setting using soft data in a ROM, and these methods are known techniques.

(3) The processor receives the information transmitted according to item (2) and identifies the contents, and receives the received line circuit in the area corresponding to the address: XY in the address / line circuit information correspondence table. Stores various information of. (4) The processor repeats steps (1) to (3) to
Register the information of the line circuit corresponding to all addresses. If the line circuit is not installed, the processor will not notify the address that the line circuit is not installed because there is no reply after a certain period of time has passed since the information in (1) was sent. Register the information.

Therefore, according to the present invention, as shown in the above items (1) and (2), one address information: XY on the control bus and various information of the line circuit,
They can be logically combined one to one. Therefore, it is not necessary to manually register from the console.

As described in the above items (3) and (4), a correspondence table showing a correspondence relationship between the control bus address and various information of the line circuit is included, even when the line circuit is not mounted. , Can be logically completed in the processor. Therefore, after the installer installs the line circuit on the shelf of the communication device, the individual control bus addresses and various information of each line circuit can be logically processed by the action of the above (1) to (4). They can be combined one-to-one.

That is, by providing these solving means in the communication device, the manual work of the builder regarding the registration of various information of the line circuit in the communication device in the prior art can be performed.
It is mechanized and automated, and can solve the problems in the prior art.

[0025]

FIG. 2 shows the configuration of an embodiment of the present invention and shows a case where the present invention is applied to a circuit switch. In the figure, 30 is a network, 31 is an information receiving / distributing circuit (SRD) for receiving information and distributing it to each part, 32
Is an information transmission memory (SSM) for storing transmission information, 33
Is a speech path memory (SPM) which constitutes a speech path, 34 is a control memory (CM) which controls switching of the speech path, 3
5 is a separation circuit (DMPX) for demultiplexing information, 3
6 is a multiplexing circuit (MPX) for multiplexing information, 37 is an information receiving memory (RSM) for accumulating received information, 38 is a call processor (CPR) for controlling connection of calls, 3
9 is a memory provided in the call processor 38, 40
Is a line processor (LP
R) and 41 are memories provided in the line processor 41.

In FIG. 2, the call processor 38
And the control information transmitted and received between the line processors 40 are mainly described, and the interface distribution circuit (IF-D) and the interface receiving circuit (IF-D) are described.
The interface for carrying voice and the like provided between U) and the line circuit is omitted.

Further, in the embodiment of FIG. 2, the mounting port No. ZZ of the shelf No. A is the highway H of the upstream and the downstream.
There is a one-to-one correspondence with the address HW00 + TS01 of W00.

FIG. 3 shows a correspondence table of control bus addresses and line circuit information, which is stored in the memory 39 of the call processor 38. Reference numeral 45 denotes a correspondence table, which shows a state in which various information of the line circuit is stored. Reference numeral 46 indicates the attribute table No. 0001 in the correspondence table 45, showing the state in which the attribute contents are stored.

The highway (HW) carries multiplexed control information and digital audio signals. That is, it is a transmission line on which control information between the call processor 38 and the line processor 40 and information such as voice from the line circuit are multiplexed and carried, and an up highway and a down highway are provided.

FIG. 4 shows the data format structure of the downlink highway. The control information from the call processor 38 to the line processor 40 in the line circuit is
It is transmitted by the time slots of TS0 and TS16 of the downlink highway data format shown in FIG. The other time slots are used to carry voice and data information from the communication partner to each line circuit.

FIG. 5 shows the data format structure of the upstream highway. The control information from the line processor 40 in the line circuit to the call processor 38 is
It is transmitted by the time slots of TS0 and TS16 of the data format of the upstream highway shown in FIG. The other time slots are used to carry voice and data information from each line circuit to the communication partner.

In FIGS. 4 and 5, one time slot is composed of 8 bits, and 8 bits of information can be transmitted.

The flow of processing in one embodiment of the present invention will be described below with reference to FIGS. In this case, the process in the case where the line circuit of the communication device is installed in each shelf by the worker and various information of the line circuit of the analog telephone is registered in the correspondence table in the call processor 38 will be described. To do.

It is also assumed that the up and down highway addresses are in one-to-one correspondence with the mounting ports of the shelf. That is, a case will be described in which the addresses HW No. 00 + TS No. 01 of the upstream and downstream highways have a one-to-one correspondence with the mounting port ZZ of the shelf No. A.

(1) Processing in Correspondence Registration Function of Call Processor At this time, it is assumed that various information of the line circuit is not registered in the address: HW No. 00 + TS No. 01 in the correspondence table in the call processor 38. The process until the information of the line circuit is automatically registered at this address will be described. It should be noted that the contents of various information of the line circuit of this address in FIG. 4 indicate the contents already registered.

The correspondence registration function searches the correspondence table in the memory 39 for one control bus address (hereinafter referred to as address information). In this example,
The search control is performed from the top address. After confirming that no information is stored in the information column of the line circuit corresponding to this address information HW No. 00 + TS No. 01, this address information HW No. 00 + TS N
The o.01 and the registration instruction information are combined. The correspondence registration function sends the combined information to the network via the downlink bus.

(2) Processing in the network 1) The information receiving / distributing circuit 31 of the network 30 stores the combined information from the call processor 38 received via the downlink bus in the information transmitting memory 32.

2) The separation circuit 35 uses the down highway HW.
The information stored in the information transmission memory 32 and the information such as voice stored in the communication path memory 33 are put in each time slot of the data format of 00, and the shelf No. A is transmitted via the downlink highway HW00. To the line circuit side of.

In the time slots TS0 and TS16 of the downlink highway HW00, the combined information stored in the information transmission memory 32, that is, HW No. 00 + T is stored.
S No. 01 and registration instruction information are set. Information such as voice in the speech path memory 33 is set in the time slots other than the time slots TS0 and TS16. Information such as voice from a communication partner is stored in the communication path memory 33.

(3) Processing in shelf 1) Interface distribution circuit IF-D of shelf No. A
Takes out the control information carried in the time slots TS0 and TS16, that is, the address information HW No.00 + TS No.01 and the registration instruction information from the downlink highway HW00.

2) The interface distribution circuit IF-D is
1 to 1 based on this address information
Down control line supported by: HW0001, H
Send W No. 00 + TS No. 01 and registration instruction information.
By this processing, the address information HW No. 00 + TS No. 01 and the registration instruction information are transferred to the line circuit (50).

(4) Processing in the line circuit (50) 1) The line processor 40 of the line circuit (50) instructs the address information HW No. 00 + TS No. 01 on the control bus and the registration information via the downlink control line HW0001. Receive information. The line processor 40 identifies the registration instruction information and performs the next process.

The line processor 40 has a memory 41.
The various information of the line circuit stored in the inside is read out. In this embodiment, the following various pieces of information are stored in advance as various pieces of information of the line circuit.

A. Line type: analog b. Line attribute: extension c. Line function: With polarity reversal

The line processor 40 includes a, b, and c
Information about the line circuit shown in (hereinafter referred to as abc information)
Received address information HW No. 00 + TS No. 01
Combine with. The line processor 40 transmits the combined information to the upstream control line HW0001.

(5) Processing in shelf 1) Interface receiving circuit IF-U of shelf No. A
Is control information transmitted from the upstream control line HW0001,
That is, address information HW No. 00 + TS No. 01,
Information on the line circuit, that is, abc information, is placed in the time slots TS0 and TS16 of the upstream highway HW00 and transmitted to the upstream highway HW00.

(6) Processing in network 1) The multiplexing circuit 36 of the network 30 multiplexes the information of the data format of the upstream highway HW00 with the information of another upstream highway, for example, the upstream highway HW20. It is stored in the reception memory 37.

2) The information receiving / distributing circuit 31 transmits the information in the information receiving memory 37 to the call processor 38 via the upstream bus in response to the request from the call processor 38.

(7) Processing in the call processor The corresponding registration function of the call processor 38 is the upward highway HW00, which is information received via the upward bus.
Address information HW No. 00 + TS from the information carried by the time slots TS0 and TS16 of
The No. 01 and the abc information which are various information of the line circuit are identified. That is, the received information is as follows.

Address information: HW No. 00 + TS No. 01 a. Line type: analog b. Line attribute: extension c. Line function: With polarity reversal

Correspondence registration function, address information HW N
Based on o.00 + TS No. 01, the area corresponding to the address HW No. 00 + TS No. 01 in the correspondence table is
The abc information, which is various information of the line circuit, is stored.

1) Correspondence registration function uses the information of line type: analog, address of correspondence table HW No. 00 + TS
Store in the No. 01 type column. 2) Correspondence registration function is address HW No. 00 + TS No.
Search the attribute column of 01, and attribute table address No. 0
Recognize 001. The correspondence registration function stores the extension information in the line type column of the attribute table address No. 0001, and further stores the information with polarity inversion in the line function column.

In this way, various information of the line circuit is stored in the area designated by the predetermined address in the correspondence table. Even if the line circuit mounting position information is included in the line circuit information: for example, shelf No. A + mounting port ZZ, the line circuit mounting position information is:
As shown in FIG. 3, by the same processing as that for the extension information,
It can be stored in a predetermined area.

3) The corresponding registration function is the address information HW N
Set the information of mounting in the field of mounting / non-mounting of o.00 + TSNo.01.

(8) Correspondence table registration The correspondence registration function of the call processor 38 is the same as the above (1)-
By repeating the processing in item (7), various line circuit information corresponding to all addresses is registered. In addition,
If the line circuit is not installed, the response registration function does not install the line circuit for this address because there is no reply even after waiting a certain time after sending the information in (1). The information indicating that is registered in the correspondence table.

[0056]

As described above, according to the present invention, the following effects can be obtained regarding the work of registering a line when a line circuit is newly installed or added in a communication device. The line circuit is simply inserted into the mounting port of the shelf and mounted, and thereafter, the registration work is automatically performed by the interaction between the processor and the line circuit. Therefore,
Most of the registration work that has hitherto been performed manually can be mechanized.

By such automation, it is possible to significantly reduce the period required to register a new installation or extension of a line circuit and improve the reliability of registration. Conventionally, a construction worker was required to have specialized knowledge such as being able to operate a console for registration operation, but according to the present invention, registration of a new or expanded line circuit requires specialized knowledge. It can be easily performed even by a worker who does not have it.

[Brief description of drawings]

FIG. 1 is a diagram showing a principle configuration of the present invention.

FIG. 2 is a diagram showing a configuration of an exemplary embodiment of the present invention.

FIG. 3 is a diagram showing a correspondence table of control bus addresses and line circuit information.

FIG. 4 is a diagram showing a data format structure of a downlink highway.

FIG. 5 is a diagram showing a data format structure of an upstream highway.

FIG. 6 is a diagram showing a schematic configuration of a communication device.

[Explanation of symbols]

 1 line 2 line circuit 3 shelf 4 mounting port 5 processor 6 control bus 7 correspondence table

Claims (3)

[Claims] 1. When a plurality of line circuits (2) provided respectively corresponding to a plurality of lines (1) are mounted in a shelf (3), the mounting port (4) of each line circuit in the shelf is There is a one-to-one correspondence with the address of the control bus (6) wired to the processor (5), or the line circuit monitors the address information on the control bus and the address information and the line circuit When the provided address information matches the received address information and the information accompanying it, there is a one-to-one correspondence between the control bus address and the mounting port of each line circuit. In a communication device for registering a correspondence relationship between an address on a control bus and information specifying each line circuit in a processor, information specifying the line circuit is provided in each line circuit (2). When an arbitrary line circuit is mounted on an arbitrary mounting port of the shelf (3) of the communication device, the processor (5) reads out the information in the line circuit via the control bus (6), so that each line circuit A line registration control system characterized in that the information specifying (2) is registered in correspondence with the address of the control bus (6). 2. The line registration control method according to claim 1, wherein the processor (5) transmits address information on the control bus and registration instruction information to the control bus (6), and is instructed by the address. The line circuit (2) identifies the registration instruction information in the received information by its processing function, and receives the received address information on the control bus and the information specifying the line circuit via the control bus (6). Transmission to the processor (5), and the processor (5) registers information for identifying the line circuit in correspondence with an address on the control bus in a correspondence table (7) inside the line registration. control method. 3. All information relating to control of the line circuit, wherein the information specifying the line circuit includes information indicating whether the line circuit is mounted or not mounted, information indicating the type and attribute of the line circuit, and the like. The line registration control method according to claim 1 or 2, wherein: