JPH05152910A - Comparator - Google Patents

Comparator

Info

Publication number
JPH05152910A
JPH05152910A JP33589991A JP33589991A JPH05152910A JP H05152910 A JPH05152910 A JP H05152910A JP 33589991 A JP33589991 A JP 33589991A JP 33589991 A JP33589991 A JP 33589991A JP H05152910 A JPH05152910 A JP H05152910A
Authority
JP
Japan
Prior art keywords
current
output
trs
transistor
difference
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP33589991A
Other languages
Japanese (ja)
Inventor
Masahiro Imamura
正博 今村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP33589991A priority Critical patent/JPH05152910A/en
Publication of JPH05152910A publication Critical patent/JPH05152910A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent a current difference from being supplied to the base of an output transistor(TR) entirely and to quicken a reply speed by providing an input section supplying a current in response to two input voltages and an output section having a current mirror circuit at its output on a comparator. CONSTITUTION:A current in response to the input of TRs 2, 3 flows to TRs 4, 5. The TRs 4, 5 form a current mirror circuit and the same current flows to both TRs. When there is any difference between currents flowing to the TRs 2, 3, the difference is supplied or absorbed by a current mirror circuit composed of the TRs 6, 7. When the current flows to the TR 6, the output TR 7 absorbs the output current and when a current is absorbed from the output section, the output TR 7 reaches a high impedance. Since the output section is the current mirror circuit composed of the TRs 6, 7, the difference current is not entirely supplied to the base of the output TR 7. Thus, no time is required for the output inversion and the response time is shortened.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はコンパレーターに関し、
特にバイポーラトランジスタのコンパレーターに関す
る。
FIELD OF THE INVENTION The present invention relates to a comparator,
In particular, it relates to a bipolar transistor comparator.

【0002】[0002]

【従来の技術】従来のコンパレーターは、図2に示すよ
うに、出力部分は単一のトランジスタのみを有してい
た。
2. Description of the Related Art In a conventional comparator, as shown in FIG. 2, the output portion has only a single transistor.

【0003】次に動作について説明する。2つの入力
は、それぞれトランジスタ2,3で増幅される。増幅さ
れた電流の和は、定電流源1の出力になる。増幅された
電流は、それぞれ、トランジスタ4,5に流れ込む。ト
ランジスタ4,5はカレントミラー回路になっているた
め、トランジスタ4に流れている電流と同じ電流がトラ
ンジスタ5に流れる。そのためトランジスタ2を流れる
電流よりもトランジスタ3を流れる電流が多いとトラン
ジスタ5だけでは流れきれずにトランジスタ8のベース
へ流れ込む。この状態が出力電流を吸い込んでいる状態
である。また、トランジスタ2を流れる電流がトランジ
スタ3を流れる電流よりも多いと、トランジスタ8へ電
流が流れないので出力はハイインピーダンスになる。
Next, the operation will be described. The two inputs are amplified by transistors 2 and 3, respectively. The sum of the amplified currents becomes the output of the constant current source 1. The amplified currents flow into the transistors 4 and 5, respectively. Since the transistors 4 and 5 are current mirror circuits, the same current as the current flowing through the transistor 4 flows through the transistor 5. Therefore, when the current flowing through the transistor 3 is larger than the current flowing through the transistor 2, the transistor 5 alone cannot flow and the current flows into the base of the transistor 8. This is the state where the output current is being absorbed. If the current flowing through the transistor 2 is larger than the current flowing through the transistor 3, the current does not flow into the transistor 8 and the output becomes high impedance.

【0004】[0004]

【発明が解決しようとする課題】この従来のコンパレー
ター回路は、出力のトランジスタに電流の差分をすべて
流し込むために、出力が反転するのに時間がかかり、応
答速度がおそいという問題点があった。
This conventional comparator circuit has a problem that it takes a long time for the output to invert because the difference in the current is supplied to the output transistor, and the response speed is slow. .

【0005】[0005]

【課題を解決するための手段】本発明のコンパレーター
は、二つの入力それぞれの電圧に応じて電流を流す入力
部と、カレントミラー回路を有する出力部とを備えてい
る。
The comparator of the present invention comprises an input section for supplying a current according to the voltage of each of the two inputs, and an output section having a current mirror circuit.

【0006】[0006]

【実施例】次に本発明について図面を参照して説明す
る。図1は本発明の一実施例の回路図である。トランジ
スタ2,3の入力に応じた電流がトランジスタ4,5に
流れ込む。トランジスタ4,5はカレントミラー回路に
なっているため、トランジスタ4,5には同じ電流が流
れる。したがってトランジスタ2,3を流れる電流に差
があると、その差分がトランジスタ6,7のカレントミ
ラー回路へ流れ込んだり吸い込んだりする。トランジス
タ6に流れ込んだ場合は、出力トランジスタ7は、出力
電流を吸い込み、出力部から電流を吸い出す場合、出力
トランジスタ7は、ハイインピーダンスとなる。
The present invention will be described below with reference to the drawings. FIG. 1 is a circuit diagram of an embodiment of the present invention. A current corresponding to the input of the transistors 2 and 3 flows into the transistors 4 and 5. Since the transistors 4 and 5 are current mirror circuits, the same current flows through the transistors 4 and 5. Therefore, if there is a difference in the currents flowing through the transistors 2 and 3, the difference flows into or is absorbed by the current mirror circuit of the transistors 6 and 7. When the current flows into the transistor 6, the output transistor 7 absorbs the output current, and when the current is drawn from the output section, the output transistor 7 becomes high impedance.

【0007】出力部がトランジスタ6,7によるカレン
トミラー回路になっているため、出力トランジスタ7の
ベースには差電流がすべて流れ込むことはない。
Since the output portion is a current mirror circuit composed of the transistors 6 and 7, all the differential current does not flow into the base of the output transistor 7.

【0008】[0008]

【発明の効果】以上説明したように本発明は、出力部に
カレントミラー回路を有しているので、電流の差がすべ
て出力トランジスタのベースへ流れ込まないので出力が
反転するのに時間がかからない。したがって応答時間が
速くなるという効果を有する。
As described above, since the present invention has the current mirror circuit in the output section, it takes no time for the output to be inverted because the difference in current does not flow into the base of the output transistor. Therefore, there is an effect that the response time is shortened.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の回路図、FIG. 1 is a circuit diagram of the present invention,

【図2】従来回路の回路図である。FIG. 2 is a circuit diagram of a conventional circuit.

【符号の説明】[Explanation of symbols]

1 定電流源 2 入力トランジスタ 3 入力トランジスタ 4 カレントミラートランジスタ 5 カレントミラートランジスタ 6 出力部カレントミラートランジスタ 7 出力トランジスタ 8 出力トランジスタ 1 constant current source 2 input transistor 3 input transistor 4 current mirror transistor 5 current mirror transistor 6 output section current mirror transistor 7 output transistor 8 output transistor

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 二つの入力それぞれの電圧に応じて電流
を流す入力部と出力部にカレントミラー回路を有する出
力部とを備えることを特徴とするコンパレーター。
1. A comparator comprising an input section for supplying a current according to the voltage of each of two inputs and an output section having a current mirror circuit in the output section.
JP33589991A 1991-11-27 1991-11-27 Comparator Pending JPH05152910A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP33589991A JPH05152910A (en) 1991-11-27 1991-11-27 Comparator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33589991A JPH05152910A (en) 1991-11-27 1991-11-27 Comparator

Publications (1)

Publication Number Publication Date
JPH05152910A true JPH05152910A (en) 1993-06-18

Family

ID=18293617

Family Applications (1)

Application Number Title Priority Date Filing Date
JP33589991A Pending JPH05152910A (en) 1991-11-27 1991-11-27 Comparator

Country Status (1)

Country Link
JP (1) JPH05152910A (en)

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