JPH05152616A - Manufacture of chip of semiconductor element forming material and its thermoelectric conversion module - Google Patents
Manufacture of chip of semiconductor element forming material and its thermoelectric conversion moduleInfo
- Publication number
- JPH05152616A JPH05152616A JP3185318A JP18531891A JPH05152616A JP H05152616 A JPH05152616 A JP H05152616A JP 3185318 A JP3185318 A JP 3185318A JP 18531891 A JP18531891 A JP 18531891A JP H05152616 A JPH05152616 A JP H05152616A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- type
- source side
- holes
- chips
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 142
- 239000000463 material Substances 0.000 title claims abstract description 59
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 45
- 238000006243 chemical reaction Methods 0.000 title claims abstract description 30
- 238000000034 method Methods 0.000 claims abstract description 39
- 150000001875 compounds Chemical class 0.000 claims abstract description 29
- 239000002184 metal Substances 0.000 claims abstract description 29
- 229910052751 metal Inorganic materials 0.000 claims abstract description 29
- 239000000758 substrate Substances 0.000 claims abstract description 27
- 238000010019 resist printing Methods 0.000 claims abstract description 8
- 239000000203 mixture Substances 0.000 claims abstract description 7
- 239000002994 raw material Substances 0.000 claims description 17
- 239000013078 crystal Substances 0.000 claims description 12
- 238000002360 preparation method Methods 0.000 claims description 8
- 238000005266 casting Methods 0.000 claims description 5
- 229910002899 Bi2Te3 Inorganic materials 0.000 claims description 4
- 241000287462 Phalacrocorax carbo Species 0.000 claims description 3
- 239000004020 conductor Substances 0.000 claims description 3
- 239000011159 matrix material Substances 0.000 claims description 3
- 238000007747 plating Methods 0.000 claims description 2
- 239000012808 vapor phase Substances 0.000 claims 1
- 238000010438 heat treatment Methods 0.000 description 8
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000005304 joining Methods 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 238000005520 cutting process Methods 0.000 description 3
- 238000001035 drying Methods 0.000 description 3
- 239000011261 inert gas Substances 0.000 description 3
- 230000008018 melting Effects 0.000 description 3
- 238000002844 melting Methods 0.000 description 3
- 239000000843 powder Substances 0.000 description 3
- 239000010453 quartz Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 101150006573 PAN1 gene Proteins 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 238000001816 cooling Methods 0.000 description 2
- 230000007797 corrosion Effects 0.000 description 2
- 238000005260 corrosion Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 230000020169 heat generation Effects 0.000 description 2
- 239000003960 organic solvent Substances 0.000 description 2
- 235000019353 potassium silicate Nutrition 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 238000005245 sintering Methods 0.000 description 2
- NTHWMYGWWRZVTN-UHFFFAOYSA-N sodium silicate Chemical compound [Na+].[Na+].[O-][Si]([O-])=O NTHWMYGWWRZVTN-UHFFFAOYSA-N 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 238000007711 solidification Methods 0.000 description 2
- 230000008023 solidification Effects 0.000 description 2
- 239000002904 solvent Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 229910016272 Bi2 Te3 Inorganic materials 0.000 description 1
- 230000005679 Peltier effect Effects 0.000 description 1
- 229910017957 Sb2 Te3 Inorganic materials 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 238000002441 X-ray diffraction Methods 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 230000015271 coagulation Effects 0.000 description 1
- 238000005345 coagulation Methods 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000008014 freezing Effects 0.000 description 1
- 238000007710 freezing Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 229910052745 lead Inorganic materials 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 238000010298 pulverizing process Methods 0.000 description 1
- 230000002787 reinforcement Effects 0.000 description 1
- 230000003014 reinforcing effect Effects 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 229920002379 silicone rubber Polymers 0.000 description 1
- 239000004945 silicone rubber Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 238000005303 weighing Methods 0.000 description 1
Landscapes
- Powder Metallurgy (AREA)
- Measuring Temperature Or Quantity Of Heat (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】この発明は半導体素子材チップの
製造法、熱電気変換モジュールおよびその製造方法に関
するものであり、さらに詳しくはゼーペックおよびペル
チエ効果を利用して熱エネルギーを電気エネルギーある
いは電気エネルギーを熱エネルギーに夫々変換する半導
体素子材チップの製造方法、この種の半導体素子材チッ
プを用いて熱エネルギーと電気エネルギー間におけるエ
ネルギー変換を行なう発電機、温度調節器および冷却装
置などの熱電気変換モジュール製造技術の改良に関する
ものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device material chip, a thermoelectric conversion module and a method for manufacturing the same, and more particularly to the use of the Seepec and Peltier effect to convert thermal energy into electric energy or electric energy. Of semiconductor element material chips for converting heat into thermal energy, thermoelectric conversion of a generator, a temperature controller, a cooling device, etc. for converting energy between thermal energy and electric energy by using this type of semiconductor element material chip The present invention relates to improvement of module manufacturing technology.
【0002】[0002]
【従来の技術】上記のような半導体素子材チップに用い
る半導体化合物としては、Bi2 Te3系半導体化合物が
最も優れた熱電特性を示すものとして良く知られてい
る。また、上記半導体化合物単結晶材のC面内に結晶軸
を持つ方位の熱電特性も特に優れていることも知られて
いる。2. Description of the Related Art As a semiconductor compound used for the above-mentioned semiconductor element material chip, a Bi2Te3 based semiconductor compound is well known as one showing the most excellent thermoelectric characteristics. It is also known that the above-mentioned semiconductor compound single crystal material is also particularly excellent in thermoelectric characteristics in an orientation having a crystal axis in the C plane.
【0003】しかしながら、の単結晶材は結晶構造上、
C面間の結合力が弱く、C面で剥離し易いという欠陥を
持っており、このために熱歪みなどによって破壊される
ことが多く、これが熱電特性の劣化を引き起こす原因と
なっている。However, the single crystal material of
It has a defect that the bonding force between the C planes is weak and that it is easily peeled off at the C plane, and therefore it is often destroyed by thermal strain or the like, which causes deterioration of thermoelectric properties.
【0004】他方、その製造価格も溶製材および粉末プ
レス燒結材のそれよりも高く、それ故実用材ととして上
記単結晶材を熱電発電および冷却素子を使用することは
此まで非常に難しいと評価されており、現時点では多結
晶材、特に燒結材が最も優れた材料として使用されてい
る。On the other hand, its manufacturing cost is also higher than that of the ingot material and the powder press-sintered material. Therefore, it is very difficult to use the single crystal material as a practical material for thermoelectric power generation and cooling elements. However, at present, a polycrystalline material, especially a sintered material is used as the most excellent material.
【0005】次に、従来は適当に切り出された小さなP
型とN型の半導体素子材チップを多数個電気的に直列に
また熱的に並列に接合配列したものが熱電気変換モジュ
ールとして従来一般に用いられている。このような熱伝
変換モジュールを製造するに際しては、P型およびN型
の半導体素子材チップを交互に規則正しく配列固定しや
る必要がある。また製造中には高熱側電極固定基板近傍
で空気の対流および輻射により多量の熱が発生する。Next, conventionally, a small P cut out appropriately
Conventionally used as a thermoelectric conversion module is one in which a large number of chips of N-type and N-type semiconductor element material are electrically connected in series and thermally connected in parallel. In manufacturing such a heat transfer conversion module, it is necessary to alternately and regularly fix P-type and N-type semiconductor element material chips. Further, during manufacturing, a large amount of heat is generated near the high temperature side electrode fixing substrate due to air convection and radiation.
【0006】[0006]
【発明が解決しようとする課題】しかしながら、従来の
熱電気変換モジュールに使用される半導体素子材チップ
は鋳塊または燒結塊を細かくチップ状に切断したもので
あり、すなわち、具体的には例えば燒結材チップの場合
は溶解、凝固、粉砕、プレス、燒結、熱処理、切断など
の工程によって製造されたものである。このため、製造
工程が複雑で、これが製造コストの低減化を図る上での
障害となっている。However, the semiconductor element material chip used in the conventional thermoelectric conversion module is obtained by finely cutting an ingot or a sintered lump into chips, that is, for example, a sintered lump. In the case of the material chip, it is manufactured by a process such as melting, coagulation, crushing, pressing, sintering, heat treatment, and cutting. For this reason, the manufacturing process is complicated, which is an obstacle to reducing the manufacturing cost.
【0007】また、熱電気変換モジュールの場合は、そ
の製造中に上記のような空気の対流および輻射による多
量の熱が高熱源側から低熱源側に移動してもその遮断対
策が十分に購じられていないため、半導体素子の両端に
大きな熱歪みが掛かり、製品としては一般に熱電特性が
不十分であった。Further, in the case of the thermoelectric conversion module, even if a large amount of heat due to the convection and radiation of the air as described above moves from the high heat source side to the low heat source side during its manufacture, a sufficient measure for shutting it off is purchased. Since it was not twisted, a large thermal strain was applied to both ends of the semiconductor element, and the thermoelectric characteristics were generally insufficient as a product.
【0008】すなわち、図12に示すように従来の熱電
気変換モジュールは高熱源側と低熱源側との先端間の距
離が短くて、熱供給方向について平板的な構造であり、
半導体素子対の両端での大きな温度差を取るには本体の
数十倍の大きさの放熱板を低熱源側に取り付ける必要が
あり、モジュール全体の構造が大型化することを免れな
い。またその製造システムはP型およびN型の半導体素
子材チップを交互に規則正しく配列固定しやる必要があ
るため組立作業性において劣り、自動組立化が困難であ
った。That is, as shown in FIG. 12, the conventional thermoelectric conversion module has a short distance between the tips of the high heat source side and the low heat source side and has a flat plate structure in the heat supply direction.
In order to obtain a large temperature difference between the two ends of the semiconductor element pair, it is necessary to attach a heat dissipation plate having a size of several tens of times the size of the main body to the low heat source side, which inevitably increases the size of the entire module structure. Further, since the manufacturing system requires that P-type and N-type semiconductor element material chips be alternately arranged and fixed in a regular manner, assembly workability is poor and automatic assembly is difficult.
【0009】この発明は単結晶材に類似した一方向凝固
チップ材であって、チップ切断工程などの省略が可能
で、それ故製造工程の合理化による製造価格の低減化が
可能な半導体素子材チップの製造方法を提供することを
目的とする。The present invention is a unidirectionally solidified chip material similar to a single crystal material, in which the chip cutting process and the like can be omitted, and therefore the manufacturing cost can be reduced by rationalizing the manufacturing process. It aims at providing the manufacturing method of.
【0010】また、上記一方向凝固材である半導体素子
材チップの欠点である機械的強度(熱歪みによる素子破
壊や半田接合点での剥離など)の弱さに対する補強を考
慮した熱電気変換モジュールを提供することを目的とす
る。Further, a thermoelectric conversion module in consideration of reinforcement against weakness of mechanical strength (element destruction due to thermal strain, peeling at a solder joint, etc.) which is a defect of the semiconductor element material chip which is the unidirectionally solidified material. The purpose is to provide.
【0011】さらに、熱電気変換モジュールの製造にお
いて製品の熱電特性を向上させるとともに、製造システ
ムの組立作業性を改良して自動組立を可能とすることを
目的とする。Further, it is an object of the present invention to improve thermoelectric characteristics of a product in manufacturing a thermoelectric conversion module and improve assembly workability of a manufacturing system to enable automatic assembly.
【0012】[0012]
【課題を解決するための手段】この発明の半導体素子材
チップの製造方法は複数の孔をもつ耐熱性絶縁板の夫々
異なる前記孔の中に、N型またはP型の半導体化合物組
成を持つ溶湯を加圧または減圧法によって注入し、また
一方向凝固などによって凝固させるようにしたものであ
る。A method for manufacturing a semiconductor element material chip according to the present invention is directed to a molten metal having an N-type or P-type semiconductor compound composition in different holes of a heat-resistant insulating plate having a plurality of holes. Is injected by a pressure or pressure reduction method, and is solidified by unidirectional solidification or the like.
【0013】また、この発明の熱電気変換モジュール
は、規則的に配列された複数個の孔をもつ耐熱性絶縁板
の前記孔の中に上記方法によって半導体化合物をN,
P,N,Pの順に配設してNPの熱電対を形成し、また
これらと電気的に直列に接続し、且つ熱的に並列に配列
したものである。Further, in the thermoelectric conversion module of the present invention, the semiconductor compound is N-containing in the holes of the heat-resistant insulating plate having a plurality of regularly arranged holes by the above method.
P, N, P are arranged in this order to form a thermocouple of NP, and they are electrically connected in series and thermally arranged in parallel.
【0014】さらに、この発明の他の熱変換モジュール
ないしその製造方法は、所定位置に小穴を具えたP型と
N型の半導体素子固定治具の小穴にそれぞれの半導体素
子材チップを配布挿入し、所定の行列配置で小穴を具え
た半導体素子固定基板に半導体素子固定治具を順次重ね
合わせて各半導体素子固定治具の小穴から半導体素子固
定基板の小穴に半導体素子材チップを圧入して半導体素
子固定部を準備し、電極絶縁基板にレジスト印刷法によ
り電極を固定して高熱源側電極固定部と低熱源側電極固
定部とを準備し、半導体素子固定部を真ん中にして高熱
電源側電極固定部と低熱電源側電極固定部とをP型およ
びN半導体素子材チップが対をなし、かつ、それらが電
気的に直列に結合するように重ね合わせるものである。Further, according to another heat conversion module of the present invention or its manufacturing method, each semiconductor element material chip is distributed and inserted into the small holes of the P-type and N-type semiconductor element fixing jigs each having a small hole at a predetermined position. , The semiconductor element fixing jigs are sequentially stacked on the semiconductor element fixing board having small holes in a predetermined matrix arrangement, and the semiconductor element material chips are press-fitted into the small holes of the semiconductor element fixing board from the small holes of each semiconductor element fixing jig. Prepare the element fixing part, and fix the electrode on the electrode insulating substrate by the resist printing method to prepare the high heat source side electrode fixing part and the low heat source side electrode fixing part, with the semiconductor element fixing part in the middle and the high heat source side electrode. The fixing portion and the low heat source side electrode fixing portion are superposed so that the P-type and N-semiconductor element material chips form a pair and are electrically connected in series.
【0015】[0015]
【作用】上記した半導体素子材チップの製造方法によれ
ば、従来のような複雑な工程を経ることなく、優れた熱
電特性を持った一方向凝固材チップからなる半導体素子
材チップを得ることができる。According to the above-described method for manufacturing a semiconductor device material chip, a semiconductor device material chip made of a unidirectionally solidified material chip having excellent thermoelectric properties can be obtained without going through a complicated process as in the past. it can.
【0016】また、上記のような耐熱性絶縁板の複数の
孔にN,P,N,Pの順に半導体化合物を配設するなど
して作製した熱電気変換モジュールによれば、各孔の中
に形成される半導体化合物がこれらの孔によって夫々保
護された状態となるため素子材の機械的強度に対する補
強が行なえる。Further, according to the thermoelectric conversion module manufactured by arranging semiconductor compounds in the order of N, P, N, P in a plurality of holes of the heat resistant insulating plate as described above, Since the semiconductor compound formed in the above state is protected by these holes, the mechanical strength of the element material can be reinforced.
【0017】さらに、上記のように熱電気変換モジュー
ルに高熱源側電極固定部と低熱源側電極固定部との間に
挟まれた半導体素子固定部を設けることで、高熱源側電
極固定部から低熱源側電極固定部への発生熱の伝導が阻
止され、この結果製品の熱電特性の向上が図れる。Furthermore, by providing the thermoelectric conversion module with the semiconductor element fixing portion sandwiched between the high heat source side electrode fixing portion and the low heat source side electrode fixing portion as described above, the high heat source side electrode fixing portion is provided. Conduction of generated heat to the low heat source side electrode fixing part is blocked, and as a result, the thermoelectric characteristics of the product can be improved.
【0018】[0018]
【実施例】図1はこの発明による半導体素子材チップの
製造工程を概略的に示したものであり、これと図2(a)
〜(e) を用いてその製造方法の実施例を以下に詳述す
る。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 schematically shows a manufacturing process of a semiconductor device material chip according to the present invention.
Examples of the manufacturing method will be described in detail below with reference to (e).
【0019】図2(a) はこの製造方法に使用する器具な
どを示したもので、重し皿1,ルツボ蓋2,石英製のル
ツボ3,1個または複数個の孔4aが形成された耐熱性
絶縁板4,半導体化合物組成ないしこの化合物の鋳塊か
らなる原料5などから構成されるものである。そして、
図2(b) のように、ルツボ3の中に原料5,耐熱性絶縁
板4,重し皿1などを挿入して順次載置するとともに、
ルツボ3の上には原料5の蒸発とゲッター材を兼ねた目
的でルツボ蓋2を載置する。FIG. 2 (a) shows an apparatus and the like used in this manufacturing method, in which a weight pan 1, a crucible lid 2, a quartz crucible 3, and one or a plurality of holes 4a are formed. It is composed of a heat-resistant insulating plate 4, a semiconductor compound composition or a raw material 5 made of an ingot of this compound. And
As shown in FIG. 2 (b), the raw material 5, the heat-resistant insulating plate 4, the weight pan 1 and the like are inserted into the crucible 3 and sequentially placed,
The crucible lid 2 is placed on the crucible 3 for the purpose of both evaporation of the raw material 5 and a getter material.
【0020】これらを真空炉中にセットして加熱した状
態を図2(b) に示した。即ちこの場合には、原料5が完
全に加熱溶解されて生じた溶湯が耐熱性絶縁板4の孔4
aの中に進入してゆく。そして、進入が完全になされた
状態で、孔4aの深さ方向に溶湯の温度勾配をつけつつ
時間をかけてゆっくりを冷却する。これによって、孔4
aの中ではその深さ方向に沿って半導体化合物の結晶が
成長し、単結晶状の一方向凝固材が作製される。The state in which these are set in a vacuum furnace and heated is shown in FIG. 2 (b). That is, in this case, the molten metal produced by completely heating and melting the raw material 5 is the holes 4 of the heat resistant insulating plate 4.
Enter into a. Then, in a state where the intrusion is completed, the temperature of the molten metal is gradually increased in the depth direction of the hole 4a, and slowly cooled over time. This makes the hole 4
In a, the crystal of the semiconductor compound grows along the depth direction, and a single crystal unidirectionally solidified material is produced.
【0021】次いで、図2(d) のように、ルツボ3から
上記凝固材をその孔4aに有した状態の耐熱性絶縁板4
を取り出し、またこの耐熱性絶縁板4を真空炉または不
活性ガスの雰囲気の中で、組成均一化および化合物生成
のための熱処理を行なう。この熱処理による生成物を耐
熱性絶縁板4の孔4aより取り出せば、図2(e) の通り
の半導体素子材チップ51が得られる。Next, as shown in FIG. 2 (d), the heat-resistant insulating plate 4 in a state in which the solidified material is provided in the hole 4a from the crucible 3.
Then, the heat-resistant insulating plate 4 is subjected to a heat treatment for homogenizing the composition and producing a compound in a vacuum furnace or an atmosphere of an inert gas. If the product of this heat treatment is taken out from the hole 4a of the heat resistant insulating plate 4, the semiconductor element material chip 51 as shown in FIG. 2 (e) is obtained.
【0022】そして、このようにして作製されたN型,
P型の半導体素子材チップ51を、図3(a) のように複
数の孔41aを備えた耐熱性絶縁板41の孔41aに順
次配列し、また図3(b) のように金属チップ板6を介し
て一対のN型,P型半導体素子材チップ51を半田接合
して熱電対を形成し、また、こうして作った複数の熱電
対を電気的に直列接続し、且つ熱的に並列に結合させ
て、熱電気変換モジュールを組立る。更に、銅板からな
る金属チップ板6からの漏電などによる外的障害を防止
するために必要に応じてこの熱電気変換モジュールの両
側を耐熱性絶縁薄板7で挟み込んで固定する。Then, the N-type thus manufactured,
P-type semiconductor element material chips 51 are sequentially arranged in the holes 41a of the heat-resistant insulating plate 41 having a plurality of holes 41a as shown in FIG. 3 (a), and as shown in FIG. 3 (b). A pair of N-type and P-type semiconductor element material chips 51 are solder-bonded via 6 to form a thermocouple, and a plurality of thermocouples thus produced are electrically connected in series and thermally in parallel. The thermoelectric conversion module is assembled by assembling. Further, both sides of the thermoelectric conversion module are sandwiched and fixed by heat-resistant insulating thin plates 7 as needed in order to prevent external obstacles due to electric leakage from the metal chip plate 6 made of a copper plate.
【0023】次に、上記製造方法のより具体的な例を説
明する。即ち、良く知られているBi2 Te3 化合物で
ある、P型半導体化合物Bi0.5 Sb1.5 Te3 +0.05
重量%Pb、およびN型半導体化合物Bi2 Te2.7 S
e0.3 +0.20重量%Sを原料とし、これらをそれぞれ1
Kgづつ秤量し、石英管中に真空封入し、高周波炉中で溶
解・凝固させて、鋳塊を得た。Next, a more specific example of the above manufacturing method will be described. That is, the well-known Bi2Te3 compound, P-type semiconductor compound Bi0.5Sb1.5Te3 + 0.05.
Weight% Pb, and N-type semiconductor compound Bi2 Te2.7 S
e 0.3 + 0.20% by weight of S as raw material, each of which is 1
Each Kg was weighed, vacuum-sealed in a quartz tube, and melted and solidified in a high-frequency furnace to obtain an ingot.
【0024】上記で得たP型およびN型半導体化合物の
鋳塊を、上記と同様に、石英管からなるルツボの中に耐
熱性絶縁板とともに挿入し、この鋳塊を溶解し、また耐
熱性絶縁板の孔の深さ方向に温度勾配を持たせてゆっく
りと凝固させた。その後、凝固点直下で、真空中におい
て48時間かけて熱処理するなどして、半導体化合物素
子材チップを作製した。得られたチップの形状は耐熱性
絶縁板の孔形によって決定され、この実施例の場合には
1mm×1mmの断面で高さ5mmものであった。また
X線解析によれば、このチップは長手方向に結晶C面が
略平行に成長している柱状晶であることが確認された。
これらの半導体化合物チップの特性を表1に示した。The ingots of the P-type and N-type semiconductor compounds obtained above were inserted into a crucible consisting of a quartz tube together with a heat-resistant insulating plate in the same manner as above, and the ingots were melted and heat-resistant. A temperature gradient was provided in the depth direction of the holes of the insulating plate to slowly solidify. Then, a semiconductor compound element material chip was produced by performing heat treatment in vacuum for 48 hours immediately below the freezing point. The shape of the obtained chip was determined by the hole shape of the heat resistant insulating plate, and in the case of this example, the cross section of 1 mm × 1 mm had a height of 5 mm. Further, by X-ray analysis, it was confirmed that this chip was a columnar crystal in which the crystal C planes were grown substantially parallel to the longitudinal direction.
The characteristics of these semiconductor compound chips are shown in Table 1.
【0025】[0025]
【表1】 [Table 1]
【0026】またこれらP型およびN型の半導体化合物
チップを耐熱性絶縁板の孔の中に交互に配列させるとと
もに、一対のP型,N型半導体化合物チップ同志を金属
チップを介して半田接合してなる熱電対を電気的に直列
でまた熱的に並列に結合し、更に両面を耐熱性絶縁薄板
で挟み込み、シリコンゴムで固定して、実施例の熱電気
変換モジュールを作製した。The P-type and N-type semiconductor compound chips are alternately arranged in the holes of the heat-resistant insulating plate, and a pair of P-type and N-type semiconductor compound chips are solder-bonded to each other through a metal chip. The thermocouples thus formed were electrically connected in series and thermally in parallel, both sides were sandwiched by heat-resistant insulating thin plates, and fixed with silicone rubber to prepare a thermoelectric conversion module of the example.
【0027】次に、高熱源側における発熱の低熱源側に
及ぼす影響を抑制するこの発明の方法について説明す
る。このような発熱による影響を抑制するためにはいく
つかの方法がある。即ち、この発明の第1の方法にあっ
ては高熱源側と低熱源側とを遮断しようとするものであ
り、第2の方法にあってはこれに加えて高熱源側と低熱
源側との間の距離を大きくしようとするものである。Next, the method of the present invention for suppressing the influence of heat generation on the high heat source side on the low heat source side will be described. There are several methods for suppressing the influence of such heat generation. That is, in the first method of the present invention, the high heat source side and the low heat source side are shut off, and in the second method, the high heat source side and the low heat source side are additionally provided. It is intended to increase the distance between.
【0028】前記したように高熱源側と低熱源側とを遮
断しようとするこの発明の製造方法の第1の例にあって
は、半導体素子固定部を準備する第1の準備工程と、電
極固定部を準備する第2の準備工程と、半導体素子固定
部と電極固定部とを組立てる第3の準備工程からなるも
のである。As described above, in the first example of the manufacturing method of the present invention for shutting off the high heat source side and the low heat source side, the first preparation step of preparing the semiconductor element fixing portion and the electrode It comprises a second preparation step of preparing the fixing portion and a third preparation step of assembling the semiconductor element fixing portion and the electrode fixing portion.
【0029】このうち図4および図5により第1の準備
工程、すなわち半導体素子固定部の準備工程を説明す
る。これには図4(A)に示すようなP型半導体素子チ
ップ固定治具1と図4(B)に示すようなN型半導体素
子チップ固定治具2とを用いる。これらの固定治具1、
2はそれぞれ所定の位置に小穴を有している。ここで
「所定の位置」とは両固定治具1、2を重ね合わせた場
合にP型半導体素子チップ固定治具1の小穴とN型半導
体素子チップ固定治具2の小穴とが交互になるような位
置をいう。まずP型、N型それぞれの半導体化合物原料
を溶解させた後これを一方向性凝固させてインゴットを
得る。このインゴットから所定寸法のチップを切り出し
てそれぞれの固定治具の小穴に配布挿入する。Among them, the first preparation step, that is, the preparation step of the semiconductor element fixing portion will be described with reference to FIGS. For this purpose, a P-type semiconductor element chip fixing jig 1 as shown in FIG. 4A and an N-type semiconductor element chip fixing jig 2 as shown in FIG. 4B are used. These fixing jigs 1,
2 each have a small hole at a predetermined position. Here, the "predetermined position" means that the small holes of the P-type semiconductor element chip fixing jig 1 and the small holes of the N-type semiconductor element chip fixing jig 2 alternate when both fixing jigs 1 and 2 are overlapped. Such a position. First, P-type and N-type semiconductor compound raw materials are melted and then unidirectionally solidified to obtain an ingot. Chips of a predetermined size are cut out from this ingot and distributed and inserted into the small holes of each fixing jig.
【0030】さらに図4(C)に示すような半導体素子
固定基板3を用いる。この半導体素子固定基板3には両
固定治具1、2の小穴に合わせた寸法および位置の小穴
が行列状に形成されている。このような半導体素子固定
基板3としては例えば40mm×40mm×1mmの寸
法のものに、2mm×2mmの寸法の小穴を12×12
の行列状に、すなわち144個形成したものを用いる。
この半導体素子固定基板3に先に用意した固定治具1、
2を重ね合わせて、それぞれの固定治具の小穴から半導
体素子固定基板3の小穴にP型モジュールチップおよび
低熱源側型モジュールチップをプレス圧入して半導体素
子固定部の準備を完了する。ここ使用条件によっては、
半導体素子チップの表面に金などの適宜な金属でメッキ
処理を施してもよい。Further, a semiconductor element fixing substrate 3 as shown in FIG. 4 (C) is used. The semiconductor element fixing substrate 3 is formed with a matrix of small holes having dimensions and positions corresponding to the small holes of both fixing jigs 1 and 2. Such a semiconductor element fixing substrate 3 has, for example, a size of 40 mm × 40 mm × 1 mm, and a small hole of 2 mm × 2 mm 12 × 12.
Is used, that is, 144 pieces are formed.
The fixing jig 1 previously prepared on the semiconductor element fixing substrate 3,
The two are superposed, and the P-type module chip and the low heat source side type module chip are press-fitted from the small holes of the respective fixing jigs into the small holes of the semiconductor element fixing substrate 3 to complete the preparation of the semiconductor element fixing portion. Depending on the usage conditions,
The surface of the semiconductor element chip may be plated with an appropriate metal such as gold.
【0031】ここで半導体素子固定基板3に形成された
小穴間の間隔は1mm以下であって、従来の機械的加工
技術ではその加工が困難である。この問題を解決するた
めに、この発明においてはCモジュールの製造に用いら
れるレジスト印刷法により半導体素子固定基板3を準備
するのが好ましい。すなわち図6に示すように、絶縁基
板上に適当な接着剤を塗布し、銅板などの金属薄板を接
着する。次に半導体素子チップを圧入すべき小穴に該当
する部分を除いて全領域にレジスト印刷を施し、乾燥後
レジストインクの塗布されていない小穴該当部分を化学
腐食によりえぐり出す。つぎにアセトンなどの有機溶剤
を用いて多数の小穴の開けられた金属薄板を絶縁基板か
ら剥離する。最後に金属薄板の表面に絶縁処理を施し
て、これを半導体素子固定基板とする。Here, the interval between the small holes formed in the semiconductor element fixing substrate 3 is 1 mm or less, which is difficult to process by the conventional mechanical processing technique. In order to solve this problem, in the present invention, it is preferable to prepare the semiconductor element fixing substrate 3 by the resist printing method used for manufacturing the C module. That is, as shown in FIG. 6, a suitable adhesive is applied on the insulating substrate and a thin metal plate such as a copper plate is bonded. Next, resist printing is applied to the entire area except the portion corresponding to the small hole into which the semiconductor element chip is press-fitted, and after drying, the small hole corresponding portion to which the resist ink is not applied is dug out by chemical corrosion. Next, an organic solvent such as acetone is used to peel off the thin metal plate having many small holes from the insulating substrate. Finally, the surface of the thin metal plate is subjected to insulation treatment, and this is used as a semiconductor element fixing substrate.
【0032】つぎに図7および図8により第2の準備工
程、すなわち電極固定部の準備工程を説明する。これに
は図7(A)に示すような高熱源側電極固定部4と図7
(B)に示すような低熱源側電極固定部5とを得るため
に図8に示すようなレジスト印刷を利用した工程を用い
る。Next, the second preparatory step, that is, the preparatory step of the electrode fixing portion will be described with reference to FIGS. 7 and 8. This includes the high heat source side electrode fixing portion 4 as shown in FIG.
A process using resist printing as shown in FIG. 8 is used to obtain the low heat source side electrode fixing portion 5 as shown in FIG.
【0033】すなわち図8に示すように、電極絶縁基板
上に適当な接着剤を塗布し、銅板などの金属薄板を接着
する。次に電極を固定すべき小穴に該当する部分を除い
て全領域にレジスト印刷を施し、乾燥後レジストインク
の塗布されていない小穴該当部分を化学腐食によりえぐ
り出す。つぎにアセトンなどの有機溶剤を用いて多数の
小穴の開けられた金属薄板を固定基板から剥離して、こ
れに斜傾機能接合技術により電極板を接合固定して電極
固定部とする。このような電極固定部を高熱電源側と低
熱電源側について準備する。例えば40mm×40mm
×0.8mmの寸法のアルミナ製電極絶縁基板に2mm
×5mm×0.5mmの同電極を72個接合する。That is, as shown in FIG. 8, a suitable adhesive is applied on the electrode insulating substrate to bond a thin metal plate such as a copper plate. Next, resist printing is applied to the entire area except for the portion corresponding to the small hole to which the electrode is to be fixed, and after drying, the portion corresponding to the small hole to which the resist ink is not applied is dug out by chemical corrosion. Next, an organic solvent such as acetone is used to peel off a thin metal plate having a large number of small holes from the fixed substrate, and the electrode plate is joined and fixed to this by an oblique functional joining technique to form an electrode fixing portion. Such electrode fixing parts are prepared for the high heat power source side and the low heat power source side. For example, 40 mm x 40 mm
2mm on an alumina electrode insulating substrate with a dimension of 0.8mm
72 pieces of the same electrode of × 5 mm × 0.5 mm are joined.
【0034】次にこのようにしてそれぞれ準備された半
導体素子固定部と電極固定部とを組立てる第3の準備工
程を図9により説明する。この組立に際しては、半導体
素子固定部を真ん中にして高熱電源側電極固定部と低熱
電源側電極固定部とを、P型およびN型半導体素子チッ
プが対をなしかつそれらが電気的に直列に結合するよう
に、重ね合わせる。この状態で加圧加熱しながら一度に
半田接合することによりモジュールとする。Next, a third preparatory step for assembling the semiconductor element fixing portion and the electrode fixing portion thus prepared will be described with reference to FIG. At the time of this assembly, with the semiconductor element fixing portion in the middle, the high heat power source side electrode fixing portion and the low heat power source side electrode fixing portion form a pair of P-type and N-type semiconductor element chips and they are electrically connected in series. Stack as you would. In this state, a module is formed by soldering at once while heating under pressure.
【0035】さて前記の第1の準備工程において用いる
半導体素子チップを準備するに際しては、得られた製品
において高熱源側と低熱源側との間の温度勾配が大きく
なるようににすることが望ましい。これには半導体素子
チップの鋳造時における温度勾配を調整する。さらに具
体的には半導体化合物原料を加熱溶解し、半導体素子固
定治具の小穴と同仕様の小穴を有する鋳造金型の小穴に
溶湯を注入し、鋳造金型と溶湯とに凝固方向に温度勾配
を持たせて徐々に凝固させる。これにより凝固体の結晶
がほぼ一方向に揃って成長するのである。なお半導体化
合物原料としてはTetraadymite型Rhombohedoral 結晶構
造を有するVおよびVI族の元素を含むBi2 Te3 系
のものを用いるのが好ましい。以上のようにして得られ
た80%Bi2 Te3 +20%Sb2 Te3 (P型半導体
素子材)の熱電特性を表2に示した。When preparing the semiconductor element chip used in the first preparing step, it is desirable that the temperature gradient between the high heat source side and the low heat source side in the obtained product be large. .. For this purpose, the temperature gradient during the casting of the semiconductor element chip is adjusted. More specifically, the semiconductor compound raw material is heated and melted, the molten metal is injected into the small hole of the casting mold having the small hole of the same specifications as the small hole of the semiconductor element fixing jig, and the temperature gradient in the solidification direction between the casting mold and the molten metal. Hold and gradually solidify. This causes the crystals of the solidified body to grow almost in one direction. As the semiconductor compound raw material, it is preferable to use a Bi2Te3 system material containing elements of Group V and VI having a Tetraadymite type Rhombohedoral crystal structure. Table 2 shows the thermoelectric characteristics of the 80% Bi2 Te3 + 20% Sb2 Te3 (P-type semiconductor element material) obtained as described above.
【0036】[0036]
【表2】 [Table 2]
【0037】図10にこの発明の熱電気変換モジュール
製造方法の他の例、すなわち第1の方法に加えて高熱源
側と低熱源側との間の距離を大きくしようとする製造方
法を示す。この製造方法においては2枚の耐熱性絶縁薄
板の一板厚側面に金属製薄板または細棒を接合し、この
耐熱性絶縁薄板のそれぞれの片面にP型およびN型半導
体素子厚膜を積層させ、これらを上下逆にして重ね合わ
せ、その先端を金属鵜製薄板または細棒の導電体で結合
して半導体素子対を形成し、これらの半導体素子を電気
的に直列に重ね合わせるものである。FIG. 10 shows another example of the thermoelectric conversion module manufacturing method of the present invention, that is, a manufacturing method for increasing the distance between the high heat source side and the low heat source side in addition to the first method. In this manufacturing method, a thin metal plate or a thin rod is joined to one side of one heat-resistant insulating thin plate, and a P-type and N-type semiconductor element thick film is laminated on one side of each heat-resistant insulating thin plate. , These are stacked upside down, and the tips thereof are connected by a metal cormorant thin plate or thin rod conductor to form a semiconductor element pair, and these semiconductor elements are electrically stacked in series.
【0038】さらに具体的に説明するとこの製造方法に
おける半導体素子原料ペーストの準備工程においては、
図11に示すように希定量の原料を秤量して真空溶解育
成したインゴットを熱処理後ボールミルで粉砕し手原料
粉末を準備する。この原料粉末に溶剤を混合してペース
ト状にする。この際必要に応じて燒結促進剤を添加する
こともある。More specifically, in the step of preparing the semiconductor element material paste in this manufacturing method,
As shown in FIG. 11, an ingot obtained by weighing a rare amount of raw material and vacuum melting and growing it is heat-treated and then ground by a ball mill to prepare a hand raw material powder. A solvent is mixed with this raw material powder to form a paste. At this time, a sintering accelerator may be added if necessary.
【0039】具体的な例を挙げると、P型半導体素子厚
膜は(Be0.5 Sb1.+Te3 +1.75W%tSe)
の組成とし、N型半導体素子厚膜は(Bi1.8 Sb0.2
Te2.85+SbI3 )の組成とする。インゴットの熱処
理は、アルゴンガス雰囲気中でP型半導体素子について
は548〜408℃で48時間、N型半導体素子につい
ては488〜473℃で48時間、それぞれ行なう。粉
砕は1〜2μ程度の粒度になるまで行なう。得られたP
型半導体素子のゼーペック係数αは195μm/固定
部、電気伝導率σは1.0×105 S/K、熱伝導率κ
は2.45×10-3W・m固定部、性能指数Zは2.9
3×10-3であった。またN型半導体素子ゼーペック係
数αは−220μm/固定部、電気伝導率σは1.1×
105 S/固定部、熱伝導率κは1.65×10-3W・
mK、性能指数Zは2.93×10-3であった。As a concrete example, the thick film of the P-type semiconductor element is (Be0.5Sb1. + Te3 + 1.75W% tSe).
And the N-type semiconductor element thick film has a composition of (Bi1.8 Sb0.2
The composition is Te 2.85 + SbI 3). The heat treatment of the ingot is performed in an argon gas atmosphere at 548 to 408 ° C. for 48 hours for the P-type semiconductor element and at 488 to 473 ° C. for 48 hours for the N-type semiconductor element. The pulverization is performed until the particle size becomes about 1 to 2 μ. Obtained P
Coefficient of semiconductor type semiconductor element α is 195 μm / fixed portion, electric conductivity σ is 1.0 × 10 5 S / K, thermal conductivity κ
Is 2.45 × 10 -3 W ・ m fixed part, performance index Z is 2.9
It was 3 × 10 -3. Also, the N-type semiconductor element Zeepec coefficient α is −220 μm / fixed portion, and the electrical conductivity σ is 1.1 ×.
105 S / fixed part, thermal conductivity κ is 1.65 × 10 -3 W
The mK and the figure of merit Z were 2.93 × 10 -3.
【0040】つぎに、このようにして準備された半導体
素子原料ペーストを用いて圧膜モジュールを製造する。
耐熱性絶縁板の一側面に銀ロウペーストを塗布し、これ
に金属薄板を加圧接触させる。この状態で真空中で85
0℃で約1時間過熱して、金属薄板を絶縁板側面に接合
する(斜傾複合接合技術)。この接合後に全体の表面に
ニッケルメッキを施す。かくして処理された絶縁薄板の
表面に溶媒により薄く溶かれた水ガラスをコーチングし
て表面上に数μm程度の薄い水ガラス膜を形成して乾燥
させる。Next, a pressure membrane module is manufactured using the semiconductor element raw material paste thus prepared.
A silver wax paste is applied to one side of the heat resistant insulating plate, and a thin metal plate is brought into pressure contact therewith. 85 in vacuum in this state
The thin metal plate is joined to the side surface of the insulating plate by heating at 0 ° C. for about 1 hour (oblique compound joining technique). After this joining, nickel plating is applied to the entire surface. Water glass thinly dissolved in a solvent is coated on the surface of the insulating thin plate thus treated to form a thin water glass film of about several μm on the surface and then dried.
【0041】このように処理された絶縁薄板上に先に用
意された原料ペーストをスクリーン印刷法により積層さ
せて、P型とN型半導体素子厚膜を形成する。乾燥後両
積層基板を上下逆に重ね合わせて、加圧しつつ不活性ガ
ス雰囲気中で加熱して基板間の接合と積層厚膜の燒結と
を同時に行なう。かくして得られたP型およびN型半導
体素子厚膜対を連続的に重ね合わせて加圧しつつ不活性
ガス中で加熱し、基板間の接合と積層膜の燒結とを同時
に行なって、この発明の熱電気変換モジュールを得る。On the insulating thin plate thus treated, the raw material paste prepared previously is laminated by the screen printing method to form the P-type and N-type semiconductor element thick films. After drying, both laminated substrates are stacked upside down, and heated in an inert gas atmosphere while applying pressure to bond the substrates and to sinter the laminated thick film at the same time. The P-type and N-type semiconductor element thick film pairs thus obtained are successively superposed and heated in an inert gas while being pressurized to bond the substrates and to sinter the laminated film at the same time. Obtain a thermoelectric conversion module.
【0042】[0042]
【発明の効果】以上の通り、この発明によれば、半導体
素子材チップの製造工程の合理化、並びに半導体素子材
の機械的強度の補強が可能な熱電気変換モジュールを提
供することができる。As described above, according to the present invention, it is possible to provide a thermoelectric conversion module capable of rationalizing the manufacturing process of semiconductor element material chips and reinforcing the mechanical strength of the semiconductor element material.
【0043】また、半導体素子チップが半導体素子固定
基板の小穴の中に固定されている状態で最後の組立工程
を行なうので、半田接合時に半導体素子チップの位置の
ズレが起きない。すなわち半導体素子固定部を一部品と
して扱うことができるので非常に作業性がよく、作業が
簡易化するとともに自動組立に極めて適したものとな
る。Further, since the final assembly step is carried out in the state where the semiconductor element chip is fixed in the small hole of the semiconductor element fixing substrate, the positional deviation of the semiconductor element chip does not occur during solder joining. That is, since the semiconductor element fixing portion can be handled as one part, the workability is very good, the work is simplified, and it is extremely suitable for automatic assembly.
【0044】また半導体素子固定部が高熱電源側電極固
定部と低熱電源側電極固定部との間に配置されているの
で、高熱電源側電極固定部から発生される空気の対流お
よび輻射熱は半導体素子固定部により遮断されて、低熱
電源側電極固定部には到達しいない。この半導体素子固
定部による遮断効果は高熱電源側と低熱電源側殿合だの
温度差を大ならしめるように作用し、得られた熱電気変
換モジュールの熱電特性を大きく向上させるのである。Further, since the semiconductor element fixing portion is arranged between the high heat power source side electrode fixing portion and the low heat power source side electrode fixing portion, air convection and radiant heat generated from the high heat power source side electrode fixing portion are applied to the semiconductor element. It is blocked by the fixing part and does not reach the low heat power source side electrode fixing part. The blocking effect by the semiconductor element fixing portion acts to widen the temperature difference between the high heat power source side and the low heat power source side, and greatly improves the thermoelectric characteristics of the obtained thermoelectric conversion module.
【図1】この発明による半導体素子材チップの製造方法
の概略の説明図。FIG. 1 is a schematic explanatory view of a method for manufacturing a semiconductor device material chip according to the present invention.
【図2】この発明の半導体素子材チップの製造方法の具
体的な説明図。FIG. 2 is a specific explanatory view of a method for manufacturing a semiconductor element material chip according to the present invention.
【図3】上記半導体素子材チップを用いて構成される熱
電気変換モジュールの説明図。FIG. 3 is an explanatory diagram of a thermoelectric conversion module configured using the semiconductor element material chip.
【図4】この発明の製造方法の第1の例に用いる治具な
どを示す平面図。FIG. 4 is a plan view showing a jig or the like used in the first example of the manufacturing method of the present invention.
【図5】同製造方法における半導体素子固定部の準備工
程を示す工程図。FIG. 5 is a process diagram showing a step of preparing a semiconductor element fixing portion in the manufacturing method.
【図6】同製造方法における半導体素子固定基板の準備
工程の一例を示す工程図。FIG. 6 is a process drawing showing an example of a process for preparing a semiconductor element fixed substrate in the manufacturing method.
【図7】高熱源側および低熱源側電極固定部を示す平面
図。FIG. 7 is a plan view showing high heat source side and low heat source side electrode fixing portions.
【図8】電極固定部の準備工程を示す工程図。FIG. 8 is a process chart showing a preparation process of an electrode fixing portion.
【図9】同製造方法における熱電気変換モジュールの組
立工程を示す工程図。FIG. 9 is a process diagram showing an assembly process of the thermoelectric conversion module in the manufacturing method.
【図10】この発明の製造方法の第2の例を示す説明
図。FIG. 10 is an explanatory view showing a second example of the manufacturing method of the present invention.
【図11】同製造方法における半導体素子原料ペースト
の準備工程を示す工程図。FIG. 11 is a process diagram showing a step of preparing a semiconductor element raw material paste in the manufacturing method.
【図12】従来の熱電気変換モジュールの構成を示す断
面側面図。FIG. 12 is a sectional side view showing the configuration of a conventional thermoelectric conversion module.
1 重し皿 2 ルツボ蓋 3 ルツボ 4,41 耐熱性絶縁板 4a,41a 孔 5,51 原料 6 金属チップ板 7 耐熱性絶縁薄板 11 P型半導体素子固定治具 12 N型半導体素子固定治具 13 半導体素子固定基板 14 高熱源側電極固定部 15 低熱源側電極固定部 1 Weight Plate 2 Crucible Lid 3 Crucible 4,41 Heat Resistant Insulating Plate 4a, 41a Hole 5,51 Raw Material 6 Metal Chip Plate 7 Heat Resistant Insulating Thin Plate 11 P-type Semiconductor Device Fixing Jig 12 N-type Semiconductor Device Fixing Jig 13 Semiconductor element fixing substrate 14 High heat source side electrode fixing part 15 Low heat source side electrode fixing part
Claims (11)
る前記孔の中に、N型またはP型の半導体化合物組成を
持つ溶湯を、加圧または減圧法によって注入し凝固させ
ることを特徴とする半導体素子材チップの製造方法。1. A molten metal having an N-type or P-type semiconductor compound composition is injected into each of different holes of a heat-resistant insulating plate having a plurality of holes by a pressurizing or depressurizing method to solidify. A method for manufacturing a semiconductor device material chip.
溶湯を一方向凝固させることを特徴とする請求項1の製
造方法。2. The manufacturing method according to claim 1, wherein the molten metal injected into the holes of the heat-resistant insulating plate material is unidirectionally solidified.
熱性絶縁板材の前記孔の中にN,P,N,P・・・の順
に請求項1または2の製造法法によって半導体化合物を
配設し、NPの熱電対を形成させ、電気的に直列に、そ
して熱的に並列に配列することを特徴とする熱電気変換
モジュール。3. A semiconductor according to claim 1 or 2 in the order of N, P, N, P ... In the holes of a heat-resistant insulating plate material having a plurality of regularly arranged holes. A thermoelectric conversion module, wherein a compound is disposed, a thermocouple of NP is formed, and the compounds are arranged electrically in series and thermally in parallel.
側電極固定部(4)と低熱電源側電極固定部(5)と
が、P型およびN型半導体素子材チップが対をなし、か
つ、それらが電気的に直列に結合するように、重ね合わ
されていることを特徴とする熱電気変換モジュール。4. A high heat power source side electrode fixing portion (4) and a low heat power source side electrode fixing portion (5) sandwich a semiconductor element fixing portion therebetween, and P-type and N-type semiconductor element material chips form a pair, A thermoelectric conversion module, characterized in that they are superposed so that they are electrically coupled in series.
属製薄板または細棒が接合されており、この耐熱性絶縁
薄板のそれぞれの片面にP型およびN型半導体素子厚膜
が積層されており、これらが上下逆に重ね合わされてお
り、その先端が金属鵜製薄板または細棒の導電体で結合
されて形成された半導体素子対の半導体素子をが気的に
直列に重ね合わされていることを特徴とする熱電気変換
モジュール。5. A metal thin plate or a thin rod is joined to one side of one heat-resistant insulating thin plate, and a P-type and N-type semiconductor element thick film is formed on one side of each of the heat-resistant insulating thin plates. They are stacked, and these are stacked upside down.The semiconductor elements of a pair of semiconductor elements formed by connecting the tips with metal cormorant thin plates or thin rod conductors are stacked in series in a vapor phase. The thermoelectric conversion module is characterized in that.
導体素子固定治具(1、2)の小穴にそれぞれの半導体
素子材チップを配布挿入し、所定の行列配置で小穴を具
えた半導体素子固定基板(3)に半導体素子固定治具を
順次重ね合わせて各半導体素子固定治具の小穴から半導
体素子固定基板の小穴に半導体素子材チップを圧入して
半導体素子固定部を準備し、電極絶縁基板にレジスト印
刷法により電極を固定して高熱源側電極固定部(4)と
低熱源側電極固定部(5)とを準備し、半導体素子固定
部を真ん中にして高熱電源側電極固定部と低熱電源側電
極固定部とをP型およびN型半導体素子材チップが対を
なし、かつ、それらが電気的に直列に結合するように重
ね合わせることを特徴とする熱電気変換モジュールの製
造方法。6. The semiconductor element material chips are distributed and inserted into the small holes of P-type and N-type semiconductor element fixing jigs (1, 2) having small holes at predetermined positions, and the small holes are provided in a predetermined matrix arrangement. The semiconductor element fixing jigs are sequentially stacked on the semiconductor element fixing board (3), and the semiconductor element material chips are pressed into the small holes of the semiconductor element fixing board from the small holes of each semiconductor element fixing jig to prepare the semiconductor element fixing portion. A high heat source side electrode fixing part (4) and a low heat source side electrode fixing part (5) are prepared by fixing the electrode on the electrode insulating substrate by a resist printing method, and the high heat power source side electrode with the semiconductor element fixing part in the middle. A thermoelectric conversion module, characterized in that the fixing portion and the low heat power source side electrode fixing portion are stacked so that the P-type and N-type semiconductor element material chips form a pair and are electrically coupled in series. Production method.
材チップを圧入した後、半導体素子材チップに金属メッ
キ処理を施すことを特徴とする請求項6に記載の方法。7. The method according to claim 6, wherein after the semiconductor element material chip is press-fitted into the small hole of the semiconductor element fixing substrate, the semiconductor element material chip is subjected to metal plating treatment.
板を形成することを特徴とする請求項6に記載の方法。8. The method according to claim 6, wherein the semiconductor element fixing substrate is formed by a resist printing method.
導体化合物原料を加熱溶解し、半導体素子固定治具の小
穴と同仕様の小穴を有する鋳造金型の小穴に溶湯を注入
し、鋳造金型と溶湯とに凝固方向に温度勾配を持たせて
徐々に凝固させることを特徴とする請求項6に記載の製
造方法。9. In the preparation of a semiconductor element material chip, a semiconductor compound raw material is heated and melted, and a molten metal is injected into a small hole of a casting mold having a small hole of the same specification as a small hole of a semiconductor element fixing jig to form a casting mold. The manufacturing method according to claim 6, wherein the molten metal is gradually solidified with a temperature gradient in the solidifying direction.
型Rhombohedoral 結晶構造を有するVおよびVI族の元
素を含むBi2 Te3 系のものを用いることを特徴とす
る請求項9に記載の方法。10. Tetraadymite as a semiconductor compound raw material
10. The method according to claim 9, wherein a Bi2Te3 system containing elements of groups V and VI having a type Rhombohedoral crystal structure is used.
金属製薄板または細棒を接合し、この耐熱性絶縁薄板の
それぞれの片面にP型および低熱源側型半導体素子厚膜
を積層させ、これらを上下逆にして重ね合わせ、その先
端を金属鵜製薄板または細棒の導電体で結合して半導体
素子対を形成し、これらの半導体素子を電気的に直列に
重ね合わせることを特徴とする熱電気変換モジュールの
製造方法。11. A thin metal plate or a thin rod is bonded to one thick side surface of two heat resistant insulating thin plates, and a P type and a low heat source side type semiconductor element thick film is attached to one side of each of the heat resistant insulating thin plates. It is possible to stack them upside down, stack them upside down, connect the tips with a metal cormorant thin plate or thin rod conductor to form a semiconductor element pair, and stack these semiconductor elements electrically in series. A method for manufacturing a characteristic thermoelectric conversion module.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18531891A JP3205940B2 (en) | 1991-06-28 | 1991-06-28 | Method for manufacturing semiconductor element material chip, thermoelectric conversion module using semiconductor element material chip obtained by applying the same, and method for manufacturing the thermoelectric conversion module |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18531891A JP3205940B2 (en) | 1991-06-28 | 1991-06-28 | Method for manufacturing semiconductor element material chip, thermoelectric conversion module using semiconductor element material chip obtained by applying the same, and method for manufacturing the thermoelectric conversion module |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH05152616A true JPH05152616A (en) | 1993-06-18 |
JP3205940B2 JP3205940B2 (en) | 2001-09-04 |
Family
ID=16168741
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18531891A Expired - Fee Related JP3205940B2 (en) | 1991-06-28 | 1991-06-28 | Method for manufacturing semiconductor element material chip, thermoelectric conversion module using semiconductor element material chip obtained by applying the same, and method for manufacturing the thermoelectric conversion module |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP3205940B2 (en) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2003105244A1 (en) * | 2002-01-01 | 2003-12-18 | 古河電気工業株式会社 | Thermoelectric element module and method for fabricating the same |
JP2007088451A (en) * | 2005-08-25 | 2007-04-05 | Yamaha Corp | Manufacturing method for thermoelectric material, manufacturing method for thermoelectric element, and manufacturing method for thermoelectric module |
JP2007305664A (en) * | 2006-05-09 | 2007-11-22 | Saitama Prefecture | Thermoelectric element and its manufacturing method |
JP2012235017A (en) * | 2011-05-06 | 2012-11-29 | Shimane Univ | Thermoelectric conversion material manufacturing apparatus and thermoelectric conversion material manufacturing method |
JP2015122464A (en) * | 2013-12-25 | 2015-07-02 | 株式会社小松プロセス | Thermoelectric conversion material, circuit manufacturing method and thermoelectric conversion module |
US9087963B2 (en) | 2011-04-12 | 2015-07-21 | Panasonic Intellectual Property Management Co., Ltd. | Apparatus for manufacturing thermoelectric conversion element |
JP2017157786A (en) * | 2016-03-04 | 2017-09-07 | トヨタ自動車株式会社 | Thermoelectric conversion material and method for manufacturing the same |
CN112038478B (en) * | 2020-09-15 | 2023-09-26 | 上海商皓电子科技有限公司 | Manufacturing process of semiconductor refrigeration element and element |
-
1991
- 1991-06-28 JP JP18531891A patent/JP3205940B2/en not_active Expired - Fee Related
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2003105244A1 (en) * | 2002-01-01 | 2003-12-18 | 古河電気工業株式会社 | Thermoelectric element module and method for fabricating the same |
JP2007088451A (en) * | 2005-08-25 | 2007-04-05 | Yamaha Corp | Manufacturing method for thermoelectric material, manufacturing method for thermoelectric element, and manufacturing method for thermoelectric module |
JP2007305664A (en) * | 2006-05-09 | 2007-11-22 | Saitama Prefecture | Thermoelectric element and its manufacturing method |
US9087963B2 (en) | 2011-04-12 | 2015-07-21 | Panasonic Intellectual Property Management Co., Ltd. | Apparatus for manufacturing thermoelectric conversion element |
JP2012235017A (en) * | 2011-05-06 | 2012-11-29 | Shimane Univ | Thermoelectric conversion material manufacturing apparatus and thermoelectric conversion material manufacturing method |
JP2015122464A (en) * | 2013-12-25 | 2015-07-02 | 株式会社小松プロセス | Thermoelectric conversion material, circuit manufacturing method and thermoelectric conversion module |
JP2017157786A (en) * | 2016-03-04 | 2017-09-07 | トヨタ自動車株式会社 | Thermoelectric conversion material and method for manufacturing the same |
CN112038478B (en) * | 2020-09-15 | 2023-09-26 | 上海商皓电子科技有限公司 | Manufacturing process of semiconductor refrigeration element and element |
Also Published As
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