JPH0514798A - Camera jiggle correcting device - Google Patents

Abstract

PURPOSE:To search an exact movement vector in order to correct the camera jiggle of an image. CONSTITUTION:A screen is divided into plural blocks, and at least one candidate vector Vc is detected at every block by a movement vector detecting circuit 3. In the period of the transmission of dummy data, a second control circuit 13 outputs a testing address ADE through a selector 14 to a field memory 5, and the field memory 5 supplies the corresponding data of the previous field made to correspond by the input data and the candidate vector Vc, are supplied through a selector 15 to a difference absolute value accumulating circuit 16. The difference absolute value accumulating circuit 16 outputs the input data and the residual of the corresponding data to a first control circuit 12. The first control circuit 12 selects one of the plural candidate vectors Vc based on the residual, and the pertinent candidate vector Vc is used as the movement vector.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a camera shake correction device for detecting and correcting camera shake of an image in a video camera or the like.

[0002]

2. Description of the Related Art A camera shake correction device is a device for detecting a camera shake at the time of photographing from image data of a CCD (solid-state image pickup device) in a video camera, for example, to prevent an image shake between fields.

Therefore, the image data from the CCD is once taken into the field memory, the motion vector detecting circuit detects the motion vector due to the shaking of the image, and the reading of the image data from the field memory is corrected based on this motion vector. As a result, the image shake between the fields is corrected.

FIG. 4 is a diagram showing an output image area after image stabilization output from the field memory when an image frame is set along the image area of the CCD.

That is, the image area (image frame area) on the CCD
Is composed of an output image area and a correction area corresponding to the maximum correctable motion vector. The figure shows a case where the output image area is located at the center of the image frame area.

Thus, when the output image area is smaller than the image frame area, it is necessary to enlarge the image by interpolating the image data.

FIG. 5 (A) is a block diagram showing the interpolation circuit 6, FIG. 5 (B) is a timing diagram showing the operation of the circuit in the case of enlarging by 3/2, and FIG. 5 (C) is an interpolation result. FIG.

In FIG. 5A, the image data read from the CCD has scanning line data Y in each horizontal scanning period H.
i (however, i = 0, 1, 2, ...) Is input sequentially. The input scan line data Yi is multiplied by the coefficient C0 by the multiplier 61 and then input to the adder 65. At the same time, the scanning line data Yi is input to the 1H delay line 63 via the switch 62, delayed by 1 horizontal scanning period (1H), and then multiplied by the coefficient C1 by the multiplier 64 to adder 65.
To enter. The adder 65 adds both outputs from the multipliers 61 and 64 and outputs the output scanning line data yi.

In FIG. 4B showing the line interpolation operation of the interpolation circuit 6 in the case of enlarging to 3/2 times, each scanning line data Yi (Y0, Y1, Y2, ...) Is sequentially shown in the figure. However, the dummy data DM is input during one horizontal scanning period (1H) after inputting the scanning line data Y0 or the two scanning line data Y1 and Y2, Y3 and Y4, ....
Enter.

Since the switch 62 is switched to the a side during the scanning line data input period and to the b side during the dummy data DM input period, the 1H delay line 63 is delayed by one horizontal scanning period (1H). Scan line data Y0, Y0, Y1, Y
2, Y2, Y3, Y4, Y4, ... Are output to the multiplier 64.

The coefficient C0 of the multiplier 61 is controlled to be 0, 2/3, 1/3 as shown in the figure in synchronization with the horizontal scanning period (H), and the coefficient C1 of the multiplier 64 is , Is similarly controlled to be 1/3, 2/3,
The corrected scanning line data yi output from the adder 65 with a delay of 1H is as follows.

[0012]

[Equation 1]

In FIG. 5C, each scan line data Y to be input is input.
i is shown by a solid line, and each interpolated scanning line data yi is shown by a dotted line.

As described above, it is necessary to enlarge the image in the vertical direction at the same time as enlarging the image in the vertical direction. In FIG. 4, when the corrected output image area matches the image frame, that is, when the correction area is formed by expanding the CCD, the image enlargement as described above is unnecessary, but Based on the readout clock of the entire image area, the image area after camera shake correction is
Similarly, the dummy data DM is inserted and output every several lines, and the dummy data DM is removed by using the data conversion circuit instead of the interpolation circuit 6. That is, even in this case, similarly, there is a dummy data transmission period in which the output from the field memory to the data conversion circuit is stopped.

Next, a method of detecting a motion vector required to perform camera shake correction will be described by taking the representative point method as an example.

FIG. 6 is an explanatory diagram of a motion vector detection method by the representative point method.

In the figure, Aij (n-1) is the image data of the (n-1) th field output from the CCD, P
0, P1, P2, ..., P5 are representative points common to each field of the CCD, and their pixel data are represented by the (n-1) th pixel data.
If extracted from the field, Ak (n-1), nth
When extracted from the field, it is written as Ak (n), .... The number of representative points set is arbitrary, but in order to simplify the description, in this example, there are 2 (= x) points in the horizontal direction and 3 (= y) points in the vertical direction, for a total of 6 points. Therefore, the representative point data Ak (n-1) (where k = 0, 1, 2, ...,
5) is a part of Aij (n-1).

Wk is a motion vector search range with the representative point Pk as the origin, Q is all search points in the search range Wk, and A
k (Q) is the pixel data of the search point Q. Here, since the search point Q is represented by relative coordinates within the search range Wk with each representative point Pk as the origin, it is a coordinate point common to each search range Wk.

U00 is the upper limit scanning line of the search ranges W0 and W1, and U01 is the lower limit scanning line. Similarly, U10 is the upper limit scan line of the search ranges W2 and W3, U11 is the lower limit scan line, U20 is the upper limit scan line of the search ranges W4 and W5, and U21.
Is the lower scan line.

In the above code, if the field numbers (n-1), (n), ... Shown, they are omitted. For example, the representative point data Ak (n-1) is simply referred to as Ak. write.

Residuals S are obtained for all the search points Q within the search range Wk. Search point Q of each residual S
When the residual S (l, m) at (l, m) (where (l, m) is the coordinate with each representative point Pk as the origin) is the smallest residual, each origin Pk is used as the starting point for searching. A vector whose end point is the point Q (l, m) is a motion vector V (n) of the nth field with respect to the (n-1) th field. Here, each residual S is obtained as follows.

[0022]

[Equation 2]

FIG. 7 is a block diagram showing an example of a conventional camera shake correction apparatus, and its operation will be described with reference to the timing chart shown in FIG.

By the time Tn, the representative point data Ak (n-1) of the (n-1) th field is stored in the representative point memory 31 of (xxy) words, and the motion detection circuit 32 causes the representative point data Ak (n-1). -2) The motion vector V (n-1) of the (n-1) th field with respect to the field is detected, and the motion vector V (n-1) is detected by the address control circuit 4 in the reference field, for example, the cumulative motion of the first field and thereafter. Vector Vt
Read address ADR for camera shake correction
And the image data Aij (n-1) of the (n-1) th field is stored in the field memory 5. The representative point memory 31 and the motion detecting circuit 32 form the motion vector detecting circuit 3.

The operation in the next n-th field period, that is, the period (Tn to Tn + 1) is as follows.

1) Image data Aij (n) of the nth field is input as the input signal 1.

2) The representative point memory 31 stores representative point data Ak (n-1) of the (n-1) th field for residual calculation.
Of the input signal Aij (n), the representative point data Ak (n) of the nth field is stored (written).

3) First, the motion detection circuit 32 inputs the pixel data Ak (Q) of each search point Q within each search range Wk and the representative point input from the representative point memory 31 in the input signal Aij (n). From the data Ak (n-1), all residuals S are calculated by "Equation 2".

Next, of all the residuals S, the minimum residual S
(L, m) is obtained, and the vector (l, m) is used to calculate the
1) The motion vector V (n) of the nth field with respect to the field.

4) The address control circuit 4 first sets time T
Up to the nth (nth) output from the motion vector detection circuit 3
-1) The motion vector V (n-1) of the field is
It is added to the cumulative addition value Vt of the motion vector from the field to the (n-2) th field (Vt = Vt + V (n-
1)).

Next, in the period Tn to Tn + 1, in order to correct the shake of the image due to the shake of the (n-1) th field, the reading for the (n-1) th field which is address-shifted by the accumulated motion vector Vt. Address A
DR (n-1) is output to the field memory 5.

5) In the field memory 5, the read address ADR (n-1) for the (n-1) th field output from the address control circuit 4 is used to shift the address by the amount of camera shake. The input signal Aij (n) is stored (written) while the image data Aij (n-1) of is output (read).

6) The interpolation circuit 6 outputs the image data Aij (n-) after the image stabilization output from the field memory 5.
With respect to 1), the image enlargement processing by the interpolation as described above is performed, and the image is output as the image of the (n-1) th field.

Other periods (Tn-1 to Tn), (Tn + 1
... Tn + 2), ..., The same operation as described above is repeated.

In the conventional device described above, reading / writing of the field memory 5 is performed as follows. The (n
-1) The image data Aij (of the n-th field to be input to the area that has already been output to the interpolation circuit 6 in the output image area of the field and the non-output area (correction area) outside this output image area. n) are sequentially overwritten.

[0036]

In the above-mentioned conventional apparatus, in order to detect a highly accurate motion vector, it is possible to increase the representative score x × y from, for example, about 100 points to several hundred points. Since the increase in the number of representative points increases the capacity of the representative point memory, it also increases the capacity of the memory for storing each residual in the motion detection circuit 32.
It was not possible to set a sufficient number of representative points. Therefore, the image stabilization sometimes does not work well.

Therefore, according to the present invention, one field is divided into a plurality of blocks, at least one motion vector is detected for each block to be a candidate vector, and each candidate vector is tested using the dummy data transmission period. Done,
By making one of the candidate vectors a true motion vector, it is intended to realize accurate camera shake correction.

[0038]

In order to solve the above problems, in the present invention, the screen of the (n + i) th field (n and i are natural numbers) to be input is divided into a plurality of blocks, and each of the plurality of blocks is divided. About the nth field, a motion vector is detected as a candidate vector, and one of the detected plurality of candidate vectors is (n +
i) In a camera shake correction device that determines a motion vector of a field and corrects image shake between fields,
The present invention is characterized by having a checking means for checking the already detected candidate vector in parallel with the detection of the candidate vector during a predetermined period within the (n + i) th field period.

[0039]

In FIG. 1 showing an embodiment of the present invention, image data 1 (Ai
j (n)) is supplied to the motion vector detecting circuit 3, the field memory 5, and the absolute difference value accumulating circuit 16, and the field memory 5 sequentially stores them.

The motion vector detecting circuit 3 detects one or a plurality of candidate vectors Vc for each of a plurality of blocks set in the screen, and the address control circuit 1
Output to 1.

During the dummy data transmission period in which the image data output from the field memory 5 to the interpolation circuit 6 via the selector 15 is suspended, the second control circuit 13 causes the candidate vector V
Based on c, the verification address ADE is output to the field memory 5 via the selector 14,
Is the image data Aij in the (n-1) th field, which is associated with the input data Aij (n) by the candidate vector Vc in the absolute difference value accumulation circuit 16 via the selector 15.
Output (n-1). The absolute difference value accumulator circuit 16 calculates both image data A associated by the candidate vector Vc.
The cumulative addition value of the absolute difference values between ij (n) and Aij (n-1) is output to the first control circuit 12.

At the end of the input period of the nth field, the first
The control circuit 12 determines one of the plurality of candidate vectors Vc as the motion vector V (n) of the nth field based on the cumulative addition value of the absolute difference values, and cumulatively adds the motion vectors of the reference field and thereafter. The motion vector V (n) of the nth field is added to the value to obtain a new cumulative addition value, and the read address ADR for correcting this cumulative addition value is output to the field memory 5 via the selector 14.

In the input period of the (n + 1) th field, the field memory 5 reads out the stored image data Aij (n) of the nth field from the read address ADR.
Based on the above, dummy data including the dummy data is sequentially output to the interpolation circuit 6 via the selector 15. In parallel with this, the input (n + 1) th field image data Aij (n +
1) are sequentially stored in the field memory 5.

The interpolation circuit 6 performs an interpolation process on the image data Aij (n) supplied from the field memory 5 and enlarges the image data Aij (n) so as to fill the image frame area to obtain an output signal 7.

As described above, by using one of the plurality of candidate vectors Vc as the motion vector, the camera shake correction result of the camera shake correction apparatus can be made more accurate.

[0046]

Embodiments of the present invention will now be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention. The parts common or similar to those of the conventional example (FIG. 7) are designated by the same reference numerals and their duplicated description will be omitted.

As shown in FIG. 2 (A), the operation of the embodiment will be described in the case where one screen is divided into upper and lower parts into a first half block Bu and a second half block Bl.

The motion vector detection circuit 3 as a means for detecting the motion of an image operates in the same manner as the above-mentioned conventional example except for the following two points.

First, in the conventional example, the motion vector V of the entire one screen is detected, whereas in this embodiment, the motion vector of the first half block Bu in the one screen is detected. That is, since the conventional example corresponds to the case where the first half block Bu is the entire screen and the second half block Bl is the null block in this embodiment, the operation of the motion vector detection circuit 3 is essentially the same.

Secondly, in the conventional example, of all residuals S,
One vector V (l, m which is the minimum residual S (l, m)
m) is the motion vector V, the minimum residual S (l1, m1) and the next minimum residual S (l2,
m2), the next next minimum residual S (l3, m3), ..., and the plurality of vectors V (l1, m1), V (l2, m)
2), V (l3, m3), ... Are output as a plurality of candidate vectors Vc1, Vc2, Vc3 ,. However, in the following description, the number of candidate vectors Vc is 2.

The image data Aij (n) of the first half block Bu of the nth field is sequentially input, and the motion vector detection circuit 3 selects the candidate vector Vc1 (l1, 11) of the first half block Bu of the nth field with respect to the (n-1) th field. m
1) and Vc2 (12, m2) are detected and output to the address control circuit 11.

In the period in which the image data Aij (n) of the latter half block Bl of the nth field is input, the motion vector detecting circuit 3 detects the candidate vector Vcl of the latter half block Bl in parallel with the interpolation circuit. During the dummy data transmission period to 6, the selectors 14 and 15 are both switched to the a side, and the verification for evaluating the candidate vectors Vc1 and Vc2 is performed as follows.

Assuming that the true motion vector V (l, m) of the nth field with respect to the (n-1) th field is obtained, any pixel data Aij of the nth field is obtained.
Corresponding pixel data Ai-m, j- of the (n-1) th field, which is associated with (n) by the true motion vector.
cumulative addition value (Σ | Aij) of the absolute value of the difference from l (n-1)
(N) -Ai-m, j-1 (n-1) |), that is, the residual should be zero or close to zero.

Therefore, the second half block B of the nth field
The difference absolute value accumulator circuit 16 cumulatively adds the above-mentioned difference absolute values to the two candidate vectors Vc1 and Vc2 for each dummy data transmission period within the input period of l.

FIG. 3 shows image data A _I for one line of the nth field input to the absolute difference value accumulation circuit 16.
_* (N) is associated with the candidate vectors Vc1 and Vc2 in the (n-1) th field image data AI _-4 ,
It is explanatory drawing which shows _* (n-1), AI _{+ 5} , _* (n-1).
However, in the figure, the number of pixels in the horizontal direction is 80, the horizontal component of the assumed maximum motion vector is 8 pixels, the number of pixels to be cumulatively added is 4, and the candidate vectors Vc1 (-3,4) and Vc2 (7,-
5) was assumed.

In FIG. 3, A _I , _* (n) is image data for one line of the n-th field input to the absolute difference value accumulation circuit 16 during the dummy data transmission period within the input period of the latter half block Bl. Yes _, it is composed of 80 pixels of A _{I, 0 to} A _{I, 79} . Here, it is assumed that the dummy data transmission period is k times within the input period of the latter half block Bl.

The first 8 of the image data A _I , _* (n)
The pixel and the last 8 pixels are a margin area corresponding to the horizontal component of the maximum motion vector. A _{I, 8 to} A _{I, 71} are pixel data to be cumulatively added to the absolute difference value.

The pixel data of the (n-1) th field corresponding to the pixel data A _{I, 8 to} A _{I, 71} is the candidate vector V.
According to c1 (-3, 4), the corresponding line data A _I-4 , _*
Of (n-1), A _{I-4,11 to} A _I-4,74 , and according to the candidate vector Vc2 (7, -5), corresponding line data A _{I + 5} , _* (n-1) ), A _{I + 5,1 to} A _{I + 5,64} ,
Both are stored in the field memory 5.

Based on the two candidate vectors Vc1 and Vc2, the second control circuit 13 outputs the verification address ADE to the field memory 5 via the selector 14 and the field memory 5 via the selector 15 as a difference absolute as verification means. The image data of the (n-1) th field is output to the value accumulating circuit 16. That is, in the example shown in FIG. 3, four (c = 4) pixel data A of the input n-th field are input.
_I, 8 to A _I, against _11, from the field memory 5 the (n-1) 4 pieces of pixel data of field A _{I-4, 11} to A
_I-4,14 is output based on the candidate vector Vc1. The difference absolute value accumulating circuit 16 has pixel data (A _{I, 8} and A _I-4,11 ), (A _{I, 9} and A _I-4,12 ), (A _{I, 10} ) corresponding to each other.
And A _I-4,13 ), or (A _{I, 11} and A _I-4,14 ), takes the absolute value of the difference, and outputs the cumulative addition value of the obtained four difference absolute values. Corresponding pixel data A _{I + 5,5 to} A _{I + 5,8} corresponding to the pixel data A _{I, 12 to} A _{I, 15} is output based on the candidate vector Vc2, and similarly, the four difference absolute values are output. Output the cumulative addition value.

In this way, since eight (h = 8) cumulative values are obtained for each of the two candidate vectors Vc1 and Vc2 during the dummy data transmission period (= 1H), the latter half block Bl is input. At the end, h × k cumulative values are obtained. Here, an example in which the number of pixels c for cumulative addition of absolute difference values is set to 4 has been described, but the number c is arbitrary.

When the input of the nth field is completed,
The motion vector detection circuit 3 includes a candidate vector Vcl of the second half block Bl in the address control circuit 11 as control means.
(N) is output, and at the same time, the absolute difference value accumulation circuit 16
Outputs to the first control circuit 12 cumulative addition values of h × k difference absolute values for each of the candidate vectors Vc1 and Vc2. The first control circuit 12 uses three candidate vectors Vc
The true motion vector V (n) is determined from 1, Vc2, Vcl according to a determination criterion described later, and added to the accumulated motion vector Vt after the reference field (for example, the first field) (Vt = Vt + V (n)). And the cumulative motion vector V
Selector 1 for read address ADR corrected by t
It outputs to the field memory 5 via 4.

In parallel with this, the input signal 1, that is, the input image data Aij (n) of the nth field is sequentially stored in the field memory 5.

In the next field, that is, in the period in which the image data Aij (n + 1) of the (n + 1) th field is input, the field memory 5 reads the read address ADR.
Based on the output image data Aij of the nth field
(N) is output to the interpolation circuit 6 via the selector 15, and the interpolation circuit 6 interpolates the output image data and enlarges it so as to fill the image frame area to obtain the output signal 7.

The determination of the true motion vector V (n) in the first control circuit 12 is performed as follows, for example.

At the time when the input of the nth field is completed,
The information provided to the first control circuit 12 includes three candidate vectors Vc1, Vc2, Vcl, cumulative addition values of h × k absolute difference values with respect to the candidate vector Vc1, and h × k absolute difference values with respect to the candidate vector Vc2. It is the cumulative addition value.

First, three candidate vectors Vc1 and Vc
When two or more of 2, Vcl are equal, the candidate vector is set as the true motion vector V (n).

Next, three candidate vectors Vc1 and Vc
2 and Vcl are all different, of the cumulative addition values of h × k difference absolute values to the candidate vector Vc1, the smallest cumulative addition value Su1 and the cumulative addition of h × k difference absolute values to the candidate vector Vc2. Of the values, the smallest cumulative addition value Su2
And the three threshold values Th that are appropriately set are compared.

Minimum cumulative addition values Su1, Su2 and threshold value T
If Su1 is the smallest among h, the candidate vector Vc1 is
If u2 is the smallest, the candidate vector Vc2 is set, and if Th is the smallest, the candidate vector Vcl is set as the true motion vector V (n).

In the above example, the three candidate vectors V
In addition to c1, Vc2 and Vcl, a motion vector Vcw for the entire screen may be obtained at the same time. In this case, the candidate vectors given to the first control circuit 12 are Vc1, Vc2 and
There are four, Vcl and Vcw.

In the above example, the number of candidate vectors in the first half block Bu is 2, but when the number of candidate vectors is large, the output of the absolute difference value accumulating circuit 16 is set to the second control circuit 13.
First, the second control circuit 13 narrows down a large number of candidate vectors into two candidate vectors, and then the first control circuit 12 determines that one of the two candidate vectors is a true motion vector. You may comprise.

Further, in the first half block Bu, a motion vector is detected with a relatively coarse accuracy to generate a plurality of candidate vectors, and in the latter half block, a true motion vector having a required accuracy is obtained from the plurality of candidate vectors. Good.

FIG. 2 is a diagram showing an arrangement example of blocks in one screen (one field).

FIG. 2A shows an example in which one screen is divided into upper and lower parts into a first half block Bu and a second half block Bl, and the operation of the embodiment in this block arrangement is as described above.

FIG. 2B is an example in which the first-half block Bu of FIG. 2A is further divided into left and right parts to form a first block Bu1 and a second block Bu2. 2A, except that at least one motion vector is detected for each of the first and second blocks Bu1 and Bu2 to be used as a candidate vector.

FIG. 2C shows an example in which the screen is divided into upper, lower, middle and lower parts into a front block Bf, a middle block Bs and a rear block Bt.

In the input period of the previous block Bf of the nth field, the motion vector detection circuit 3 detects one or a plurality of candidate vectors Vcf and outputs them to the address control circuit 11.

In the input period of the middle block Bs of the nth field, the motion vector detection circuit 3 detects one or a plurality of candidate vectors Vcs and outputs them to the address control circuit 11. At the same time, during the dummy data transmission period, the cumulative value Suf of the differential absolute values is calculated by the differential absolute value cumulative circuit 16 and is output to the address control circuit 11 for the evaluation of the candidate vector Vcf of the previous block Bf.

In the input period of the succeeding block Bt of the nth field, one or a plurality of candidate vectors Vct are detected by the motion vector detection circuit 3 and output to the address control circuit 11. At the same time, during the dummy data transmission period, the cumulative value Sus of the differential absolute value is calculated by the differential absolute value cumulative circuit 16 for evaluation of the candidate vector Vcs of the middle block Bs, and is output to the address control circuit 11.

At the end of the input of the nth field, the first control circuit 12 determines the true motion vector V (n of the nth field based on the candidate vectors Vcf, Vcs, Vct and the cumulative values Suf, Sus of the absolute difference values. ) Is determined and the read address ADR is output based on the cumulative addition value Vt of the motion vector after the reference field.

In the input period of the (n + 1) th field, the field memory 5 outputs the output image data of the nth field to the interpolation circuit 6 via the selector 15 at the read address ADR, and the interpolation circuit 6 performs the interpolation process. The output signal 7 is used.

In the present invention, the image data Aij (n) of the nth field, which is sequentially input during the input period of the nth field, is written in the following area of the field memory 5 (that is, the (nth -1) Overwritten on the image data Aij (n-1) of the field).

An area other than the output image area, that is, a correction area in which the image data Aij (n-1) is not output (FIG. 4) or an area of the output image area Aij (n-1) for which the output to the interpolation circuit 6 is completed. And the image data Aij (n) of the n-th field to be input is input to a region that does not include the image data Aij (n−1) for calculating the cumulative addition value of the absolute differences in the difference absolute value accumulating circuit 16. ) Is sequentially overwritten.

Further, in the above description, the motion vector is obtained between the following two fields, but i may be an arbitrary positive integer and the motion vector of the (n + i) th field with respect to the nth field may be obtained. ..

Further, in the above description, the dummy data transmission period is used as the predetermined period for checking the candidate vector, but the horizontal and vertical blanking periods may be used.

[0086]

As described above, according to the present invention, one screen is divided into a plurality of blocks, at least one motion vector for each block is detected and set as a candidate vector, and a predetermined period such as a dummy data transmission period is set. Since a plurality of candidate vectors are used for verification and a motion vector is selected from among the plurality of candidate vectors, there is an effect that camera shake correction can be performed more accurately than before while suppressing the circuit scale to the same extent as before. ..

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a block layout diagram in the embodiment.

FIG. 3 is an explanatory diagram of a verification process.

FIG. 4 is a diagram showing an output image area.

5A and 5B are a block diagram and an operation explanatory diagram of an interpolation circuit 6. FIG.

FIG. 6 is an operation explanatory diagram of a motion vector detection circuit 3 in a conventional example.

FIG. 7 is a block diagram showing a conventional example.

FIG. 8 is a time chart showing an operation of a conventional example.

[Explanation of symbols]

 1 Input Signal (Image Data Aij) 3 Motion Vector Detection Circuit 5 Field Memory 6 Interpolation Circuit 7 Output Signal 11 Address Control Circuit (Control Means) 12 First Control Circuit 13 Second Control Circuit 14, 15 Selector 16 Difference Absolute Value Accumulation Circuit (Verification means) 61,64 Multiplier 62 Switch 63 1H delay line 65 Adder

Claims (1)

Claim: What is claimed is: 1. An input (n + i) field (n and i are natural numbers) screen is divided into a plurality of blocks, and a motion vector for the nth field is detected for each of the plurality of blocks. In a camera shake correction apparatus that determines a candidate vector, one of the detected plurality of candidate vectors is a motion vector of the (n + i) th field, and corrects the image shake between fields, in the (n + i) th field period. Within a predetermined period, the camera shake correction device further comprises a verification means for verifying the already detected candidate vector in parallel with the detection of the candidate vector.